Senior ML Engineer II · Cruise LLC, General Motors
Ph.D. student · ECE, The University of Texas at Austin · Austin, Texas
arnabsanyal.com · Google Scholar · ORCID · LinkedIn · Stack Overflow · Medium · CV · Email
I am currently employed at Cruise LLC as a Senior Machine Learning Engineer II, where I focus on building ML compilers to optimize machine learning models for General Motors' advanced driver assistance and full autonomous vehicle systems. Previously, I have worked at Advanced Micro Devices, Inc. as a Member of Technical Staff, Qualcomm AI Research as a Senior ML Engineer and Amazon Lab126 Hardware Compute Group as a SysDE ML Compiler Engineer.
I graduated with two research-focused master's degrees from the University of Southern California in 2020 and an integrated dual degree from the Indian Institute of Technology, Kharagpur in 2017. At present, I am finishing up my doctorate at the University of Texas at Austin, where my research focus is designing energy-efficient, robust machine learning algorithms for generative AI edge applications.
I have a pet cat, Oliver. He is quite chonky 😄 and a very good boy. Check out his Instagram.
I work on making generative AI cheap enough to run where it is needed: on phones, cars, image sensors and microcontrollers. My papers sit where number formats, compression and hardware meet.
| Thread | Focus | Papers |
|---|---|---|
| Post-training quantization & number formats | Choosing the format, not just the scale: INT, FP8, MX and NF4 formats picked per weight channel and per diffusion timestep, with no retraining. | Chameleon, EntroLLM |
| Entropy-coded model compression | Bits that are cheaper to move: entropy-reducing quantization, Huffman coding and parallel decoding for bandwidth-starved devices. | EntroLLM, EntroMCU, OASIS, in-sensor compression |
| Hardware–algorithm co-design | From kernels to microcontrollers: ternary GEMM kernels, KV-aware SRAM/Flash management for LLMs on Cortex-M, and multiplication-free log-domain training. | EntroMCU, log-domain training |
| Efficient perception: in-sensor & video | Compute where the data is born: in-sensor encoders that compress representations on-chip, and real-time neuro-symbolic video understanding. | OASIS, in-sensor compression, RT-NeuS |
- Chameleon: Dynamic Format Adapter for Efficient Diffusion
Arnab Sanyal, Sandeep Chinchali · Preprint, under review, 2026
Project page · arXiv · Code - EntroLLM: Entropy Encoded Weight Compression for Efficient Large Language Model Inference on Edge Devices
Arnab Sanyal, Gourav Datta, Prithwish Mukherjee, Sandeep P. Chinchali, Michael Orshansky · ICASSP 2026
Project page · Paper · arXiv · Code - EntroMCU: A Hardware-Algorithm Vision for LLM Inference on Microcontrollers (invited)
Arnab Sanyal, Sandeep P. Chinchali, Gourav Datta · ISVLSI 2026
Paper · PDF - OASIS: Optimized Lightweight Autoencoder System for Distributed In-Sensor Computing
Chengwei Zhou, Sreetama Sarkar, Yuming Li, Arnab Sanyal, Md Abdullah-Al Kaiser, Sercan Aygun, Hassan Najafi, Gourav Datta · ISVLSI 2026
arXiv - RT-NeuS: Towards Real-Time Neuro-Symbolic Video Understanding via Adaptive Temporal Verification
Shawn Liang, Sahil Shah, Chengwei Zhou, S P Sharan, Harsh Goel, Arnab Sanyal, Sandeep Chinchali, Gourav Datta · NeuS 2026
arXiv - Hardware-Aware Learned Representation Compression for Distributed In-Sensor Vision
Chengwei Zhou, Abu Masum, Xuming Chen, Mehran Moghadam, Sreetama Sarkar, Arnab Sanyal, Md Abdullah-Al Kaiser, M. Hassan Najafi, Sercan Aygun, Gourav Datta · IEEE TETC, under review
arXiv - Neural Network Training with Approximate Logarithmic Computations
Arnab Sanyal, Peter A. Beerel, Keith M. Chugg · ICASSP 2020
Project page · Paper · arXiv · Code · Talk
| Role | Highlights | |
|---|---|---|
| Cruise LLC, General Motors Nov 2025 – present |
Senior ML Engineer II | Build, enhance and deploy the ML compiler pipeline for autonomous-vehicle hardware accelerators, enabling full self-driving. |
| Xilinx, AMD Inc. Feb 2024 – Sep 2025 |
Member of Technical Staff | Scalable, robust kernels for generative AI models on AMD's AI Engine; ONNX graph optimizations and MLIR generation. |
| Qualcomm AI Research Feb 2023 – Feb 2024 |
Senior ML Engineer | Compiler stack for the Hexagon Tensor Processor, bringing generative AI to the edge. |
| Amazon Lab126 Sep 2020 – Nov 2022 |
SysDE ML Compiler Engineer I | Founding team of the AZ1 Neural Edge Processor; software stack for on-device inference such as local voice processing. |
| MediaTek Research May 2020 – Aug 2020 |
Research Intern | Reduced training and inference complexity for RNNs/LSTMs on accelerator architectures. |
- Efficient AI: post-training quantization, FP8 / MX / INT4 / NF4 formats, quantization-aware training, GPTQ · AWQ · SmoothQuant, mixed precision, entropy & Huffman coding, pruning, distillation, KV-cache optimization, logarithmic number systems
- ML compilers: MLIR, StableHLO, LLVM, TVM, XLA, torch.compile / Dynamo / Inductor, torch.fx, ONNX graph optimization, ExecuTorch
- Kernels & accelerators: CUDA, Triton, AMD AI Engine, Qualcomm Hexagon HTP / HVX, Amazon AZ1 NPU, Arm Cortex-M (CMSIS-NN, Helium), NVIDIA Jetson, FPGA (Verilog, HLS)
- Frameworks: PyTorch, TensorFlow, ONNX Runtime, TensorRT, Hugging Face Transformers & Diffusers
- Languages: Python, C++, C, CUDA, Shell, MATLAB, Java, Assembly (AVR, ARM, MIPS), LaTeX
- Website Chair, IEEE Workshop on Signal Processing Systems (SiPS 2027)
- Reviewer: CVPR, ICML (2026) · ICASSP, WACV, ISLPED (2025) · VLSID (2023) · PATMOS (2019) · RAW, FCCM (2018) · H2RC, IA3 (2017)
- Judge (chair), USC ECE Deep Learning Symposium, 2019 and 2020
More on arnabsanyal.com: talks, education, affiliations, honors and awards.