docs(adr): formalize two-stage EL2 bootstrap to EL1h kernel transition

[aien-dev]

Summary

Formalizes ADR 0009 defining the exception level architecture and execution transition for Milestone 3 (Kernel Isolation):

• Resolves the architectural contradiction between firmware entry at EL2 and kernel supervisor operations targeting EL1 translation and exception registers.
• Establishes a strict two-stage hierarchy:
  1. UEFI Firmware hands off to minimal early handoff stub at EL2.
  2. Minimal EL2 bootstrap stub configures EL2 registers (HCR_EL2, CPTR_EL2, CNTHCTL_EL2, CPACR_EL1), sets SPSR_EL2 = 0x3c5 (EL1h, SP_EL1, DAIF masked), sets ELR_EL2 to the kernel entrypoint, and executes eret.
  3. AIENOS Kernel Core executes strictly at EL1h, owning VBAR_EL1, TCR_EL1/TTBR0_EL1/MAIR_EL1 page tables, GICv3 CPU interface, and task scheduler.
• Establishes the implementation precondition: The EL2 to EL1h transition must be implemented and QEMU-verified before mmu.rs page tables are introduced.

Security Invariant

• NO PLAINTEXT SECRETS IN REPOSITORY OR BUILD ARTIFACTS.
• Zero Unslop: Zero em dashes, zero en dashes.