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Add dummy file to test jenkins. Signed-off-by: Chao Song <chao.song@linux.intel.com>
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aiChaoSONG
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Dec 14, 2022
Update READY_IPC value based on changes regarding MU reset. READY_IPC value comes from: - clear GP pending interrupt #0 and #1 from MU's xSR register; - enable GP #0 and #1 for Host -> DSP and DSP -> Host message notification from MU's xCR register; - now interrupt host to tell it we are done booting by setting GIRn bit in MU's xCR register. So, "00 00 00 c0 00 00 04 c0" is the MU's xSR and xCR registers: xSR: c0000000 and xCR: c0040000 Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
aiChaoSONG
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Jan 30, 2023
Multiple pipelines had incorrect num_audio_formats leading to invalid format structures ending up to topology. Example FW trace: [ 1601.624195] sof-audio-pci-intel-tgl 0000:00:1f.3: Get input audio formats for copier.module.8.2 [ 1601.624197] sof-audio-pci-intel-tgl 0000:00:1f.3: #0: 48000KHz, 32bit (ch_map 0xffffff10 ch_cfg 1 interleaving_style 0 fmt_cfg 0x2002) [ 1601.624201] sof-audio-pci-intel-tgl 0000:00:1f.3: #1: 0KHz, 0bit (ch_map 0x0 ch_cfg 0 interleaving_style 0 fmt_cfg 0x0) Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
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Add dummy file to test jenkins.
Signed-off-by: Chao Song chao.song@linux.intel.com