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Update 10BaseT PHY integration. Fix Ethernet MAC a bit. Add some tests. CI #22: Commit 2081f9b pushed by egorxe
36m 7s main
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36m 7s
Add MII mux (not tested) CI #21: Commit b1d886a pushed by egorxe
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4m 1s
Add zTimer constraints. Update Cabrera GDS (cabrera_260714). CI #20: Commit 6507bd5 pushed by egorxe
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4m 5s
ztimer, sram sim files added to cococtb for sim CI #19: Commit 7b59093 pushed by snapaa257
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4m 31s
Add precheck-clean GDS with non fuctional timer & 10BaseT PHY. Workin… CI #18: Commit 9682460 pushed by egorxe
3m 28s main
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3m 28s
4 ring oscillator macros added, spi wrapped on it CI #17: Commit dd95fda pushed by snapaa257
3m 16s main
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3m 16s
fixed writer_slot value to 0, allowing multiple rx transaction withou… CI #16: Commit 8141e96 pushed by snapaa257
8m 27s main
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8m 27s
PHY ip breaks, causing lvs issues CI #15: Commit 964db59 pushed by snapaa257
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8m 39s
Increase zTimer area. Add PND obstruction to remove superfluous vias … CI #14: Commit 92a38ce pushed by egorxe
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10m 11s
ztimer pad config, start&stop analog pins CI #13: Commit 14f91e1 pushed by snapaa257
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5m 28s
Add register to WB to fix timing & OR optimization crash. Reassign zt… CI #12: Commit 0814588 pushed by egorxe
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4m 6s
Update PDK & template. Revert Caravel to the Run1 GDS. Add Ethernet M… CI #11: Commit 8fb47a5 pushed by egorxe
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4m 27s
EthernetMac added, 1 SRAM instance added, pdn issue CI #10: Commit 8416dde pushed by snapaa257
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53m 27s
flash_spi added CI #9: Commit b7e1c4e pushed by snapaa257
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53m 30s
ztimer added CI #8: Commit 2168c7f pushed by snapaa257
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51m 49s
Regenerate caravel soc core for the QSPI. CI #7: Commit 10448ce pushed by egorxe
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1h 56m 52s
fix: updated ci.yml to run make all CI #6: Commit f1d5dbf pushed by snapaa257
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1h 19m 54s
slot set to 1x0p5 CI #5: Commit 2e9f5ad pushed by snapaa257
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13m 57s
clock period set to 20MHz CI #4: Commit 6d5243d pushed by snapaa257
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ci updated CI #3: Commit d919d46 pushed by snapaa257
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Initial commit CI #2: Commit e493b52 pushed by snapaa257
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Initial commit CI #1: Commit cbb4b5c pushed by ZeduloAdmin
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3h 13m 33s