build(deps): bump llvm-project from d8404a0 to 9e603b7#291
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github-actions[bot] merged 1 commit intoMay 22, 2026
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Bumps [llvm-project](https://github.com/Xilinx/llvm-aie) from `d8404a0` to `9e603b7`. - [Release notes](https://github.com/Xilinx/llvm-aie/releases) - [Commits](Xilinx/llvm-aie@d8404a0...9e603b7) --- updated-dependencies: - dependency-name: llvm-project dependency-version: 9e603b765b27cae1566a02965eb0152640199850 dependency-type: direct:production ... Signed-off-by: dependabot[bot] <support@github.com>
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Bumps llvm-project from
d8404a0to9e603b7.Commits
9e603b7[AIE][NFC] Cache latch exit condition analysis in outer loop pipeliner6746a64[AIE] Fix loop bound adjustment and restrict HW loop to unit-decrement stepc5f3b91[AIE] Enable HL by default in AIEOuterLoopPipelinerb6cddea[AIE2PS] Fixup L spill test to not use CSR register for return0310752[AIE2PS] Save CSR L registers as individual GPRs when only of the pair member...17fcd85[AIE2PS] Fix alignment of 64-bit spills82f890f[AIE2PS] Explicitly set l registers as callee saved4bf9387[AIE2PS] Add l register spill-reload testDependabot will resolve any conflicts with this PR as long as you don't alter it yourself. You can also trigger a rebase manually by commenting
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