[ci] pin llvm-aie to last known-good nightly (temporary, revert when llvm-aie#1005 lands)#1617
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erwei-xilinx merged 1 commit intoMay 19, 2026
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Pull request overview
Pins llvm-aie to the last known-good nightly to unblock Ryzen AI CI runs affected by an llc assertion failure introduced in the 2026-05-16 nightly, with inline “TEMPORARY” comments pointing to the upstream fix PR for later reversion.
Changes:
- Pin
llvm-aieto21.0.0.2026051501+f4933ef7in the Ryzen AI CI workflow. - Pin the same
llvm-aienightly in the developer wheel-based build script, with rationale and revert guidance.
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| File | Description |
|---|---|
| utils/build-mlir-air-using-wheels.sh | Pins llvm-aie nightly in the local wheel-install build path with context for reverting. |
| .github/workflows/buildAndTestRyzenAI.yml | Pins llvm-aie nightly in CI to prevent llc crashes on Ryzen AI runners. |
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…llvm-aie#1005 lands) Nightly llvm-aie 2026-05-16 onwards (commit 55604435 and later) crash llc on legitimate non-pipelined single-MBB loops via an assert in AIELoopUtils::findPrologueEpilogue, blocking 9+ Ryzen AI xrt tests on both NPU Phoenix and NPU Strix. Pin to the last known-good nightly (2026-05-15, f4933ef7) in both the Ryzen AI CI workflow and the developer wheel-install script until the upstream fix lands. See Xilinx/llvm-aie#1005 for the root cause and fix. Revert this commit once a clean llvm-aie nightly is published. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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May 21, 2026
llvm-aie#1005 was merged 2026-05-19 and the fix is in nightly 21.0.0.2026052001+5ed15934 (first nightly built after the merge). All 9 npu1 xrt tests that failed in Xilinx#1617 (02_mul_shim_1x1, 03_mul_L1L2_1x1, 06_add_shim_bf16, 07_extern_linalg, 28_gemm_loop_nest_bf16, 29_gemm_4_level_tiling_extern_vec_4x4_bf16, 34_cascade_vecadd, 36_cascade_vecmat_i32, 38_cascade_vecmat_transform_2x4_i32) pass locally with the new nightly. Revert both install sites pinned in Xilinx#1617 to unpinned \`llvm-aie\`. Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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Summary
Temporary workaround. Pin
llvm-aie(Peano) to the last known-good nightly to unblock Ryzen AI CI while Xilinx/llvm-aie#1005 (the upstream fix) is in review.Root cause
Nightly
llvm-aie==21.0.0.2026051601+55604435(2026-05-16) introduced anllcassertion failure inAIELoopUtils::findPrologueEpiloguethat fires on legitimate non-pipelined single-MBB loops with multiple non-loop predecessors — a CFG pattern produced by every AIE kernel with an outer loop ending in a halt-spin self-edge. The assertion was added to a utility extracted from the pipeliner (where the precondition holds) and then reused from a new remark emitter that runs on every single-MBB loop. Full analysis in Xilinx/llvm-aie#1005.Bisect:
2026051501+f4933ef7(May 15)2026051601+55604435(May 16)Impact (currently blocking)
Reference failing CI run: actions/runs/26049388494.
Same crash on both runners (same
llcbinary, samefindPrologueEpiloguestack).Changes
Two install sites pinned with a
TEMPORARY:comment explaining the rationale and pointing at the upstream PR so future maintainers know to revert:Revert plan
Once Xilinx/llvm-aie#1005 lands and a fresh
llvm-aienightly publishes, revert this commit to restore the unpinned install.Test plan
2026051501+f4933ef7— that exact nightly was already shown to pass on main pre-regression (last green Ryzen run was May 14 with the same code path; bisect confirms May 15 nightly also good).🤖 Generated with Claude Code