I am an Erasmus Mundus Scholar (CyberMACS) specializing in the practical implementation of Post-Quantum Cryptography (PQC) on resource-constrained hardware. My research bridges the gap between high-level cryptographic theory and low-level architectural constraints.
- PQC on IoT: Optimized implementation of NIST standards (ML-KEM, ML-DSA) for the Xtensa LX6/LX7 (ESP32) architecture.
- Side-Channel Analysis (SCA): Using TVLA and power analysis to identify physical leakages in cryptographic hardware.
- The "Energy-Security Gap": Quantifying the trade-offs between PQC resilience and battery longevity in critical infrastructure.
- Languages: C, Python (SCA/Data Analysis).
- Frameworks: ESP-IDF, PQClean.
- Hardware: ESP32 Series.
- [pqc-vault]: A proof-of-concept secure storage enclave using hybrid PQC-AES pipelines.
- (Upcoming...) [pqc-xtensa-benchmarking]: Comprehensive performance and memory analysis of Kyber/Dilithium on ESP32.