docs: turbo4 4.125 bpw + Jun-2026 rematch writeup; pin 3/4-bit centroid values#96
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docs: turbo4 4.125 bpw + Jun-2026 rematch writeup; pin 3/4-bit centroid values#96TheTom wants to merge 2 commits into
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Research-repo counterpart to llama-cpp-turboquant#197. Factual fixes + a writeup + a regression test, no algorithm change (the Python reference was already correct).
Changes
norm(fp16) + 64 B indices = 66 B; the old number counted a phantomrnorm. (The C/CUDA port also dropped that dead field.)docs/turbo4-rematch-2026-06.md: the June-2026 turbo4 work + head-to-head vsspiritbuun/master(KLD/prefill/decode at 4.125 bpw), the centroid-port-bug story, PDL backport + fused-MMA decode, and the asymmetric q8_0-K + turbo4-V result (−26% KLD; "V is free" holds at 4-bit, breaks at 2-bit).tests/test_codebook.py: pin the exact 3-bit and 4-bit optimal centroids for d=128. The suite previously pinned 1-bit/2-bit but only sanity-checked 3/4-bit — exactly the gap that let a downstream C/CUDA port drift to a mis-scaled 4-bit table (outer 0.1739 vs correct 0.2402, ~2.1× excess MSE). Now any port can be checked against these.Notes
optimal_centroids.pytest tests/test_codebook.py→ 26 passed.