Severson-Group · elsevers · Jun 9, 2026 · Mar 11, 2026 · Mar 11, 2026 · Mar 12, 2026
@@ -20,30 +20,20 @@ This tool is analogous to the Xilinx SDK tool (for the AMDC). It is effectively
 
 To develop code for STM32 processors:
 
-#### Generating New Projects
+### Testing / Debugging Code
 
-1. Use the STM32CubeIDE to generate a new project
-2. When configuring this project, select the exact MCU device which you are targetting (the mainboard uses `STM32F765ZGT6`)
-3. Open the CubeMX perspective (i.e. `*.ioc` file) and configure all desired peripherals (SPIs, UARTs, ETH, etc)
-4. Change to the clock configuration tab and use the GUI to configure the PLL settings
-5. Generate initialization code to boot-strap your project. This will configure the clock and peripherals like you specified.
+1. Use the IDE to compile your code and ensure there are no errors.
+2. To flash the hardware, plug in a SWD debugger device to your PC + board (highly recommend [`STLINK-V3SET`](https://www.digikey.com/product-detail/en/stmicroelectronics/STLINK-V3SET/497-18216-ND/9636028))
+3. Configure a debug session in the IDE
+4. Run the debug sessions. This will flash the MCU and start the code (probably breakpoint at `main()`)
 
-#### Writing Code
-
-6. Now that you have a base project, write all your application-specific code...
-
-#### Testing / Debugging Code
-
-7. Use the IDE to compile your code and ensure there are no errors.
-8. To flash the hardware, plug in a SWD debugger device to your PC + board (highly recommend [`STLINK-V3SET`](https://www.digikey.com/product-detail/en/stmicroelectronics/STLINK-V3SET/497-18216-ND/9636028))
-9. Configure a debug session in the IDE
-10. Run the debug sessions. This will flash the MCU and start the code (probably breakpoint at `main()`)
+For more detailed instructions on programming the AMDS, please refer to the [AMDS Documentation](https://docs.amdc.dev/accessories/amds/index.html).
 
 NOTE: The STM32 devices are typically programmed into non-volatile memory. Therefore, there is no seperate "flashing" step. Every time you upload code, it is permanantely stored on the processor. You can power cycle the device and your code will start running again.
 
 ## Mainboard Firmware Design
 
-The mainboard firmware is fairly simple, yet very specialized for the application. Before changing *anything* in the code, make sure you understand how it works. Practically every line of the code is optimized for speed and efficiency! Using a multi-channel logic analyzer / oscilloscope is absolutely required when updating the mainboard firmware to validate code timing.
+The mainboard firmware is fairly simple, yet very specialized for the application. Before changing *anything* in the code, make sure you understand how it works. Practically every line of the code is optimized for speed and efficiency! Using a multi-channel logic analyzer / oscilloscope is absolutely required when updating the mainboard firmware to validate code timing. Please refer to the [Firmware Architecture Documentation](https://docs.amdc.dev/accessories/amds/firmware/index.html) for more information.
 
 **Do not blindly change the code.**
 

@@ -1,6 +1,8 @@
 .settings/language.settings.xml
 Debug/
 Release/
+AMDS/
+2S/
 scripts/__pycache__/
 *.o
 *.d

@@ -9,25 +9,25 @@ CDefines=USE_HAL_DRIVER;STM32F765xx;USE_HAL_DRIVER;USE_HAL_DRIVER;
 [PreviousGenFiles]
 AdvancedFolderStructure=true
 HeaderFileListSize=7
-HeaderFiles#0=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Inc/gpio.h
-HeaderFiles#1=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Inc/i2c.h
-HeaderFiles#2=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Inc/spi.h
-HeaderFiles#3=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Inc/usart.h
-HeaderFiles#4=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Inc/stm32f7xx_it.h
-HeaderFiles#5=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Inc/stm32f7xx_hal_conf.h
-HeaderFiles#6=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Inc/main.h
+HeaderFiles#0=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Inc/gpio.h
+HeaderFiles#1=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Inc/i2c.h
+HeaderFiles#2=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Inc/spi.h
+HeaderFiles#3=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Inc/usart.h
+HeaderFiles#4=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Inc/stm32f7xx_it.h
+HeaderFiles#5=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Inc/stm32f7xx_hal_conf.h
+HeaderFiles#6=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Inc/main.h
 HeaderFolderListSize=1
-HeaderPath#0=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Inc
+HeaderPath#0=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Inc
 HeaderFiles=;
 SourceFileListSize=7
-SourceFiles#0=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Src/gpio.c
-SourceFiles#1=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Src/i2c.c
-SourceFiles#2=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Src/spi.c
-SourceFiles#3=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Src/usart.c
-SourceFiles#4=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Src/stm32f7xx_it.c
-SourceFiles#5=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Src/stm32f7xx_hal_msp.c
-SourceFiles#6=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Src/main.c
+SourceFiles#0=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Src/gpio.c
+SourceFiles#1=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Src/i2c.c
+SourceFiles#2=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Src/spi.c
+SourceFiles#3=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Src/usart.c
+SourceFiles#4=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Src/stm32f7xx_it.c
+SourceFiles#5=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Src/stm32f7xx_hal_msp.c
+SourceFiles#6=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Src/main.c
 SourceFolderListSize=1
-SourcePath#0=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/motherboard_v1/Core/Src
+SourcePath#0=C:/Users/npetersen2/STM32CubeIDE/workspace_1.3.0/mainboard/Core/Src
 SourceFiles=;
 
@@ -1,6 +1,6 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <projectDescription>
-	<name>motherboard_v1</name>
+	<name>mainboard</name>
 	<comment></comment>
 	<projects>
 	</projects>

@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+sfrviewstate={"fFavorites"\:{"fLists"\:{}},"fProperties"\:{"fNodeProperties"\:{}}}
@@ -0,0 +1,4 @@
+2F62501ED4689FB349E356AB974DBE57=DB4D67F16CA069769A3F87733D593AF2
+8DF89ED150041C4CBC7CB9A9CAA90856=DB4D67F16CA069769A3F87733D593AF2
+DC22A860405A8BF2F2C095E5B6529F12=D1E96F3EE32E2AB2CF91940507FB3624
+eclipse.preferences.version=1
@@ -0,0 +1,9 @@
+#ifndef ADC_H
+#define ADC_H
+
+#include <stdint.h>
+
+void adc_init(void);
+
+
+#endif // ADC_H
@@ -0,0 +1,151 @@
+#ifndef DRV_UART_H
+#define DRV_UART_H
+
+// BENCHMARK MODE FLAG for DMA
+//#define BENCHMARK_MODE
+
+#include "platform.h"
+#include <stdint.h>
+#include <stdbool.h>
+
+void drv_uart_init(void);
+
+extern UART_HandleTypeDef huart2;
+extern UART_HandleTypeDef huart3;
+
+extern UART_HandleTypeDef DAISY_RX1_UART;
+extern UART_HandleTypeDef DAISY_RX2_UART;
+
+extern DMA_HandleTypeDef hdma_uart4_rx;
+extern DMA_HandleTypeDef hdma_uart5_rx;
+
+extern DMA_HandleTypeDef hdma_uart6_rx;
+extern DMA_HandleTypeDef hdma_uart1_rx;
+
+typedef enum {
+    STATE_IDLE,
+    STATE_GOT_HEADER,
+    STATE_GOT_MSB
+} rx_state_t;
+
+typedef struct {
+    rx_state_t state;
+    uint8_t header;
+    uint8_t data[2];
+    uint8_t read_index;
+} uart_rx_tracker_t;
+
+extern uart_rx_tracker_t tracker1;
+extern uart_rx_tracker_t tracker2;
+
+#define AMDS_RX_BUF_SIZE 256 // Must be 256 for uint8_t indexing and wrap-around logic to work correctly
+extern uint8_t DAISY_RX1_Pool[AMDS_RX_BUF_SIZE];
+extern uint8_t DAISY_RX2_Pool[AMDS_RX_BUF_SIZE];
+
+#ifdef BENCHMARK_MODE
+extern volatile uint8_t mock_dma_write_head;
+#endif
+
+// Declare the global flag so all .c files know it exists
+extern volatile bool is_routing_active;
+
+bool drv_uart_has_dma_data(void);
+
+#define GPIO_TOGGLE_PIN(port, pin) ((port)->BSRR = ((port)->ODR & (pin)) ? ((pin) << 16) : (pin))
+
+void process_routing(void);
+
+/**
+ * Thread-safe, non-blocking wrapper for process_routing().
+ * Uses an atomic try-lock to prevent reentrancy without 
+ * stalling the CPU or blinding interrupts for too long.
+ */
+static inline void try_process_routing(void) {
+    // 1. Enter brief critical section (approx. 3 CPU cycles)
+    __disable_irq();
+
+    // 2. Check if the lock is already claimed
+    if (is_routing_active) {
+        // Someone else is already routing. Safely abort.
+        __enable_irq();
+        return; 
+    }
+
+    // 3. Claim the lock
+    is_routing_active = true;
+
+    // 4. Exit critical section BEFORE the heavy lifting
+    __enable_irq(); 
+
+    // 5. Perform the actual routing with interrupts perfectly active
+    process_routing();
+
+    // 6. Release the lock when finished
+    // (This single write is inherently atomic on a 32-bit ARM core, 
+    // so we don't need to disable interrupts just to clear it).
+    is_routing_active = false;
+}
+
+/**
+ * Attempt to instantly reset the routing state machine and flush buffers.
+ * To be called ONLY from the very beginning of EXTI3_IRQHandler.
+ */
+static inline void try_reset_routing_state(void) {
+    // Because we are inside an IRQ, we preempted main(). 
+    // We do NOT need to disable interrupts here to check the flag safely.
+    if (!is_routing_active) {
+
+        // 1. Reset state machines to gracefully await the next packet
+        tracker1.state = STATE_IDLE;
+        tracker2.state = STATE_IDLE;
+
+        // 2. Soft-flush the DMA buffers.
+        // We advance our read pointers to exactly where the DMA hardware 
+        // is currently writing. All old, unprocessed bytes are instantly discarded.
+#ifdef BENCHMARK_MODE
+        tracker1.read_index = mock_dma_write_head;
+        tracker2.read_index = mock_dma_write_head;
+#else
+        tracker1.read_index = (uint8_t)(AMDS_RX_BUF_SIZE - __HAL_DMA_GET_COUNTER(DAISY_RX1_UART.hdmarx));
+        tracker2.read_index = (uint8_t)(AMDS_RX_BUF_SIZE - __HAL_DMA_GET_COUNTER(DAISY_RX2_UART.hdmarx));
+#endif
+    }
+}
+
+static inline void drv_uart_putc_fast(USART_TypeDef *uart, uint8_t data)
+{
+    // Wait until UART is ready to accept next character
+    while (!(uart->ISR & UART_FLAG_TXE)) {
+        asm("nop");
+    }
+
+    // Load the TDR register to send a character
+    uart->TDR = data;
+}
+
+static inline void drv_uart_wait_TC(USART_TypeDef *uart)
+{
+    // ONLY USE THIS IF DISABLING THE UART OR GOING TO SLEEP!
+    // This function waits for all data to be sent from the USART
+    //    (it waits for both the TDR and the Shift Register to be
+    //     completely empty)
+    //
+    // Do NOT USE THIS during normal continuous data transmission
+    //       as it will add significant delays
+    while (!(uart->ISR & UART_FLAG_TC)) {
+        asm("nop");
+    }
+}
+
+static inline void drv_uart_send_fast(USART_TypeDef *uart, uint8_t *data, uint16_t len)
+{
+    while (len > 0) {
+        drv_uart_putc_fast(uart, *data);
+        data++;
+        len--;
+    }
+
+    drv_uart_wait_TC(uart);
+}
+
+#endif // DRV_UART_H
@@ -151,6 +151,7 @@
 #define  USE_RTOS                     0U
 #define  PREFETCH_ENABLE              0U
 #define  ART_ACCLERATOR_ENABLE        0U /* To enable instruction cache and prefetch */
+#define  USE_HAL_UART_REGISTER_CALLBACKS    1U /* UART register callback disabled    */
 
 /* ########################## Assert Selection ############################## */
 /**
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1,2 @@
		eclipse.preferences.version=1
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