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Merged
fjmolinas merged 2 commits into from
Dec 20, 2019
Merged

cpu/fe310: slightly rework the uart driver #12917

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e5c64c7
cpu/fe310: rework uart driver implem/config
aabadie Dec 5, 2019
8768242
boards/hifive1*: apply new UART configuration scheme
aabadie Dec 5, 2019
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6 changes: 0 additions & 6 deletions boards/hifive1/board.c
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Original file line number Diff line number Diff line change
Expand Up @@ -117,12 +117,6 @@ void board_init(void)
cpu_init();
board_init_clock();

/* Configure pin muxing for UART0 */
GPIO_REG(GPIO_OUTPUT_VAL) |= IOF0_UART0_MASK;
GPIO_REG(GPIO_OUTPUT_EN) |= IOF0_UART0_MASK;
GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;

/* Configure GPIOs for LEDs */
gpio_init(LED0_PIN, GPIO_OUT);
gpio_init(LED1_PIN, GPIO_OUT);
Expand Down
35 changes: 25 additions & 10 deletions boards/hifive1/include/periph_conf.h
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Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2017 Ken Rabold
* 2019 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
Expand All @@ -19,6 +20,8 @@
#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H

#include "periph_cpu.h"

#ifdef __cplusplus
extern "C" {
#endif
Expand Down Expand Up @@ -49,6 +52,28 @@ extern "C" {
#define TIMER_NUMOF (1)
/** @} */

/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.addr = UART0_CTRL_ADDR,
.rx = GPIO_PIN(0, 16),
.tx = GPIO_PIN(0, 17),
.isr_num = INT_UART0_BASE,
},
{
.addr = UART1_CTRL_ADDR,
.rx = GPIO_PIN(0, 18),
.tx = GPIO_PIN(0, 23),
.isr_num = INT_UART1_BASE,
},
};

#define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */

/**
* @name RTT/RTC configuration
*
Expand Down Expand Up @@ -76,16 +101,6 @@ extern "C" {
#define PWM_NUMOF (3)
/** @} */

/**
* @name UART configuration
*
* @{
*/
#define UART_NUMOF (2)
#define UART0_RX_INTR_PRIORITY (2)
#define UART1_RX_INTR_PRIORITY (2)
/** @} */

#ifdef __cplusplus
}
#endif
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6 changes: 0 additions & 6 deletions boards/hifive1b/board.c
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Original file line number Diff line number Diff line change
Expand Up @@ -139,12 +139,6 @@ void board_init(void)
board_init_clock();
// board_init_flash();

/* Configure pin muxing for UART0 */
GPIO_REG(GPIO_OUTPUT_VAL) |= IOF0_UART0_MASK;
GPIO_REG(GPIO_OUTPUT_EN) |= IOF0_UART0_MASK;
GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;

/* Configure GPIOs for LEDs */
gpio_init(LED0_PIN, GPIO_OUT);
gpio_init(LED1_PIN, GPIO_OUT);
Expand Down
36 changes: 26 additions & 10 deletions boards/hifive1b/include/periph_conf.h
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Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2019 Ken Rabold
* 2019 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
Expand All @@ -14,11 +15,14 @@
* @brief Peripheral specific definitions for the HiFive1b RISC-V board
*
* @author Ken Rabold
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*/

#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H

#include "periph_cpu.h"

#ifdef __cplusplus
extern "C" {
#endif
Expand Down Expand Up @@ -49,6 +53,28 @@ extern "C" {
#define TIMER_NUMOF (1)
/** @} */

/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.addr = UART0_CTRL_ADDR,
.rx = GPIO_PIN(0, 16),
.tx = GPIO_PIN(0, 17),
.isr_num = INT_UART0_BASE,
},
{
.addr = UART1_CTRL_ADDR,
.rx = GPIO_PIN(0, 18),
.tx = GPIO_PIN(0, 23),
.isr_num = INT_UART1_BASE,
},
};

#define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */

/**
* @name RTT/RTC configuration
*
Expand Down Expand Up @@ -76,16 +102,6 @@ extern "C" {
#define PWM_NUMOF (3)
/** @} */

/**
* @name UART configuration
*
* @{
*/
#define UART_NUMOF (2)
#define UART0_RX_INTR_PRIORITY (2)
#define UART1_RX_INTR_PRIORITY (2)
/** @} */

#ifdef __cplusplus
}
#endif
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5 changes: 5 additions & 0 deletions cpu/fe310/include/cpu.h
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Original file line number Diff line number Diff line change
Expand Up @@ -25,8 +25,13 @@
#ifndef CPU_H
#define CPU_H

#include <inttypes.h>

#include "thread.h"

#include "vendor/platform.h"
#include "vendor/plic_driver.h"

#ifdef __cplusplus
extern "C" {
#endif
Expand Down
37 changes: 37 additions & 0 deletions cpu/fe310/include/periph_cpu.h
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Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,10 @@
#ifndef PERIPH_CPU_H
#define PERIPH_CPU_H

#include <inttypes.h>

#include "cpu.h"

#ifdef __cplusplus
extern "C" {
#endif
Expand All @@ -28,6 +32,39 @@ extern "C" {
*/
#define CPUID_LEN (12U)

#ifndef DOXYGEN
/**
* @brief Overwrite the default gpio_t type definition
*/
#define HAVE_GPIO_T
typedef uint8_t gpio_t;
#endif

/**
* @brief Definition of a fitting UNDEF value
*/
#define GPIO_UNDEF (0xff)

/**
* @brief Define a CPU specific GPIO pin generator macro
*/
#define GPIO_PIN(x, y) (x | y)

/**
* @brief Structure for UART configuration data
*/
typedef struct {
uint32_t addr; /**< UART control register address */
gpio_t rx; /**< RX pin */
gpio_t tx; /**< TX pin */
plic_source isr_num; /**< ISR source number */
} uart_conf_t;

/**
* @brief UART interrupt priority
*/
#define UART_ISR_PRIO (2)

/**
* @brief Prevent shared timer functions from being used
*/
Expand Down
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