When batch running checkpoints using the specified version of gem5, approximately 9 out of 500 checkpoints failed the difftest. Upon examining the relevant logs, all failures point to the instruction csrrw tp, mscratch, tp, suggesting a potential issue with its implementation.
I have not yet had time to investigate the specific cause.
Diff at PC, NEMU: 0xffffffff801f3c18, GEM5: 0x801004f8
GEM5 pc: 0x801004f8, NEMU npc: 0xffffffff801f3c1c
Diff at ESC[31mmstatusESC[0m Ref value: ESC[31m0xa000000a0ESC[0m, GEM5 value: ESC[31m0xa00000820ESC[0m
Diff at ESC[31mprivESC[0m Ref value: ESC[31m0x1ESC[0m, GEM5 value: ESC[31m0x3ESC[0m
Diff at ESC[31mmcauseESC[0m Ref value: ESC[31m0x9ESC[0m, GEM5 value: ESC[31m0x2ESC[0m
Inst [sn:416504] pc: 0x801004f8
Diff at ESC[31mtpESC[0m Ref value: ESC[31m0xffffffd8802c0a40ESC[0m, GEM5 value: ESC[31m0x80148000ESC[0m
In CPU0: NEMU PC: 0xffffffff801f3c18, GEM5 PC: 0x801004f8, inst: csrrw tp, mscratch, tp
---------------- Intger Registers ----------------
$0: 0x0000000000000000 ra: 0xffffffff801f3ef8 sp: 0xffffffc800343a40 gp: 0xffffffff81046720
tp: 0xffffffd8802c0a40 t0: 0xffffffd8802c1438 t1: 0xffffffd8802c1030 t2: 0x0000000000000001
s0: 0xffffffc800343b20 s1: 0x0000000000000001 a0: 0xffffffff8107bb10 a1: 0xffffffc800343c40
a2: 0x0000000000000008 a3: 0x0000000000000109 a4: 0x0000000000000001 a5: 0x0000000000000000
a6: 0x0000000000000000 a7: 0x00000000000000b5 s2: 0xffffffc800343a40 s3: 0x00000000c0000000
s4: 0xffffffff8107bb10 s5: 0xffffffc800343a40 s6: 0xffffffc800343a68 s7: 0xffffffc800343a88
s8: 0x0000000080000000 s9: 0xffffffff8103e0b6 s10: 0x0000000000000004 s11: 0x0000000000000001
t3: 0x00000000ffffffff t4: 0x00000000000007e0 t5: 0x00000000000007e0 t6: 0x0000000000000e6f
---------------- Float Registers ----------------
ft0: 0x0000000000000000 ft1: 0x0000000000000000 ft2: 0x0000000000000000 ft3: 0x0000000000000000
ft4: 0x0000000000000000 ft5: 0x0000000000000000 ft6: 0x0000000000000000 ft7: 0x0000000000000000
fs0: 0x0000000000000000 fs1: 0x0000000000000000 fa0: 0x0000000000000000 fa1: 0x0000000000000000
fa2: 0x0000000000000000 fa3: 0x0000000000000000 fa4: 0x0000000000000000 fa5: 0x0000000000000000
fa6: 0x0000000000000000 fa7: 0x0000000000000000 fs2: 0x0000000000000000 fs3: 0x0000000000000000
fs4: 0x0000000000000000 fs5: 0x0000000000000000 fs6: 0x0000000000000000 fs7: 0x0000000000000000
fs8: 0x0000000000000000 fs9: 0x0000000000000000 fs10: 0x0000000000000000 fs11: 0x0000000000000000
ft8: 0x0000000000000000 ft9: 0x0000000000000000 ft10: 0x0000000000000000 ft11: 0x0000000000000000
fcsr: 0x0000000000000000 fflags: 0x0000000000000000 frm: 0x0000000000000000
---------------- Privileged CSRs ----------------
pc: 0xffffffff801f3c1c privilege mode: S (mode: 1 v: 0 debug: 0)
mstatus: 0x0000000a000000a0 sstatus: 0x0000000200000020 vsstatus: 0x0000000200000000
hstatus: 0x0000000200000000
mcause: 0x0000000000000009 mepc: 0xffffffff8026a932 mtval: 0x0000000000000000
scause: 0x0000000000000008 sepc: 0x00000000000d9f40 stval: 0x0000000000000000
vscause: 0x0000000000000000 vsepc: 0x0000000000000000 vstval: 0x0000000000000000
mtval2: 0x0000000000000000 htval: 0x0000000000000000
mtinst: 0x0000000000000000 htinst: 0x0000000000000000
mscratch: 0x0000000080148000 sscratch: 0x0000000000000000 vsscratch: 0x0000000000000000
mtvec: 0x00000000801004f8 stvec: 0xffffffff8026a910 vstvec: 0x0000000000000000
mip: 0x0000000000000000 mie: 0x000000000000020a
mideleg: 0x0000000000001666 medeleg: 0x0000000000f0b509
hideleg: 0x0000000000000000 hedeleg: 0x0000000000000000
satp: 0x8005c0000013b104 hgatp: 0x0000000000000000 vsatp: 0x0000000000000000
mcounteren: 0x00000000ffffffff scounteren: 0x0000000000000007 hcounteren: 0x0000000000000000
---------------- PMP CSRs ----------------
pmp: 16 entries active, details:
0: cfg:0x18 addr:0x000000000e001fff| 1: cfg:0x18 addr:0x0000000020053fff
2: cfg:0x18 addr:0x0000000020047fff| 3: cfg:0x1b addr:0x000000000f7fffff
4: cfg:0x1f addr:0x00000003ffffffff| 5: cfg:0x00 addr:0x0000000000000000
6: cfg:0x00 addr:0x0000000000000000| 7: cfg:0x00 addr:0x0000000000000000
8: cfg:0x00 addr:0x0000000000000000| 9: cfg:0x00 addr:0x0000000000000000
10: cfg:0x00 addr:0x0000000000000000|11: cfg:0x00 addr:0x0000000000000000
12: cfg:0x00 addr:0x0000000000000000|13: cfg:0x00 addr:0x0000000000000000
14: cfg:0x00 addr:0x0000000000000000|15: cfg:0x00 addr:0x0000000000000000
---------------- Vector Registers ----------------
v0 : 0x4946434c2e09676e_6f6c2e090a347830 v1 : 0x090a303435314946_434c2e2d31343531
v2 : 0x62656c752e090a65_783009657479622e v3 : 0x09657479622e090a_3832783020383231
v4 : 0x302038323162656c_752e090a63387830 v5 : 0x2e090a3478300965_7479622e090a3578
v6 : 0x2e2d323435314946_434c2e09676e6f6c v7 : 0x09657479622e090a_313435314946434c
v8 : 0x0000000000000000_0000000000000000 v9 : 0x0000000000000000_0000000000000000
v10: 0x0000000000000000_0000000000000000 v11: 0x0000000000000000_0000000000000000
v12: 0x0000000000000000_0000000000000000 v13: 0x0000000000000000_0000000000000000
v14: 0x0000000000000000_0000000000000000 v15: 0x0000000000000000_0000000000000000
v16: 0x0000000000000000_0000000000000000 v17: 0x0000000000000000_0000000000000000
v18: 0x0000000000000000_0000000000000000 v19: 0x0000000000000000_0000000000000000
v20: 0x0000000000000000_0000000000000000 v21: 0x0000000000000000_0000000000000000
v22: 0x0000000000000000_0000000000000000 v23: 0x0000000000000000_0000000000000000
v24: 0x0000000000000000_0000000000000000 v25: 0x0000000000000000_0000000000000000
v26: 0x0000000000000000_0000000000000000 v27: 0x0000000000000000_0000000000000000
v28: 0x0000000000000000_0000000000000000 v29: 0x0000000000000000_0000000000000000
v30: 0x0000000000000000_0000000000000000 v31: 0x0000000000000000_0000000000000000
vtype: 0x00000000000000c3 vstart: 0x0000000000000000 vxsat: 0x0000000000000000
vxrm: 0x0000000000000000 vl: 0x0000000000000080 vcsr: 0x0000000000000000
build/RISCV/cpu/base.cc:1565: warn: gem5-rRegsDisplay :
$0 : 0 ra : ffffffff801f3ef8 sp : ffffffc800343a40 gp : ffffffff81046720
ESC[31m tp : 80148000 ESC[0m t0 : ffffffd8802c1438 t1 : ffffffd8802c1030 t2 : 1
s0 : ffffffc800343b20 s1 : 1 a0 : ffffffff8107bb10 a1 : ffffffc800343c40
a2 : 8 a3 : 109 a4 : 1 a5 : 0
a6 : 0 a7 : b5 s2 : ffffffc800343a40 s3 : c0000000
s4 : ffffffff8107bb10 s5 : ffffffc800343a40 s6 : ffffffc800343a68 s7 : ffffffc800343a88
s8 : 80000000 s9 : ffffffff8103e0b6 s10 : 4 s11 : 1
t3 : ffffffff t4 : 7e0 t5 : 7e0 t6 : e6f
build/RISCV/cpu/base.cc:1578: warn: gem5-fRegsDisplay :
ft0 : 0 ft1 : 0 ft2 : 0 ft3 : 0
ft4 : 0 ft5 : 0 ft6 : 0 ft7 : 0
fs0 : 0 fs1 : 0 fa0 : 0 fa1 : 0
fa2 : 0 fa3 : 0 fa4 : 0 fa5 : 0
fa6 : 0 fa7 : 0 fs2 : 0 fs3 : 0
fs4 : 0 fs5 : 0 fs6 : 0 fs7 : 0
fs8 : 0 fs9 : 0 fs10 : 0 fs11 : 0
ft8 : 0 ft9 : 0 ft10 : 0 ft11 : 0
build/RISCV/cpu/base.cc:1629: warn: gem5-CsrDisplay :
pc : 801004f8 ESC[31mmstatus : a00000820ESC[0m ESC[31mmcause : 2ESC[0m ESC[31mmepc : ffffffff801f3c18ESC[0m
sstatus : 200000000 scause : 0 sepc : 0
satp : 0
mip : 0 mie : 0 mscratch: 0 sscratch: 0
mideleg : 1444 medeleg : 0
mtval : 0 stval : 0 mtvec : 0 stvec : 0
privilege mode : 3
build/RISCV/cpu/base.cc:1654: warn: gem5-VectorDisplay :
v00 : 4946434c2e09676e_6f6c2e090a347830 v01 : 090a303435314946_434c2e2d31343531
v02 : 62656c752e090a65_783009657479622e v03 : 09657479622e090a_3832783020383231
v04 : 302038323162656c_752e090a63387830 v05 : 2e090a3478300965_7479622e090a3578
v06 : 2e2d323435314946_434c2e09676e6f6c v07 : 09657479622e090a_313435314946434c
v08 : 0000000000000000_0000000000000000 v09 : 0000000000000000_0000000000000000
v10 : 0000000000000000_0000000000000000 v11 : 0000000000000000_0000000000000000
v12 : 0000000000000000_0000000000000000 v13 : 0000000000000000_0000000000000000
v14 : 0000000000000000_0000000000000000 v15 : 0000000000000000_0000000000000000
v16 : 0000000000000000_0000000000000000 v17 : 0000000000000000_0000000000000000
v18 : 0000000000000000_0000000000000000 v19 : 0000000000000000_0000000000000000
v20 : 0000000000000000_0000000000000000 v21 : 0000000000000000_0000000000000000
v22 : 0000000000000000_0000000000000000 v23 : 0000000000000000_0000000000000000
v24 : 0000000000000000_0000000000000000 v25 : 0000000000000000_0000000000000000
v26 : 0000000000000000_0000000000000000 v27 : 0000000000000000_0000000000000000
v28 : 0000000000000000_0000000000000000 v29 : 0000000000000000_0000000000000000
v30 : 0000000000000000_0000000000000000 v31 : 0000000000000000_0000000000000000
vtype : c3 vstart : 0 vxsat : 0
vxrm : 0 vl : 80 vcsr : 0
build/RISCV/cpu/base.hh:743: warn: start dump last 20 committed msg
build/RISCV/cpu/base.hh:746: warn: V [sn:416400 pc:0xffffffff801f3bb4] c_mv s4, a0
build/RISCV/cpu/base.hh:746: warn: V [sn:416401 pc:0xffffffff801f3bb6] sd zero, 8(s6), paddr: 0x138622a70
build/RISCV/cpu/base.hh:746: warn: V [sn:416402 pc:0xffffffff801f3bba] sd zero, 16(s6), paddr: 0x138622a78
build/RISCV/cpu/base.hh:746: warn: V [sn:416403 pc:0xffffffff801f3bbe] sd zero, 24(s6), paddr: 0x138622a80
build/RISCV/cpu/base.hh:746: warn: V [sn:416404 pc:0xffffffff801f3bc2] sd zero, 8(s7), paddr: 0x138622a90
build/RISCV/cpu/base.hh:746: warn: V [sn:416405 pc:0xffffffff801f3bc6] sd zero, 16(s7), paddr: 0x138622a98
build/RISCV/cpu/base.hh:746: warn: V [sn:416406 pc:0xffffffff801f3bca] sd zero, 24(s7), paddr: 0x138622aa0
build/RISCV/cpu/base.hh:746: warn: V [sn:416407 pc:0xffffffff801f3bce] sd zero, 8(s5), paddr: 0x138622a48
build/RISCV/cpu/base.hh:746: warn: V [sn:416408 pc:0xffffffff801f3bd2] sd zero, 16(s5), paddr: 0x138622a50
build/RISCV/cpu/base.hh:746: warn: V [sn:416409 pc:0xffffffff801f3bd6] sd zero, 24(s5), paddr: 0x138622a58
build/RISCV/cpu/base.hh:746: warn: V [sn:416410 pc:0xffffffff801f3bda] sd zero, 32(s5), paddr: 0x138622a60
build/RISCV/cpu/base.hh:746: warn: V [sn:416411 pc:0xffffffff801f3bde] c_mv s2, s5
build/RISCV/cpu/base.hh:746: warn: V [sn:416412 pc:0xffffffff801f3be0] c_slli s3, 30, res: 0xc0000000
build/RISCV/cpu/base.hh:746: warn: V [sn:416413 pc:0xffffffff801f3be2] c_li s11, 1, res: 0x1
build/RISCV/cpu/base.hh:746: warn: V [sn:416414 pc:0xffffffff801f3be4] slli s8, s1, 31, res: 0x80000000
build/RISCV/cpu/base.hh:746: warn: V [sn:416415 pc:0xffffffff801f3be8] c_li s10, 4, res: 0x4
build/RISCV/cpu/base.hh:746: warn: V [sn:416416 pc:0xffffffff801f3bea] auipc s9, 3658, res: 0xffffffff8103dbea
build/RISCV/cpu/base.hh:746: warn: V [sn:416417 pc:0xffffffff801f3bee] addi s9, s9, 1228, res: 0xffffffff8103e0b6
build/RISCV/cpu/base.hh:746: warn: V [sn:416418 pc:0xffffffff801f3bf2] jal zero, 38
build/RISCV/cpu/base.hh:746: warn: V [sn:416504 pc:0x801004f8] csrrw tp, mscratch, tp, res: 0x80148000
build/RISCV/cpu/base.cc:1532: panic: Difftest failed!
xs-gem5: 4f7ae37
When batch running checkpoints using the specified version of gem5, approximately 9 out of 500 checkpoints failed the difftest. Upon examining the relevant logs, all failures point to the instruction
csrrw tp, mscratch, tp, suggesting a potential issue with its implementation.I have not yet had time to investigate the specific cause.