Shape Healing - Fix Standard_OutOfRange in connectWiresToWiresImpl on wire with internally-oriented edge#1331
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Dear @davidgilkaufman Thank you for your patch. To proceed with integration, please complete signing CLA process: In case if you already have signed CLA, please share ID that OCCT team shared with your by email after accepting of CLA. |
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The CLA submission website was down yesterday. but I have now signed it. Thanks for reminding me. I'll post the ID when it is sent to me. |
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Thank you for update! Later the CLA will be submittable through the email, my apologies for the complexity :( More details: https://dev.opencascade.org/content/important-notice-upcoming-changes-devopencascadeorg-forum-and-website |
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I've checked the issue (which I can confirm) and this code and it looks good to me. This is linked to a PR in FreeCAD with workarounds for this issue. It would be good to have version guards for that workaround, so would it be possible for this PR to get added to a release? I assume it depends on the CLA verification. |
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I will ping manager who responsible for CLAs, My apologies for the detays. It is not me, who processing them :*( |
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@davidgilkaufman could you please write up the Telephone + Fax: ? I can pre-approve the CLA until the manager will officially register it. |
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I've re-submitted the form with my phone number filled out |
Can it be added to a release now? We chose not to merge the FreeCAD PR at today's CAM developer meeting because we want to know the fix's release first to make proper version guards, but we plan to merge it regardless at the same meeting next week. It would be nice if we could be sure of the fix OCCT version by then. |
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Yes, it will be in 8.0.1 I assume FreeCAD using only official release, and it will be only in beginning of august. |
Fixes #1330
New test case: bugs/heal/bug1330
ShapeAnalysis_FreeBounds::connectWiresToWiresImplupdates internal data structuressewd,lwire, andaSelfor the current loop iteration before checkingsewd->NbEdges() > 0and potentially skipping the iteration based on the result. If it skips the iteration, it correctly clearssewdand keeps a log of having processed the wire inaSel, but it does not appropriately resetlwire. I have added a new test casebugs/heal/bug1330, in which this mistake causes it to fail to setdone = trueafter the loop, and later access invalid memory as a result.Fix: only update
lwireif the loop iteration is not skipped.