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mMIG Benchmark Flow

This repository contains the FPGA benchmark flow used to generate the AOIG, MIG, and mMIG results and the paper-ready artifacts for the mMIG study.

What this repository does

The flow has three stages:

  1. Generate a self-contained benchmark suite under generated/extension_suite/
  2. Run the FPGA implementation flow for AOIG, MIG, and mMIG
  3. Produce paper-ready LaTeX tables, figures, and summary metrics

The implementation flow uses explicit LUT1 inverter realization with dont_touch. No hierarchy-preservation constraint is applied.

Quick start

Requirements:

  • Python 3.10 or newer
  • Xilinx Vivado 2024.2 available on PATH

Install Python dependencies:

pip install -r requirements.txt

Run the full flow:

./run_paper_results.sh

Workflow

If you want to run the stages manually:

Generate the benchmark RTL:

python3 scripts/generate_extension_suite.py

Run the FPGA flow:

python3 scripts/run_extension_suite_donttouch.py

Generate the paper artifacts:

python3 scripts/generate_ieee_tables_figures.py \
  --artifact-root artifacts/paper_extension_donttouch \
  --output-root artifacts/paper_extension_donttouch/paper_ready

Main outputs

After a full run, the main outputs are:

  • generated/extension_suite/
  • artifacts/paper_extension_donttouch/results/raw_metrics.csv
  • artifacts/paper_extension_donttouch/results/ordering_summary.csv
  • artifacts/paper_extension_donttouch/paper_ready/latex/
  • artifacts/paper_extension_donttouch/paper_ready/figures/
  • artifacts/paper_extension_donttouch/paper_ready/metrics/

Repository layout

  • implementations/
    • source templates for AOIG, MIG, and mMIG
  • scripts/generate_extension_suite.py
    • generates the benchmark suite RTL
  • scripts/run_extension_suite_donttouch.py
    • runs the FPGA flow with explicit LUT1 inverter preservation using dont_touch
  • scripts/generate_ieee_tables_figures.py
    • generates paper-ready LaTeX tables and figures from completed runs
  • flows/vivado/run_nonproject.tcl
    • Vivado non-project batch flow
  • run_paper_results.sh
    • one-command full regeneration script

Smoke test

For a smaller validation run:

python3 scripts/generate_extension_suite.py
python3 scripts/run_extension_suite_donttouch.py \
  --benchmarks ascon_sbox \
  --implementations aoig,mig,mmig \
  --artifact-root artifacts/paper_extension_donttouch_smoke
python3 scripts/generate_ieee_tables_figures.py \
  --artifact-root artifacts/paper_extension_donttouch_smoke \
  --output-root artifacts/paper_extension_donttouch_smoke/paper_ready

Benchmark families

The generated suite covers:

  • adder family
  • secondary adders
  • multiplier family
  • DSP-style datapaths
  • ALU / compare blocks
  • crypto blocks

Notes

  • The benchmark suite is generated from the source templates in implementations/
  • The Vivado flow is non-project and batch-driven
  • The resulting paper artifacts are written under artifacts/paper_extension_donttouch/paper_ready/

About

Benchmark generation and FPGA flow for mMIG paper artifacts

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