B.Tech ECE @ NIT Andhra Pradesh · Analog-IC design
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two-stage-ota-90nm
two-stage-ota-90nm Public1.2 V two-stage Miller OTA in 90 nm CMOS — 67 dB, 49 MHz, 279 µW. Hand-derived compensation, 12-corner PVT, 500-point Monte Carlo.
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CurrentMirror-Design-Analysis
CurrentMirror-Design-Analysis PublicComparative study and design analysis of current mirror topologies in analog IC design.
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analog-parametric-equalizer
analog-parametric-equalizer Public5-band analog parametric audio equalizer using State Variable Filter (SVF) topology — LTspice simulation + KiCad schematic & 4-layer PCB
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