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Coremark port for iMXRT family

CoreMark is a benchmark that measures the performance of central processing units (CPU) used in embedded systems. It was developed in 2009 by Shay Gal-On at EEMBC and is intended to become an industry standard, replacing the Dhrystone benchmark. The code is written in C and contains implementations of the following algorithms: list processing (find and sort), matrix manipulation (common matrix operations), state machine (determine if an input stream contains valid numbers), and CRC. The code is under the Apache License 2.0 and is free of cost to use, but ownership is retained by the Consortium and publication of modified versions under the CoreMark name prohibited. (Wikipedia)

This projects implements the Coremark benchmark for the iMXRT Family controller using Rowley Crossworks.

Table of Contents

Prerequisites

Before building and running the Coremark benchmark, ensure you have the following:

  • Rowley Crossworks IDE installed.
  • Install CPU Support Package for iMXRT from here. Follow the instructions in the repository to set it up in Crossworks. (optionally, you can use Rowley’s original CPU support package, but it has some weaknesses as described below).
  • iMXRT evaluation board (e.g., for the specific derivative you're targeting).
  • USB connection for debugging and UART output via CMSIS-DAP.

How to get started

This project contains three solution files. Use Coremark.hzp to open the project in Crossworks. This solution links to the other two solutions, you do not have to open them individually.

  • Coremark_Original.hzp uses Rowley’s original CPU support package. Unfortunately, this package has a few weaknesses
    • It contains outdated CMSIS headers, meaning the iMXRT1040 project cannot compile
    • Dual-core applications do not work
    • There is no support for the iMXRT1180
  • Coremark_Extended.hzp uses a customised and extended version of the CPU support package, which makes it incompatible with the original version. You must install it manually in Crossworks. The weaknesses described above have been resolved in this package

Both solution files contain separate projects for the various derivatives of the iMXRT family which can be run on the respective evaluation boards. For iMXRT1160/1170, the projects for the M7 core must be active so that the projects for both cores can be loaded onto the CPU and debugged there. Unfortunately, the multicore functionality does not yet work for the iMXRT1180.

Building

  1. Open the project in Rowley Crossworks using Coremark.hzp.
  2. Select the appropriate project for your iMXRT derivative.
  3. Set build configuration (e.g., Debug / Release) in the project explorer.
  4. Build the project: Go to Build > Build Coremark.

Running

  1. Connect your iMXRT evaluation board via USB.
  2. Connect via CMSIS-DAP to the controller
  3. Load the built binary onto the board using the debugger.
  4. Run the application.
  5. View results via UART output on the terminal connected to the CMSIS-DAP USB port. Use as a configuration of 115200 baud, 8 data bits, no parity, and 1 stop bit.

What happens

What does the code on the controller do? Well, it runs the CoreMark benchmark, which is used to estimate the speed of the core. The results are output via the UART, which is available on the PC via the CMSIS-DAP USB port.

How do I port

The projects are configured for the respective evaluation boards. Here is a checklist to help you adapt the projects to your own hardware:

  • Memory interface: The type of memory interface can be changed via the project options (Build -> Section Placement)
  • Flash type: For the application to boot, the external flash must be configured using the flexspi_nor_config_t data structure. Several preconfigured variants are available (--> XiP/flexspi_flash*.c). Include the appropriate file – and only that file – in the project. If there is no suitable configuration for your flash memory, you must create your own.
  • UART for Terminal Output:
    The UART must be configured in two places:
    • boards//board.h
      Configure the UART instance and the associated interrupt source here
    • boards//pin_mux.c
      Configure the pins used here.

Results

Results with GCC 10.3

The results are in iterations per second (higher is better), code and data is stored in TCM.

Controller O0 OG O1 OSize O2 O3 O3 + LTO
iMX RT1011 ( 396 MHz) 289.59 906.88 1159.52 1147.26 1590.48 1584.53 1622.42
iMX RT1011 ( 500 MHz) 365.65 1140.87 1463.22 1448.56 2008.67 1999.68 2048.59
iMX RT1060 ( 528 MHz) 386.13 1204.90 1548.17 1527.88 2121.52 2106.59 2153.87
iMX RT1060 ( 600 MHz) 438.78 1369.22 1759.32 1736.29 2410.91 2393.83 2447.62
iMX RT1160_CM7 ( 500 MHz) 341.81 1136.72 1456.49 1442.66 2004.89 1991.95 2038.48
iMX RT1160_CM7 ( 600 MHz) 411.82 1369.52 1754.81 1738.16 2415.57 2399.92 2456.03
iMX RT1160_CM4 ( 240 MHz) 134.03 386.16 455.26 413.25 581.98 616.77 622.45
iMX RT1170_CM7 ( 800 MHz) 547.71 1821.55 2338.19 2303.51 3199.38 3193.25 3266.69
iMX RT1170_CM7 (1000 MHz) 683.62 2273.55 2918.34 2875.05 3993.29 3985.65 4076.97
iMX RT1170_CM4 ( 400 MHz) 219.33 631.95 745.00 676.28 952.38 1009.35 1018.60

Results with GCC 11.3

The results are in iterations per second (higher is better), code and data is stored in TCM.

Controller O0 OG O1 OSize O2 O3 O3 + LTO
iMX RT1011 ( 396 MHz) 289.59 909.12 1170.16 1207.23 1598.10 1588.56 1630.31
iMX RT1011 ( 500 MHz) 365.65 1153.61 1480.42 1524.29 2008.67 2001.60 2058.46
iMX RT1060 ( 528 MHz) 386.13 1212.32 1561.86 1610.72 2116.93 2110.77 2167.22
iMX RT1060 ( 600 MHz) 438.78 1377.63 1774.87 1830.36 2405.69 2398.65 2462.81
iMX RT1160_CM7 ( 500 MHz) 341.81 1143.32 1478.28 1503.80 2055.24 1994.65 2055.24
iMX RT1160_CM7 ( 600 MHz) 411.82 1377.48 1781.07 1811.85 2410.45 2403.15 2476.22
iMX RT1160_CM4 ( 240 MHz) 134.03 389.72 464.88 436.04 594.31 626.06 629.69
iMX RT1170_CM7 ( 800 MHz) 547.71 1831.16 2359.15 2435.46 3206.56 3199.79 3293.59
iMX RT1170_CM7 (1000 MHz) 683.63 2285.60 2944.64 3038.59 4002.24 3993.92 4099.36
iMX RT1170_CM4 ( 400 MHz) 219.33 637.75 760.76 713.57 972.57 1024.52 1030.43

Results with GCC 12.2

The results are in iterations per second (higher is better), code and data is stored in TCM.

Controller O0 OG O1 OSize O2 O3 O3 + LTO
iMX RT1011 ( 396 MHz) 289.59 887.04 1201.69 1498.62 1601.38 1604.87 1635.96
iMX RT1011 ( 500 MHz) 365.65 1127.11 1521.23 1892.21 2024.12 2032.93 2065.51
iMX RT1060 ( 528 MHz) 386.13 1192.66 1605.03 1996.16 2132.19 2148.04 2195.48
iMX RT1060 ( 600 MHz) 438.78 1355.38 1823.95 2268.39 2423.06 2440.92 2494.88
iMX RT1160_CM7 ( 500 MHz) 341.81 1122.48 1519.57 1883.16 2010.37 2018.24 2056.76
iMX RT1160_CM7 ( 600 MHz) 411.82 1352.41 1830.83 2268.91 2422.24 2431.67 2478.06
iMX RT1160_CM4 ( 240 MHz) 134.03 386.32 490.83 511.05 605.96 634.59 646.97
iMX RT1170_CM7 ( 800 MHz) 547.71 1797.20 2422.59 3017.68 3221.64 3244.64 3314.77
iMX RT1170_CM7 (1000 MHz) 683.62 2243.15 3023.88 3766.47 4020.90 4049.56 4137.36
iMX RT1170_CM4 ( 400 MHz) 219.33 632.21 803.21 836.30 991.60 1038.49 1058.72

Results with GCC 12.3

The results are in iterations per second (higher is better), code and data is stored in TCM.

Controller O0 OG O1 OSize O2 O3 O3 + LTO
iMX RT1011 ( 396 MHz) 289.52 886.58 1200.45 1499.11 1570.54 1594.38 1607.66
iMX RT1011 ( 500 MHz) 365.56 1127.09 1523.46 1892.86 1975.65 2011.50 2029.87
iMX RT1060 ( 600 MHz) 437.65 1354.20 1831.97 2268.60 2378.34 2417.09 2436.17
iMX RT1160_CM7 ( 500 MHz) 341.81 1122.48 1519.57 1883.23 1967.88 2003.60 2017.51
iMX RT1160_CM7 ( 600 MHz) 411.82 1348.10 1832.44 2226.67 2333.06 2414.05 2430.72
iMX RT1160_CM4 ( 240 MHz) 134.03 386.57 491.62 511.05 589.04 621.81 625.67
iMX RT1180_CM33 ( 240 MHz) 153.52 452.44 550.66 583.20 651.09 697.35 699.33
iMX RT1180_CM7 ( 800 MHz) 530.49 1784.12 2402.80 2991.86 3136.76 3186.74 3209.65

Results with GCC 13.2

The results are in iterations per second (higher is better), code and data is stored in TCM.

Controller O0 OG O1 OSize O2 O3 O3 + LTO
iMX RT1011 ( 396 MHz) 289.52 892.69 1187.56 1257.54 1581.62 1613.52 1617.23
iMX RT1011 ( 500 MHz) 365.56 1119.44 1498.62 1587.85 1994.65 2042.73 2042.48
iMX RT1060 ( 528 MHz) 386.04 1192.74 1589.31 1677.85 2110.68 2153.03 2156.84
iMX RT1060 ( 600 MHz) 438.68 1355.41 1806.09 1906.65 2398.54 2446.66 2450.98
iMX RT1160_CM7 ( 500 MHz) 341.81 1122.48 1494.32 1581.62 1986.80 2034.58 2033.84
iMX RT1160_CM7 ( 600 MHz) 411.82 1352.41 1800.43 1905.63 2393.83 2451.34 2450.37
iMX RT1160_CM4 ( 240 MHz) 134.03 386.32 473.23 450.16 599.47 635.75 631.79
iMX RT1170_CM7 ( 800 MHz) 547.73 1798.75 2394.63 2534.46 3183.69 3260.30 3262.21
iMX RT1170_CM7 (1000 MHz) 683.64 2245.07 2988.82 3163.35 3973.61 4069.34 4071.66
iMX RT1170_CM4 ( 400 MHz) 219.33 632.21 774.39 736.66 980.96 1040.36 1033.91
iMX RT1180_CM33 ( 240 MHz) 153.52 452.44 524.29 527.98 685.43 710.59 708.88
iMX RT1180_CM7 ( 800 MHz) 531.67 1784.37 2373.83 2513.19 3149.01 3227.05 3237.08

Results with GCC 13.3

The results are in iterations per second (higher is better), code and data is stored in TCM.

Controller O0 OG O1 OSize O2 O3 O3 + LTO
iMX RT1060 ( 528 MHz) 386.04 1192.74 1589.31 1675.43 2110.68 2153.03 2156.84
iMX RT1060 ( 600 MHz) 438.68 1355.41 1806.09 1903.89 2398.54 2446.66 2436.17
iMX RT1170_CM7 ( 800 MHz) 549.16 1797.59 2387.31 2534.21 3192.03 3260.30 3265.19
iMX RT1170_CM7 (1000 MHz) 685.41 2243.56 2979.73 3162.95 3984.06 4069.34 4075.31
iMX RT1170_CM4 ( 400 MHz) 219.33 632.19 773.83 736.66 980.96 1040.36 1033.91

Results with GCC 14.2

The results are in iterations per second (higher is better), code and data is stored in TCM.

Controller O0 OG O1 OSize O2 O3 O3 + LTO
iMX RT1060 ( 528 MHz) 386.14 1241.80 1657.76 1676.72 2035.66 2079.78 2074.77
iMX RT1060 ( 600 MHz) 438.80 1411.15 1883.87 1905.34 2313.31 2363.39 2357.71

Results with GCC 14.3

The results are in iterations per second (higher is better), code and data is stored in TCM.

Controller O0 OG O1 OSize O2 O3 O3 + LTO
iMX RT1011 ( 396 MHz) 173.10 931.46 1244.49 1256.75 1526.29 1563.72 1557.87
iMX RT1011 ( 500 MHz) 364.70 1175.97 1571.33 1586.84 1927.15 1974.41 1967.03
iMX RT1060 ( 528 MHz) 386.14 1241.80 1657.76 1677.17 2033.59 2080.38 2076.84
iMX RT1060 ( 600 MHz) 438.80 1411.15 1883.87 1905.92 2310.85 2364.06 2360.16

Results with GCC 15.2

The results are in iterations per second (higher is better), code and data is stored in TCM.

Controller O0 OG O1 OSize O2 O3 O3 + LTO
iMX RT1060 ( 528 MHz) 378.84 1223.90 1645.00 1756.11 2131.65 2145.73 2078.05
iMX RT1060 ( 600 MHz) 430.50 1390.70 1869.43 1995.60 2422.36 2438.31 2361.49
iMX RT1160_CM7 ( 500 MHz) 336.58 1154.28 1547.65 1651.85 2010.53 2023.71 1963.40
iMX RT1160_CM7 ( 600 MHz) 405.53 1390.70 1864.69 1990.20 2422.36 2438.19 2365.52
iMX RT1160_CM4 ( 240 MHz) 131.22 403.52 478.77 483.87 609.53 610.74 631.20
iMX RT1170_CM7 ( 800 MHz) 539.36 1849.72 2480.03 2647.04 3221.85 3242.96 3140.90
iMX RT1170_CM7 (1000 MHz) 673.20 2308.72 3095.40 3303.81 4021.23 4047.59 3920.33
iMX RT1170_CM4 ( 400 MHz) 214.73 660.35 783.45 791.84 997.47 999.46 1032.91

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Coremark for iMXRT1170 Dual Core

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