FIRST STATION TEST InterconnectIO_BOX 500-1000-010

Project Overview

This project involves the assembly of a custom InterconnectIO_BOX designed to be part of the First TestStation project (FTS). The primary goal of the InterconnectIO_BOX is to provide an interface between instruments and the Unit Under Test (U.U.T).

Design Tools

• Freecad 0.20.2 - Free software application used to design rail guides and assemble the box.
• Inkscape 1.1.2 - Free software application used to design front and back panel.
• LibreOffice - Free Software application used to create assembly instructions and the Bill of Materials (BOM).
• PicPick - Free application to capture and document image.

Features

• Stand-alone Operation: The box is capable of functioning independently, without requiring external instruments or additional equipment.
• Rackmount Capability: Designed to be easily mounted in a standard rack chassis, providing flexibility for different setups.
• Cost-Effective: Built using affordable, readily available components, ensuring low production costs.

Assembly Instructions

Follow the document Assembly_Instructions to complete the assembly of the board.

Design Files

• Left Card Guide stl File – STL file for the left rail, to be used with a 3D printer.
• Right Card Guide stl File – STL file for the right rail, to be used with a 3D printer.
• Front panel drawing – SVG file for the front panel, to be used with a laser cutter.
• Back panel drawing – SVG file for the back panel, to be used with a laser cutter.
• Bill of Materials(BOM) – List of components required to complete the assembly.
• Freecad Folder – Freecad Original design files.

Verification

The InterconnectIO Box is equipped with multiple built-in features designed to facilitate the comprehensive verification of hardware functionality. It supports SCPI commands, allowing for internal testing and diagnostics. The hardware has been engineered specifically to aid in the validation of board functionality, ensuring thorough and efficient testing.

For detailed testing procedures, please refer to the Test_Instructions document to complete the verification of the InterconnectIO Box.

Note: Verification can also be performed using the OpenTAP TestPlan software available in the GitHub repository:
OpenTAP Selftest Sequence

License

This project is licensed under the terms of the CERN Open Hardware License Version 2 - Weakly Reciprocal (CERN-OHL-W 2.0).

See the LICENSE file in this repository for more details.

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