Deferred: hardware validation of RP2040/RP2350 and Teensy 4.x slim bridge (#4589, #4617)

[zackees]

Follow-up to #4589 (PR #4619) and #4599/#4588 (PR #4617), part of #4580.

Both conversions merged with hardware validation deferred, by maintainer decision. When boards are available, run AutoResearch --legacy on rp2040, rp2350 and teensy41 through the PIO/ObjectFLED engines. Capture timing and multi-strip evidence. Build-only numbers: rp2040 Blink firmware.bin went from 103,756 to 136,948 B (+33,192).

[zackees]

RP2350 (Pico 2) hardware run, 2026-09-25:

• bash autoresearch rp2350 --flex-io --legacy on master failed (zero_capture). The harness defaulted to PIO1, but the legacy templates bind PIO0. Fixed in fix(autoresearch): bind RP --legacy runs to PIO0 (#4623) #4653.
• With PIO0: legacy WS2812B at 100 LEDs PASS (582ms); 1 LED PASS (51ms); 10 LEDs PASS (100ms). The channel API on PIO1 still passes (100 LEDs, 634ms).
• Lanes over the harness cap (300) return LaneSizeTooLarge on both paths. That's a harness limit, not a regression.

Still needed: rp2040, teensy41 ObjectFLED, and multi-strip legacy (not attached here).

[zackees]

RP2350 (Pico 2) hardware evidence for the slim-bridge legacy path, master ec0a0f35ef, run with fbuild from FastLED/fbuild#1606 (released fbuild 2.5.28+ can't compile rp2350; see that PR) and the #4661 serial fix:

bash autoresearch rp2350 --flex-io --legacy --strip-sizes 1,10,100
TEST PIO0 lanes=1 leds=1 PASS 52ms
TEST PIO0 lanes=1 leds=10 PASS 101ms
TEST PIO0 lanes=1 leds=100 PASS 582ms

Not yet covered: multi-strip. The bench has a single 0→1 jumper, and legacy multi-lane drives consecutive pins from --tx-pin, so RX must be wired outside the lane range. #4664 now rejects the overlapping config instead of reporting zero_capture. RP2040 and Teensy 4.1 are not attached.