Make the MPMC Queue use a single slot access counter and fix index wrapping deadlock#31
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… counter This moves to a design that encodes the push and pop count of a slot to one counter, increasing performance. The fullness of the slot is encoded in the parity, while the "our turn" mechanic still exists through the divison by 2.
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@qqqlab PTAL |
This makes the access count and the revolution count in the same range, ensuring index wrapping does not cause a deadlock for slot acquisition. A consequence of this is that buffer sizes now must be powers of 2.
DNedic
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Description
The fullness of the slot is encoded in the parity, while the "our turn" mechanic still exists through the divison by 2.
This requires a limitation upon the queue size, it now must be a power of 2 and this is a breaking change.