Prepare for next version with more features, better docs, and some fixes#368

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soronpo merged 116 commits into

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Apr 4, 2026

Commits on Feb 8, 2026

add `FALL_THROUGH` loop tagging
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Enhance documentation for `FALL_THROUGH` loop tagging to clarify its behavior in RT loops, specifying that it allows falling through without consuming cycles.
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update dependencies
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add `fallThrough` condition method for step blocks
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reenable refCheck
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Commits on Feb 9, 2026

update DropRTProcess stage to handle fallThrough blocks
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Commits on Feb 10, 2026

Commits on Feb 11, 2026

Commits on Feb 16, 2026

fix ExplicitNamedVars stage for a simple named ident use-case
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patch `RefFilter.All` needs to be a case object
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Commits on Feb 17, 2026

Refactor DFVal read dependencies to use a type alias for improved clarity and maintainability
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fix and expand patching edge cases
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add shortFilePath to MetaContext
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Commits on Feb 18, 2026

fix comment
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Commits on Feb 19, 2026

Add initial step definition for RT processes without leading steps, waits, or loops.
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Commits on Mar 20, 2026

Commits on Mar 21, 2026

Commits on Mar 22, 2026

introduce FlattenStepBlock stage
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updates to new-stage skill
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update DropRTProcess to depend on FlattenStepBlocks and the tests to not use relative goto statements
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add documentation for DropRTProcess and fix the width of the enumeration register
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better support while running through sbtn
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add DropRTProcess to dependencies in ToED stage
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enhance documentation for new stage creation with lessons learned and update guidelines
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add instructions for creating or modifying compiler stages in Claude guide
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Commits on Mar 23, 2026

Commits on Mar 25, 2026

Commits on Mar 26, 2026

internal handling of patch global member references
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fix GlobalizePortVectorParams class name to have Spec
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wip GlobalizePortVectorParams
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GlobalizePortVectorParams working
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fix ordering after design parameter change
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Commits on Mar 27, 2026

remove redundant named value in RT process elaboration test
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finish refactoring of design parameters. all tests green
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update skill after changed
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Commits on Mar 28, 2026

enhance patching logic to support concatenation of additions with Before and After configurations
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Commits on Mar 29, 2026

wip: better design deduplication
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fix last stage errors after better design deduplication. still have elaboration check errors.
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wip
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wip
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Commits on Mar 30, 2026

fix duplication logic to recursively handle nested design instances in GlobalizePortVectorParams
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zero members in deduplication. all tests are green.
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refactor duplication logic to compute domain blocks and ports in a single pass
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update skills
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bump versions for scalafmt and dependencies to latest stable releases
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remove redundant global files inclusion when empty
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further removal of redundant package inclusion and option to rename the global package
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add some info about processes
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remove unused signal lint-off comments and clean up code
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Commits on Apr 1, 2026

docs: type conversions, shift ops, Bit operators, enum unique case, Bits init, syntax pitfalls

soronpo
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claude
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fix and improve logical operators for Verilog.
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docs: clarify terminology for Bit/Boolean operators in DFHDL
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clarify keyword workaround
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fix explicit named vars for ED domains
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fix vector of Bit to/from Bits conversion
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remove redundant def/pkg files from comparison
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clarifying bits initialization or assignment with integers
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update all admonitions to the new style
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Commits on Apr 2, 2026

More clarification on the naming collisions with scala keywords
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missing closing block
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better placement of admonition
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docs: clarifying more conversions
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docs: no need for escaping `|` values in code segments in tables
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docs: move and improve documentation on `rising` and `falling` operations
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Commits on Apr 3, 2026

docs: document the arithmetic operations and their constraints
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feat: auto-promote anonymous arithmetic to carry ops on wider assignment

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docs: wip unifying operation sections
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docs: overhaul of the type-system document
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docs: define how Bits can be used in arithmetic
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docs: add physical operations
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docs: add more operation examples
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docs: clarification on using clog2
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docs: add guidance for multi-file scala-cli projects
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docs: wip verilog transitioning chapter
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docs: improved FSM example
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docs: bounded and unbounded types and signatures
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docs: document Selection `.sel` operation
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docs: fix confusing example
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fix: parameterized bit selection
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docs: provide unbounded bits and parametric dependency example
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docs: improve shift example
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docs: removed problematic type examples, since there is much more information in type-system docs
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docs: parametric Bits constants, dynamic index truncation, Int bits slicing, inline-if parentheses

soronpo
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claude
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docs: reduction ops, Bits comparisons, part-select, signed arithmetic, Encoded.Manual, integer case, .truncate warning, UInt.to vs .until

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claude
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docs: emphasize state machine with reset
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Commits on Apr 4, 2026