Pinned Loading

1. auto-fpga auto-fpga Public

   FPGA hardware accelerator for the CTP (Complementary Twin Pyramidal) module (167M FLOPs) — 774 FPS @ 166 MHz, 0.77 W on Xilinx Virtex-7 VC707 | Verilog | Vivado 2024.2

   Verilog 1

2. ALU-functional-verification ALU-functional-verification Public

   SystemVerilog layered testbench for ALU functional verification — constrained-random, coverage-driven, self-checking scoreboard.

   SystemVerilog

3. Asynchronous-FIFO Asynchronous-FIFO Public

   Verilog Implementation of Parameterized and Synthesizable Asynchronous FIFO

4. Vending-Machine_FPGA-Implementation Vending-Machine_FPGA-Implementation Public

5. LMS-Adaptive-Filter LMS-Adaptive-Filter Public

   A verilog implementation of fully parameterized LSM adaptive filter where user has freedom to select any inputs, tap lengths, step size , desired signal etc

6. 8-Radix-and-4-Radix-Booth-Multiplier 8-Radix-and-4-Radix-Booth-Multiplier Public

   The 8-radix booth multiplier has been implemented using the 8 radix booth algorithm, which enables it to perform signed and unsigned 8-bit multiplication .

   1