stm32: add STM32G474 support

[aslesar2015]

Add STM32G474 to the processor selection and fix the flash erase logic in flash.c to support all G474 variants (single-bank mode only).

Kconfig changes (stm32g474xx, 150MHz PLL, 512KB flash, 128KB RAM):

• FLASH_SIZE 0x80000 covers the xE variant (most common);
• RAM_SIZE 0x20000: SRAM1+SRAM2+SRAM3 are contiguous at 0x20000000.

flash.c - separate G0 and G4 erase paths:

• G474xB/xC (128/256KB): 2KB pages, direct PNB index;
• G474xE single-bank (DBANK=0, factory default): 4KB pages, detected at runtime via FLASH->OPTR FLASH_OPTR_DBANK bit;
• Removes incorrect G0 dual-bank arithmetic that was previously shared with G4, which corrupted page indices for addresses above 128KB.

Kconfig: hide FDCAN pin options invalid on G4 (PB0/PB1, PD12/PD13, PC2/PC3 have no FDCAN alternate function on STM32G4 devices).

Tested on WeAct STM32G474 board (STM32G474CEU6, 512 KB flash variant):

• USB communication: verified flashing Klipper via Katapult and connecting over USB;
• Flash write/read integrity: verified correct erase and write of flash pages above address 0x8040000 (pages 64+, affected by the G0 dual-bank arithmetic fix) by flashing a 300 KB random binary and reading it back via ST-Link;
• USB-to-CAN bridge mode: verified that canbus_uuid is reported correctly;
• CAN communication: not yet tested due to the absence of a transceiver.

Signed-off-by: Oleksii Sliesarevych aslesar07@gmail.com