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1 change: 1 addition & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -3,3 +3,4 @@ __pycache__/**
dependencies/**
build/**
html/**
plot_data/**
15 changes: 8 additions & 7 deletions build.py
Original file line number Diff line number Diff line change
Expand Up @@ -102,8 +102,8 @@ def __init__(self, dir, buildsystem):
self.rv_source_dir = self.source_dir/"rv"

def pull(self):
pull_git_dependency(self.source_dir, "https://github.com/llvm/llvm-project.git", branch="llvmorg-14.0.1")
pull_git_dependency(self.rv_source_dir, "https://github.com/cdl-saarland/rv.git", "--recurse-submodules", branch="release/14.x")
pull_git_dependency(self.source_dir, "https://github.com/llvm/llvm-project.git", branch="llvmorg-16.0.6")
pull_git_dependency(self.rv_source_dir, "https://github.com/cdl-saarland/rv.git", "--recurse-submodules", branch="release/16.x")

def configure(self, configs, anydsl):
for patch in [
Expand All @@ -129,14 +129,15 @@ def configure(self, configs, anydsl):
LLVM_TOOL_RV_BUILD=True,
CLANG_INCLUDE_DOCS=False,
CLANG_INCLUDE_TESTS=False,
RV_ENABLE_PLUGIN=False,
LLVM_RVPLUG_LINK_INTO_TOOLS=False,
LLVM_BUILD_LLVM_DYLIB=False if windows else True,
LLVM_LINK_LLVM_DYLIB=False if windows else True
)

def build(self, config):
self.buildsystem.build(self.build_dir, config, "clang", "llvm-as", "lld", "LLVMExecutionEngine", "LLVMRuntimeDyld")
self.buildsystem.build(self.build_dir, config, "RV", "LLVMRV", "LLVMMCJIT")
self.buildsystem.build(self.build_dir, config, "RV", "LLVMMCJIT")

@component(depends_on=(LLVM,))
class Thorin(Build):
Expand All @@ -146,7 +147,7 @@ def __init__(self, dir, buildsystem):
self.half_source_dir = self.source_dir/"half"

def pull(self):
pull_git_dependency(self.source_dir, "https://github.com/AnyDSL/thorin.git", branch="ipdps23")
pull_git_dependency(self.source_dir, "https://github.com/AnyDSL/thorin.git", branch="master")
pull_svn_dependency(self.half_source_dir, "https://svn.code.sf.net/p/half/code/tags/release-2.2.0")

def configure(self, configs, llvm):
Expand All @@ -167,7 +168,7 @@ def __init__(self, dir, buildsystem):
self.source_dir = dir/"dependencies"/"anydsl"/"artic"

def pull(self):
pull_git_dependency(self.source_dir, "https://github.com/AnyDSL/artic.git", branch="ipdps23")
pull_git_dependency(self.source_dir, "https://github.com/AnyDSL/artic.git", branch="master")

def configure(self, configs, thorin):
self.buildsystem.configure(self.build_dir, configs, self.source_dir,
Expand All @@ -184,7 +185,7 @@ def __init__(self, dir, buildsystem):
self.source_dir = dir/"dependencies"/"anydsl"/"runtime"

def pull(self):
pull_git_dependency(self.source_dir, "https://github.com/AnyDSL/runtime.git", branch="ipdps23")
pull_git_dependency(self.source_dir, "https://github.com/AnyDSL/runtime.git", branch="master")

def configure(self, configs, anydsl, llvm, thorin, artic):
if windows:
Expand Down Expand Up @@ -217,7 +218,7 @@ def __init__(self, dir, buildsystem):
def configure(self, configs, boost, runtime):
self.buildsystem.configure(self.build_dir, configs, self.source_dir,
Boost_NO_SYSTEM_PATHS=True,
BOOST_ROOT=boost.build_dir,
Boost_ROOT=boost.build_dir,
AnyDSL_runtime_DIR=runtime.build_dir/"share"/"anydsl"/"cmake",
BUILD_TESTING=True,
CMAKE_EXPORT_COMPILE_COMMANDS=True,
Expand Down
139 changes: 119 additions & 20 deletions src/mapping_cuda.art
Original file line number Diff line number Diff line change
Expand Up @@ -38,20 +38,37 @@ fn @cuda_pred(b: bool) -> i32 {
if b { 1 } else { 0 }
}

fn @cuda_memory_barrier(order: memory_order) {
if cuda_device_arch() >= 700 {
(@|| {
match order {
memory_order::acquire => asm("fence.acq_rel.gpu;" :::: "volatile"),
memory_order::release => asm("fence.acq_rel.gpu;" :::: "volatile"),
memory_order::acq_rel => asm("fence.acq_rel.gpu;" :::: "volatile"),
memory_order::seq_cst => asm("fence.sc.gpu;" :::: "volatile"),
_ => ()
}
})()
}
else {
cuda_threadfence()
}
}

fn @cuda_legacy_atomic_memory_barrier_pre(order:memory_order) {
match order {
memory_order::release => cuda_threadfence(),
memory_order::acq_rel => cuda_threadfence(),
memory_order::seq_cst => cuda_threadfence(),
memory_order::release => cuda_memory_barrier(memory_order::release),
memory_order::acq_rel => cuda_memory_barrier(memory_order::acq_rel),
memory_order::seq_cst => cuda_memory_barrier(memory_order::seq_cst),
_ => ()
}
}

fn @cuda_legacy_atomic_memory_barrier_post(order:memory_order) {
match order {
memory_order::acquire => cuda_threadfence(),
memory_order::acq_rel => cuda_threadfence(),
memory_order::seq_cst => cuda_threadfence(),
memory_order::acquire => cuda_memory_barrier(memory_order::acquire),
memory_order::acq_rel => cuda_memory_barrier(memory_order::acq_rel),
memory_order::seq_cst => cuda_memory_barrier(memory_order::seq_cst),
_ => ()
}
}
Expand Down Expand Up @@ -99,16 +116,98 @@ fn @cuda_legacy_atomic_memory_order_wrap_cas[T](f: fn(&mut addrspace(1) T, T, T)
}
}

fn @cuda_atomic_wait_and_transition[T](f: fn(&mut addrspace(1) T, T, T) -> T, cmp: fn(T, T) -> bool) {
@|location:&mut addrspace(1) T, expected:T, desired:T, order:memory_order, _debug_msg:&[u8]| -> () {

fn @atomic_load_global_i32(location: &addrspace(1) i32, order: memory_order) -> i32 = atomic_load_global_u32(location as &addrspace(1) u32, order) as i32;
fn @atomic_load_global_u32(location: &addrspace(1) u32, order: memory_order) -> u32 {
let mut value: u32;

if cuda_device_arch() >= 700 {
(@|| {
match order {
memory_order::relaxed => asm("ld.relaxed.gpu.b32 %0, [%1];" : "=r"(value) : "l"(location) : "memory"),
memory_order::acquire => asm("ld.acquire.gpu.b32 %0, [%1];" : "=r"(value) : "l"(location) : "memory"),
_ => cuda_trap()
}
})();
}
else {
cuda_legacy_atomic_memory_barrier_pre(order);
while !cmp(f(location, expected, desired), expected) {
cuda_threadfence();
}
asm("ld.volatile.global.b32 %0, [%1];" : "=r"(value) : "l"(location) : "memory");
cuda_legacy_atomic_memory_barrier_post(order);
}

value
}

fn @atomic_load_global_i64(location: &addrspace(1) i64, order: memory_order) = atomic_load_global_u64(location as &addrspace(1) u64, order) as i64;
fn @atomic_load_global_u64(location: &addrspace(1) u64, order: memory_order) -> u64 {
let mut value: u64;

if cuda_device_arch() >= 700 {
(@|| {
match order {
memory_order::relaxed => asm("ld.relaxed.gpu.b64 %0, [%1];" : "=l"(value) : "l"(location) : "memory"),
memory_order::acquire => asm("ld.acquire.gpu.b64 %0, [%1];" : "=l"(value) : "l"(location) : "memory"),
_ => cuda_trap()
}
})();
}
else {
cuda_legacy_atomic_memory_barrier_pre(order);
asm("ld.volatile.global.b64 %0, [%1];" : "=l"(value) : "l"(location) : "memory");
cuda_legacy_atomic_memory_barrier_post(order);
}

value
}

fn @atomic_store_global_i32(location: &addrspace(1) i32, value: i32, order: memory_order) = atomic_store_global_u32(location as &addrspace(1) u32, value as u32, order);
fn @atomic_store_global_u32(location: &addrspace(1) u32, value: u32, order: memory_order) -> () {
if cuda_device_arch() >= 700 {
(@|| {
match order {
memory_order::relaxed => asm("st.relaxed.gpu.b32 [%0], %1;" : : "l"(location), "r"(value) : "memory"),
memory_order::release => asm("st.release.gpu.b32 [%0], %1;" : : "l"(location), "r"(value) : "memory"),
_ => cuda_trap()
}
})()
}
else {
cuda_legacy_atomic_memory_barrier_pre(order);
asm("st.volatile.global.b32 [%0], %1;" : : "l"(location), "r"(value) : "memory");
cuda_legacy_atomic_memory_barrier_post(order);
}
}

fn @atomic_store_global_i64(location: &addrspace(1) i64, value: i64, order: memory_order) = atomic_store_global_u64(location as &addrspace(1) u64, value as u64, order);
fn @atomic_store_global_u64(location: &addrspace(1) u64, value: u64, order: memory_order) -> () {
if cuda_device_arch() >= 700 {
(@|| {
match order {
memory_order::relaxed => asm("st.relaxed.gpu.b64 [%0], %1;" : : "l"(location), "l"(value) : "memory"),
memory_order::release => asm("st.release.gpu.b64 [%0], %1;" : : "l"(location), "l"(value) : "memory"),
_ => cuda_trap()
}
})()
}
else {
cuda_legacy_atomic_memory_barrier_pre(order);
asm("st.volatile.global.b64 [%0], %1;" : : "l"(location), "l"(value) : "memory");
cuda_legacy_atomic_memory_barrier_post(order);
}
}


// fn @cuda_atomic_wait_and_transition[T](f: fn(&mut addrspace(1) T, T, T) -> T, cmp: fn(T, T) -> bool) {
// @|location:&mut addrspace(1) T, expected:T, desired:T, order:memory_order, _debug_msg:&[u8]| -> () {
// cuda_legacy_atomic_memory_barrier_pre(order);
// while !cmp(f(location, expected, desired), expected) {
// cuda_threadfence();
// }
// cuda_legacy_atomic_memory_barrier_post(order);
// }
// }

fn @cuda_thread(idx: fn(i32) -> u32, gid: fn() -> u32, body: fn(thread_context) -> ()) -> () {
let sleep = @|t: u32| {
if cuda_device_arch() >= 700 {
Expand All @@ -125,20 +224,20 @@ fn @cuda_thread(idx: fn(i32) -> u32, gid: fn() -> u32, body: fn(thread_context)
gid = gid,
uid = @|| gid() as i32,

atomic_load_global_i32 = cuda_legacy_atomic_memory_order_wrap_load[i32](@|location| { let mut res:i32; asm("atom.global.add.s32 %0, [%1], 0;" : "=r"(res) : "l"(location) : "memory"); res }),
atomic_load_global_u32 = cuda_legacy_atomic_memory_order_wrap_load[u32](@|location| { let mut res:u32; asm("atom.global.add.u32 %0, [%1], 0;" : "=r"(res) : "l"(location) : "memory"); res }),
atomic_load_global_i64 = cuda_legacy_atomic_memory_order_wrap_load[i64](@|location| { let mut res:i64; asm("atom.global.add.u64 %0, [%1], 0;" : "=l"(res) : "l"(location) : "memory"); res }),
atomic_load_global_u64 = cuda_legacy_atomic_memory_order_wrap_load[u64](@|location| { let mut res:u64; asm("atom.global.add.u64 %0, [%1], 0;" : "=l"(res) : "l"(location) : "memory"); res }),
atomic_load_global_i32 = atomic_load_global_i32,
atomic_load_global_u32 = atomic_load_global_u32,
atomic_load_global_i64 = atomic_load_global_i64,
atomic_load_global_u64 = atomic_load_global_u64,

atomic_load_global_i32_coalesced = cuda_legacy_atomic_memory_order_wrap_load[i32](@|location| { let mut res:i32; asm("ld.volatile.global.b32 %0, [%1];" : "=r"(res) : "l"(location) : "memory"); res }),
atomic_load_global_u32_coalesced = cuda_legacy_atomic_memory_order_wrap_load[u32](@|location| { let mut res:u32; asm("ld.volatile.global.b32 %0, [%1];" : "=r"(res) : "l"(location) : "memory"); res }),
atomic_load_global_i64_coalesced = cuda_legacy_atomic_memory_order_wrap_load[i64](@|location| { let mut res:i64; asm("ld.volatile.global.b64 %0, [%1];" : "=l"(res) : "l"(location) : "memory"); res }),
atomic_load_global_u64_coalesced = cuda_legacy_atomic_memory_order_wrap_load[u64](@|location| { let mut res:u64; asm("ld.volatile.global.b64 %0, [%1];" : "=l"(res) : "l"(location) : "memory"); res }),

atomic_store_global_i32 = cuda_legacy_atomic_memory_order_wrap_store[i32](@|location, value| { let mut res:i32; asm("atom.global.exch.b32 %0, [%1], %2;" : "=r"(res) : "l"(location), "r"(value) : "memory"); }),
atomic_store_global_u32 = cuda_legacy_atomic_memory_order_wrap_store[u32](@|location, value| { let mut res:u32; asm("atom.global.exch.b32 %0, [%1], %2;" : "=r"(res) : "l"(location), "r"(value) : "memory"); }),
atomic_store_global_i64 = cuda_legacy_atomic_memory_order_wrap_store[i64](@|location, value| { let mut res:i64; asm("atom.global.exch.b64 %0, [%1], %2;" : "=l"(res) : "l"(location), "l"(value) : "memory"); }),
atomic_store_global_u64 = cuda_legacy_atomic_memory_order_wrap_store[u64](@|location, value| { let mut res:u64; asm("atom.global.exch.b64 %0, [%1], %2;" : "=l"(res) : "l"(location), "l"(value) : "memory"); }),
atomic_store_global_i32 = atomic_store_global_i32,
atomic_store_global_u32 = atomic_store_global_u32,
atomic_store_global_i64 = atomic_store_global_i64,
atomic_store_global_u64 = atomic_store_global_u64,

atomic_store_global_i32_coalesced = cuda_legacy_atomic_memory_order_wrap_store[i32](@|location, value| asm("st.volatile.global.b32 [%0], %1;" : : "l"(location), "r"(value) : "memory")),
atomic_store_global_u32_coalesced = cuda_legacy_atomic_memory_order_wrap_store[u32](@|location, value| asm("st.volatile.global.b32 [%0], %1;" : : "l"(location), "r"(value) : "memory")),
Expand Down Expand Up @@ -189,7 +288,7 @@ fn @cuda_thread(idx: fn(i32) -> u32, gid: fn() -> u32, body: fn(thread_context)

atomic_inc_global_u32 = cuda_atomic_inc_global_u32,

memory_barrier = @|_| cuda_threadfence(),
memory_barrier = cuda_memory_barrier,

timestamp = @|| cuda_globaltimer() as i64,
timestamp32 = @|| cuda_globaltimer_lo() as i32,
Expand Down
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