[Video] Integrate H3 SM70 execution, metrics and VSA diagnostics - #583
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yangzhuxinyzx merged 65 commits intoSep 10, 2026
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Validated with 63 affected CPU checks; three GPU cases deselected. Core source retains its existing GPU and complete TP1 residency parity evidence. Assisted-by: OpenAI Codex Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Preserve both explicit query tiling and layer residency options. 63 affected CPU checks pass. Record rejected operand probes without changing production kernels. Assisted-by: OpenAI Codex Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
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…v100-h3-native-variants-20260909-050157
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yangzhuxinyzx
changed the base branch from
codex/v100-h3-sm70-kernels-20260909-040520
to
main
September 10, 2026 02:48
yangzhuxinyzx
marked this pull request as ready for review
September 10, 2026 02:49
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Purpose
Integrate the H3 SM70 execution and VSA stack into main through this existing PR, including the already-contained dependencies #571, #578 and #581. Original floating and W8A16 weights share prepared FP16 projection and adapter-aware execution; explicit residual sharding/peer reduction, layer offload and shared VAE host storage extend the measured native workflows. Workflow-aware counters report actual sampling work, sparse computation, per-step timing and source/kernel provenance.
FastH3 VSA retains the official four-step Data-Free algorithm, top-k=64, prefix-dense queries, per-query video blocks, boundary handling and learned compression. Request-owned layout buffers and deferred GPU counters remove synchronization and repeated allocation without changing the native result. Public validation and integer statistics remain intact. The independent CUTLASS SIMT FP32 implementation is an acceptance-only diagnostic with no runtime/default/AUTO registration. A dedicated evaluator checks the 31.3-second stage separately from numerical/human quality and the future 80-TF target.
The final integration head is
1c39c173116269bf69493941da36f7c7f9dc281d; its runtime/tests match the testedd6669c4ce1a915d59d4baaa258a437ccc03268b0exactly and it additionally includes the final TP2 dependency evidence. The synchronization with main at24220ca0eb4a02b2376cf48feb430bb4d5c5c3d7retains its mmap host weights, media progress and physical-device masking alongside the H3 changes. The merge itself changes no numerical CUDA kernel. The user authorized source integration on 2026-09-10; this does not mark unfinished acceptance gates as passed. The separate cache implementation in #584 is not included.Test Plan
Test Result
No configuration passes the combined VSA quality/speed stage. Seeds 43/44, 243-frame and 15-second boundaries, TP1/TP2 and representative Dense/LightX2V/Ref2VA full-output regressions remain incomplete for this VSA stage. Official original-hardware comparison is deferred. Human audiovisual review is pending, including object-count consistency also present in the identical reference. No default/AUTO promotion is included.
Reproduction commands, exact source/binary identities, playable candidate/reference MP4/WAV paths and remaining bottlenecks are recorded in
docs/design/minimax_h3/VSA_QUALITY_SPEED.md. Both retained MP4s pass complete FFmpeg decode. Merge validation artifacts are in the documentedvsa-merge-main-20260910directory. Historical performance remains tied to its original measured source and binaries; integration tests do not establish new performance or quality acceptance.Assisted-by: OpenAI Codex