hi,
just wanted to comment on a few issues i notice - comparing the code to c code:
in blake2_core.v, signal t_ctr_inc is never getting a "1" value . it's stuck on '0' hence causing the mechanism to fail on the first iteration of v_reg.
in addition - on blake2.v line 190 - it should be:
block_mem[address[5 : 0]-ADDR_BLOCK_W00] <= write_data;
since otherwise you get wrapping of the lower 5 bits of the address causing wrong writing of the data.
hi,
just wanted to comment on a few issues i notice - comparing the code to c code:
in blake2_core.v, signal t_ctr_inc is never getting a "1" value . it's stuck on '0' hence causing the mechanism to fail on the first iteration of v_reg.
in addition - on blake2.v line 190 - it should be:
block_mem[address[5 : 0]-ADDR_BLOCK_W00] <= write_data;
since otherwise you get wrapping of the lower 5 bits of the address causing wrong writing of the data.