From 4a32d6c8ac5c471506ec21d48da37ab716e1092d Mon Sep 17 00:00:00 2001
From: Christian Bruel <christian.bruel@foss.st.com>
Date: Tue, 24 Mar 2026 17:33:17 +0100
Subject: [PATCH] Add stm32mp2 support

---
 build_sdk.py              | 11 +++++++++++
 loader/src/aarch64/cpus.c |  2 ++
 loader/src/uart.c         | 14 ++++++++++++++
 platforms.yml             |  3 +++
 4 files changed, 30 insertions(+)

diff --git a/build_sdk.py b/build_sdk.py
index ac8cd1b77..abf66a12f 100644
--- a/build_sdk.py
+++ b/build_sdk.py
@@ -162,6 +162,17 @@ class KernelPath:
             "KernelCustomDTSOverlay": Path("custom_dts/overlay-zynqmp-kria-k26.dts"),
         } | DEFAULT_KERNEL_OPTIONS_AARCH64,
     ),
+    BoardInfo(
+        name="stm32mp2",
+        arch=KernelArch.AARCH64,
+        gcc_cpu="cortex-a35",
+        loader_link_address=0x88000000,
+        smp_cores=2,
+        kernel_options={
+            "KernelPlatform": "stm32mp2",
+            "KernelARMPlatform": "stm32mp257f-ev1",
+        } | DEFAULT_KERNEL_OPTIONS_AARCH64,
+    ),
     BoardInfo(
         name="tqma8xqp1gb",
         arch=KernelArch.AARCH64,
diff --git a/loader/src/aarch64/cpus.c b/loader/src/aarch64/cpus.c
index f6d1caaa7..ec76a6ae3 100644
--- a/loader/src/aarch64/cpus.c
+++ b/loader/src/aarch64/cpus.c
@@ -58,6 +58,8 @@ static const size_t psci_target_cpus[4] = {0x00, 0x01, 0x02, 0x03};
 static const size_t psci_target_cpus[4] = {0x00, 0x01, 0x02, 0x03};
 #elif defined(CONFIG_PLAT_ROCKPRO64)
 static const size_t psci_target_cpus[4] = {0x00, 0x01, 0x02, 0x03};
+#elif defined(CONFIG_PLAT_STM32MP2)
+static const size_t psci_target_cpus[2] = {0x00, 0x01};
 #elif defined(CONFIG_PLAT_QEMU_ARM_VIRT)
 /* QEMU is special and can have arbitrary numbers of cores */
 // TODO.
diff --git a/loader/src/uart.c b/loader/src/uart.c
index 54b182100..9187f69b4 100644
--- a/loader/src/uart.c
+++ b/loader/src/uart.c
@@ -188,6 +188,20 @@ void putc(uint8_t ch)
     while ((*UART_REG(ULSR) & ULSR_THRE) == 0);
     *UART_REG(UTHR) = ch;
 }
+#elif defined(CONFIG_PLAT_STM32MP2)
+
+#define UART_BASE     0x400e0000
+#define USART_ISR     0x1c
+#define USART_TDR     0x28
+#define USART_ISR_TXE 0x80
+
+void uart_init(void) {}
+
+void putc(uint8_t ch)
+{
+    while (!(*UART_REG(USART_ISR) & USART_ISR_TXE));
+    *UART_REG(USART_TDR) = ch;
+}
 #elif defined(CONFIG_ARCH_RISCV64)
 
 #include "riscv/sbi.h"
diff --git a/platforms.yml b/platforms.yml
index 8a8303816..22a95f38f 100644
--- a/platforms.yml
+++ b/platforms.yml
@@ -88,3 +88,6 @@ platforms:
   - name: zcu102
     cmake_plat: zcu102
     since: 1.3.0
+  - name: stm32mp2
+    cmake_plat: stm32mp2
+    since: dev