From 12ff322182e9d4386b8fe89078138efc010d66ea Mon Sep 17 00:00:00 2001 From: William Vinnicombe Date: Wed, 15 Jul 2026 17:02:32 +0100 Subject: [PATCH] Don't use s0 in Risc-V zcmp test compile This file currently fails to compile with any compilers, resulting in `pico_riscv_gcc` always falling through to the non-zcmp arch string The fix is to change the registers used to `s1` and `s2` instead --- cmake/preload/toolchains/util/riscv_zcmp_test.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/cmake/preload/toolchains/util/riscv_zcmp_test.c b/cmake/preload/toolchains/util/riscv_zcmp_test.c index 187963515..787d7b5f8 100644 --- a/cmake/preload/toolchains/util/riscv_zcmp_test.c +++ b/cmake/preload/toolchains/util/riscv_zcmp_test.c @@ -1,4 +1,5 @@ /* Test that the toolchain can assemble Zcmp instructions */ void _start(void) { - asm volatile ("cm.mvsa01 s0, s1" : : : "s0", "s1"); + // Cannot use s0 as it is also fp, so use s1 & s2 instead + asm volatile ("cm.mvsa01 s1, s2" : : : "s1", "s2"); }