want ability to read certain Tofino registers

[Aaron-Hartwig]

Work-in-progress list of registers to allow access to:

• freerun_cnt
• pcie_dev_info
• pcie_bus_dev
• tl_tx_proterr
• soft_reset
• reset_option
• dbg_rst
• pcie_phy_lane_ctrl0
• pcie_phy_lane_ctrl1
• KGen

We need to get these out via MGS.

[Aaron-Hartwig]

related to #2039

[rmustacc]

In addition we need to get:

• pcie_phy_lane_status0
• pcie_phy_lane_status1
• If we can figure out how to get into configuration space the link status register.

I would like to try to have this all be a single thing available on an MGS component on Sidecar that we can get this from to simplify a human trying to see everything, but it's not clear how that impacts MGS compat concerns.

[labbott]

• If we can figure out how to get into configuration space the link status register.

Can you be more specific about either a register name or bar/offset? I took a guess and couldn't find it in the reg map

[rmustacc]

Can you be more specific about either a register name or bar/offset? I took a guess and couldn't find it in the reg map

I need to dig into the SDE to track down how we actually get to normal PCI configuration space. This is a standard register in there.