diff --git a/ip_cards/HM_Verminator_SW_IP_Card.json b/ip_cards/HM_Verminator_SW_IP_Card.json
new file mode 100644
index 0000000..bc59028
--- /dev/null
+++ b/ip_cards/HM_Verminator_SW_IP_Card.json
@@ -0,0 +1,126 @@
+{
+  "schemaVersion": "0.9",
+  "basicInfo": {
+    "ipName": "Verminator Verilator-Based Fault-Injection Framework",
+    "version": "ISOLDE-D4.5-2026.07",
+    "status": "Prototype implemented",
+    "comment": "Draft metadata release derived from ISOLDE D4.5. The value in basicInfo.version identifies this card release, not necessarily the partner's product or repository tag. Partner confirmation is required before publication.",
+    "provider": [
+      {
+        "organizationName": "Munich University of Applied Sciences",
+        "organizationURL": "https://www.hm.edu/",
+        "organizationAlias": [
+          "HM"
+        ]
+      }
+    ],
+    "license": "Other",
+    "repositoryURL": "https://github.com/hm-aemy/verminator",
+    "project": "ISOLDE",
+    "workItem": "T4.3 / D4.5 Section 3.4.1",
+    "ipType": {
+      "category": [
+        "Software Tool",
+        "Fault Simulation",
+        "V&V Tools"
+      ],
+      "domain": [
+        "Safety"
+      ],
+      "comment": "Verilator AST instrumentation and configurable fault-injection campaigns",
+      "service": "no"
+    },
+    "licenseDetails": "Mixed open-source licensing reported as LGPL-3.0 and Apache-2.0. File-level licensing applies."
+  },
+  "systemLevelInfo": {
+    "architecture": "Generic RTL with RISC-V demonstrator use",
+    "processor": "Design-dependent",
+    "isaExtension": "Not applicable",
+    "board": "Host-based simulation",
+    "SOC": "SystemVerilog/Verilog design under test",
+    "SWDependencies": "Modified Verilator, C++ toolchain, SystemVerilog DPI and campaign configuration",
+    "requiresSpecializedTool": "Yes. The Verminator Verilator extension and compatible C++ build flow."
+  },
+  "interfaces": {
+    "CLI": [
+      "Build the instrumented model with the Verminator-enabled Verilator",
+      "Execute a configured fault-injection campaign"
+    ],
+    "API": [
+      "SystemVerilog DPI fault-control hooks",
+      "Custom C++ campaign-control integration"
+    ],
+    "inputArtifacts": [
+      {
+        "artifact": "RTL design",
+        "format": "SystemVerilog/Verilog"
+      },
+      {
+        "artifact": "Fault-injection configuration",
+        "format": "Configuration files"
+      },
+      {
+        "artifact": "Optional custom campaign controller",
+        "format": "C++ source"
+      }
+    ],
+    "outputArtifacts": [
+      {
+        "artifact": "Instrumented simulation model",
+        "format": "C++/executable"
+      },
+      {
+        "artifact": "Fault analysis report",
+        "format": "Report/log"
+      },
+      {
+        "artifact": "Simulation results",
+        "format": "Logs and result data"
+      }
+    ]
+  },
+  "deployment": {
+    "bundle": "Open-source Git repository containing the Verilator extension and campaign framework"
+  },
+  "features": {
+    "purpose": "Add simulation-based fault injection to Verilator through AST manipulation and DPI hooks.",
+    "validatedCapabilities": [
+      "DPI-hook insertion",
+      "Custom fault-model support",
+      "Executable simulation generation",
+      "Manual user-defined campaign execution"
+    ],
+    "limitations": [
+      "Literal and implicit HDL types/signals are limited to a maximum width of 64 bits.",
+      "Some automated analysis and preset features were incomplete at the D4.5 cut-off."
+    ],
+    "publicRepositoryStatus": "Public",
+    "sourceBasis": {
+      "deliverable": "ISOLDE D4.5 - Software for Hardware Design and Validation Implementation",
+      "section": "3.4.1 Verilator-based Fault-Injection Framework",
+      "swIpCardModel": "Schema v0.9 with basicInfo, systemLevelInfo, interfaces, deployment and features"
+    },
+    "requirementsSummary": {
+      "count": 8,
+      "ids": [
+        "FI-RTL-01",
+        "FI-RTL-02",
+        "FI-RTL-03",
+        "FI-RTL-04",
+        "FI-RTL-01",
+        "FI-RTL-02",
+        "FI-RTL-03",
+        "FI-RTL-04"
+      ]
+    },
+    "metadataReview": {
+      "partnerReviewRequired": true,
+      "items": [
+        "Replace the metadata release identifier with the exact product/repository version where available.",
+        "Confirm public repository or product URL.",
+        "Confirm licensing and redistribution wording.",
+        "Add a tool-specific TRL only if the partner has approved it."
+      ]
+    }
+  }
+}
diff --git a/ip_cards/HM_Verminator_SW_IP_Card.pdf b/ip_cards/HM_Verminator_SW_IP_Card.pdf
new file mode 100644
index 0000000..f910dcc
Binary files /dev/null and b/ip_cards/HM_Verminator_SW_IP_Card.pdf differ
diff --git a/ips/isolde.json b/ips/isolde.json
index 8e2570a..7124aae 100644
--- a/ips/isolde.json
+++ b/ips/isolde.json
@@ -1683,13 +1683,12 @@
   {
     "Project": "ISOLDE",
     "Name": "Verilator-based Fault-Injection Framework",
-    "URL": "",
+    "URL": "https://github.com/hm-aemy/verminator",
     "License": [
-      "LGPL-3.0",
-      "Apache-2.0"
+      "Others"
     ],
     "Status": "",
-    "Description": "TBD",
+    "Description": "A Fault-Injection framework automating the usage of the Verilator extension, which enables fault injection simulation with Verilator via SystemVerilogs DPI functionality.",
     "WI": [
       "ID 4.3.07"
     ],
@@ -1699,8 +1698,8 @@
       "Software",
       "Tool"
     ],
-    "IP_CARD_URL": "",
-    "IP_CARD_PDF_URL": ""
+    "IP_CARD_URL": "ip_cards/HM_Verminator_SW_IP_Card.json",
+    "IP_CARD_PDF_URL": "ip_cards/HM_Verminator_SW_IP_Card.pdf"
   },
   {
     "Project": "ISOLDE",