diff --git a/examples/scenario-intel-tcc/scenario-intel-tcc-sample.xml b/examples/scenario-intel-tcc/scenario-intel-tcc-sample.xml
new file mode 100644
index 0000000..9cb2a00
--- /dev/null
+++ b/examples/scenario-intel-tcc/scenario-intel-tcc-sample.xml
@@ -0,0 +1,282 @@
+
+
+
+
+
+
+ intel-tcc-sample
+ Intel TCC sample tuning profile (16-core i226 platform)
+
+
+
+
+
+
+ 0
+ false
+
+
+
+
+ 1
+ true
+
+
+
+
+ 2
+ true
+
+
+
+
+ 3
+ false
+
+
+ 4
+ false
+
+
+ 5
+ false
+
+
+ 6
+ false
+
+
+ 7
+ false
+
+
+ 8
+ false
+
+
+ 9
+ false
+
+
+ 10
+ false
+
+
+ 11
+ false
+
+
+ 12
+ false
+
+
+ 13
+ false
+
+
+ 14
+ false
+
+
+ 15
+ false
+
+
+
+
+
+
+
+
+
+ rt-core
+
+
+ performance
+
+ 3100
+ 3100
+
+
+
+
+ false
+
+
+ 0
+ disable
+
+
+ 1
+ disable
+
+
+ 2
+ disable
+
+
+ 3
+ disable
+
+
+
+
+
+
+ housekeeping
+
+
+ powersave
+ 400
+ 2100
+
+
+
+
+ false
+
+
+
+
+
+
+
+
+ 0
+ housekeeping
+
+
+
+
+ 1
+ rt-core
+
+
+
+
+ 2
+ rt-core
+
+
+
+
+ 3
+ housekeeping
+
+
+ 4
+ housekeeping
+
+
+ 5
+ housekeeping
+
+
+ 6
+ housekeeping
+
+
+ 7
+ housekeeping
+
+
+ 8
+ housekeeping
+
+
+ 9
+ housekeeping
+
+
+ 10
+ housekeeping
+
+
+ 11
+ housekeeping
+
+
+ 12
+ housekeeping
+
+
+ 13
+ housekeeping
+
+
+ 14
+ housekeeping
+
+
+ 15
+ housekeeping
+
+
+
+
+
+
+
+
+ 1
+
+ 36
+ 36
+
+
+
+
+
+
+
+
+ 1
+
+ 1
+
+
+ false
+
+
+
+
+
+ 2
+ 1
+
+ false
+
+
+
+
+
+
diff --git a/src/tsn_config_parser/universal_parser.py b/src/tsn_config_parser/universal_parser.py
index fa00ace..7118a06 100644
--- a/src/tsn_config_parser/universal_parser.py
+++ b/src/tsn_config_parser/universal_parser.py
@@ -12,7 +12,6 @@
import xml.etree.ElementTree as StdET
from pathlib import Path
from typing import Any, Dict, List, Optional, Set
-
import defusedxml.ElementTree as SafeET
import libyang
@@ -20,7 +19,6 @@
from tsn_config_parser.GE_dictionary import GE_Dictionary
from yang_modules import DEFAULT_YANG_DIR, load_yang_module
-
def _collect_json_prefixes(node: Any, keywords: List[str]) -> Set[str]:
"""Recursively collect and return YANG module prefixes from JSON content."""
prefixes = set()
@@ -220,7 +218,7 @@ def _extract_required_modules_from_block(
:rtype: List[str]
"""
req_modules = set()
- keywords = ["ietf", "ieee", "iana"]
+ keywords = ["ietf", "ieee", "iana", "intel"]
file_type = file_type.lower()
if file_type == "xml":
diff --git a/src/yang_modules/intel-tcc-config.yang b/src/yang_modules/intel-tcc-config.yang
new file mode 100644
index 0000000..2526249
--- /dev/null
+++ b/src/yang_modules/intel-tcc-config.yang
@@ -0,0 +1,542 @@
+// SPDX-FileCopyrightText: 2026 Intel Corporation
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+* Module Structure
+* ================
+*
+* module intel-tcc-config
+* └── leaf profile-id
+* ├── leaf profile-description
+* ├── container cpu-scheduling (tuna --isolate)
+* │ └── list cpu-assignment [cpu-id]
+* │ ├── leaf cpu-id
+* │ └── leaf isolate
+* │
+* ├── container cpu-frequency (cpupower)
+* │ ├── list frequency-profile [profile-id]
+* │ │ ├── leaf profile-id
+* │ │ ├── container frequency
+* │ │ │ ├── leaf governor (enum: performance|powersave|
+* │ │ │ │ ondemand|schedutil|
+* │ │ │ │ userspace|conservative)
+* │ │ │ ├── leaf min-freq-mhz
+* │ │ │ ├── leaf max-freq-mhz
+* │ │ │ └── must: perf -> min==max, max>=min
+* │ │ └── container idle
+* │ │ ├── leaf enable-all (idle-set -E)
+* │ │ ├── leaf disable-by-latency-us (idle-set -D)
+* │ │ └── list state-override [state-id]
+* │ │ ├── leaf state-id
+* │ │ └── leaf action (disable | enable)
+* │ └── container profile-assignment
+* │ └── list cpu-assignment [cpu-id]
+* │ ├── leaf cpu-id
+* │ └── leaf profile-ref (leafref -> frequency-profile)
+* │
+* ├── container uncore-frequency (wrmsr 0x620)
+* │ └── list cpu-ring-freq [cpu-id]
+* │ ├── leaf cpu-id
+* │ ├── leaf min-ring-ratio
+* │ ├── leaf max-ring-ratio
+* │ └── must: min == max
+* │
+* └── container platform-qos-resource-config (wrmsr 0xc8f)
+* └── list cpu-pqr-assoc [cpu-id]
+* ├── leaf cpu-id
+* ├── leaf class-of-service-id
+* └── container resource-monitoring
+* ├── leaf enabled
+* ├── leaf rmid-id (when enabled=true)
+* └── leaf rmid-label (when enabled=true)
+ */
+
+module intel-tcc-config {
+ yang-version "1.1";
+ namespace "urn:intel:params:xml:ns:yang:intel-tcc-config";
+ prefix tcc;
+
+ organization
+ "Intel Corporation";
+
+ contact
+ "Author: Hea Ming, Su ";
+
+ description
+ "Data model for Intel Time Coordinated Computing (TCC)
+ platform tuning.
+
+ Four subsystems are configured, listed in their required
+ application order:
+ 1. cpu-scheduling -- CPU isolation
+ 2. cpu-frequency -- frequency scaling and C-state control
+ 3. uncore-frequency
+ -- ring/uncore bus frequency
+ 4. platform-qos-resource-config
+ -- L3 cache allocation (CAT) and optional
+ resource monitoring (CMT/MBM)";
+
+ reference
+ "Intel 64 and IA-32 Architectures Software Developer's Manual,
+ Vol. 3B, Section 17.19 (Intel RDT);
+ Intel Time Coordinated Computing (TCC) User Guide
+ (Public Version 1) -- 2026 edition";
+
+ revision 2026-05-20 {
+ description
+ "Remove multi-instance support for tcc-configs.";
+ }
+
+ revision 2026-04-14 {
+ description
+ "Add multi-instance support for tcc-configs.";
+ }
+
+ revision 2026-04-08 {
+ description
+ "Initial version. Covers cpu-scheduling, cpu-frequency, uncore-frequency,
+ and platform-qos-resource-config subsystems.";
+ reference
+ "Intel Time Coordinated Computing (TCC) User Guide
+ (Public Version 1) -- 2026 edition";
+ }
+
+ // -----------------------------------------------------------------------
+ // Typedefs
+ // -----------------------------------------------------------------------
+
+ typedef cpu-id-type {
+ type uint32 {
+ range "0..65535";
+ }
+ description
+ "Logical CPU (hardware thread) identifier as reported by the OS.
+ The valid range is implementation-specific.";
+ }
+
+ typedef frequency-mhz-type {
+ type uint32 {
+ range "1..1000000";
+ }
+ units "megahertz";
+ description
+ "CPU or bus frequency expressed in MHz.
+ The supported range of values is implementation-specific.";
+ }
+
+ typedef governor-type {
+ type enumeration {
+ enum performance {
+ description
+ "Run the CPU at the maximum allowed frequency at all times.
+ Recommended for real-time and latency-sensitive workloads.";
+ }
+ enum powersave {
+ description
+ "Run the CPU at the minimum allowed frequency at all times.
+ Recommended for housekeeping or non-critical cores to save power.";
+ }
+ enum ondemand {
+ description
+ "Scale frequency up quickly when load increases, and down gradually
+ when load decreases.";
+ }
+ enum schedutil {
+ description
+ "Scale frequency based on CPU utilization information provided by
+ the kernel scheduler.";
+ }
+ enum userspace {
+ description
+ "Allow an external application to set the CPU frequency directly.
+ No automatic scaling is performed.";
+ }
+ enum conservative {
+ description
+ "Scale frequency up and down gradually in response to load changes.
+ Less aggressive than ondemand.";
+ }
+ }
+ description
+ "Linux CPUFreq scaling governor.
+ The set of governors available on a given platform is implementation-specific
+ and depends on the active CPUFreq driver and kernel configuration.";
+ }
+
+ typedef state-action-type {
+ type enumeration {
+ enum disable {
+ description
+ "Disable this C-state for the target CPU.";
+ }
+ enum enable {
+ description
+ "Re-enable this C-state for the target CPU.";
+ }
+ }
+ description
+ "Action to apply to an individual CPU idle state (C-state).";
+ }
+
+ typedef ring-ratio-type {
+ type uint8 {
+ range "0..255";
+ }
+ description
+ "Intel ring/uncore bus frequency expressed as a multiplier of
+ the platform base clock (typically 100 MHz).
+ The supported range of values is implementation-specific.";
+ }
+
+ typedef clos-id-type {
+ type uint8 {
+ range "0..15";
+ }
+ description
+ "Intel Resource Director Technology (RDT) Class of Service identifier (CLOSID).
+ Each CLOSID selects a cache allocation bitmask that governs L3 cache-way
+ access for assigned CPUs. The number of supported CLOSIDs is implementation-specific
+ and may be fewer than 16.";
+ }
+
+ typedef rmid-type {
+ type uint16 {
+ range "1..1023";
+ }
+ description
+ "Intel Resource Director Technology (RDT) Resource Monitoring ID
+ (RMID) used for L3 cache occupancy and memory bandwidth telemetry.
+ RMID 0 is reserved by hardware to indicate 'no monitoring'.
+ The number of supported RMIDs is implementation-specific
+ and may be fewer than the predefined range 1..1023.";
+ }
+
+ // -----------------------------------------------------------------------
+ // Top-level container
+ // -----------------------------------------------------------------------
+
+container tcc-config {
+
+ // -------------------------------------------------------------------
+ // TCC Configuration Profile information
+ // -------------------------------------------------------------------
+
+ description
+ "A named TCC platform tuning configuration Profile.";
+
+ leaf profile-id {
+ type string {
+ length "1..64";
+ pattern '[a-zA-Z_][a-zA-Z0-9_.\-]*';
+ }
+ description
+ "Unique identifier for this TCC configuration profile.
+ Examples: 'production-rt', 'debug'.";
+ }
+
+ leaf profile-description {
+ type string {
+ length "1..256";
+ }
+ description
+ "Human-readable description of this configuration profile.";
+ }
+
+ // -------------------------------------------------------------------
+ // 1. CPU Scheduling (isolation)
+ // -------------------------------------------------------------------
+
+ container cpu-scheduling {
+ description
+ "Per-CPU isolation settings. Isolated CPUs are removed from
+ the default scheduling and interrupt affinity masks so that
+ only explicitly assigned real-time tasks execute on them.";
+
+ list cpu-assignment {
+ key "cpu-id";
+ description
+ "Isolation setting for a single logical CPU.";
+
+ leaf cpu-id {
+ type cpu-id-type;
+ description
+ "Logical CPU to configure.";
+ }
+
+ leaf isolate {
+ type boolean;
+ default false;
+ description
+ "When true, the CPU is isolated from general-purpose scheduling
+ and default IRQ delivery.";
+ }
+ }
+ }
+
+ // -------------------------------------------------------------------
+ // 2. CPU Frequency (C-state + frequency scaling)
+ // -------------------------------------------------------------------
+
+ container cpu-frequency {
+ description
+ "Per-CPU frequency scaling and idle state (C-state) configuration.
+ Settings are grouped into named profiles that can be shared
+ across multiple CPUs via profile-assignment.";
+
+ list frequency-profile {
+ key "profile-id";
+ description
+ "A named frequency and idle configuration profile.";
+
+ leaf profile-id {
+ type string {
+ length "1..64";
+ }
+ description
+ "Unique human-readable identifier for this profile.
+ Examples: 'rt-core', 'housekeeping', 'fixed-3100MHz'.";
+ }
+
+ container frequency {
+ description
+ "CPU frequency scaling parameters for this profile.";
+
+ must "governor != 'performance' or min-freq-mhz = max-freq-mhz" {
+ error-message
+ "When governor is 'performance', min-freq-mhz must equal
+ max-freq-mhz to achieve a fixed operating frequency.";
+ }
+
+ must "max-freq-mhz >= min-freq-mhz" {
+ error-message
+ "max-freq-mhz must be greater than or equal to min-freq-mhz.";
+ }
+
+ leaf governor {
+ type governor-type;
+ mandatory true;
+ description
+ "Frequency scaling governor to apply.
+ Maps to 'cpupower frequency-set -g '.";
+ }
+
+ leaf min-freq-mhz {
+ type frequency-mhz-type;
+ mandatory true;
+ description
+ "Minimum CPU operating frequency in MHz.
+ Maps to 'cpupower frequency-set --min M'.";
+ }
+
+ leaf max-freq-mhz {
+ type frequency-mhz-type;
+ mandatory true;
+ description
+ "Maximum CPU operating frequency in MHz.
+ Maps to 'cpupower frequency-set --max M'.";
+ }
+ }
+
+ container idle {
+ description
+ "CPU idle state (C-state) control for this profile.
+ Three mechanisms are applied in order: enable-all first,
+ disable-by-latency-us second, and state-override last.
+ The available C-state indices are implementation-specific.";
+
+ leaf enable-all {
+ type boolean;
+ default false;
+ description
+ "When true, re-enable all C-states before applying
+ any disable operations.
+ Maps to 'cpupower idle-set -E'.";
+ }
+
+ leaf disable-by-latency-us {
+ type uint32;
+ units "microseconds";
+ description
+ "Disable all C-states whose exit latency exceeds this
+ value in microseconds.
+ Maps to 'cpupower idle-set -D '.";
+ }
+
+ list state-override {
+ key "state-id";
+ description
+ "Per-state enable or disable override. Entries here
+ take precedence over enable-all and
+ disable-by-latency-us.";
+
+ leaf state-id {
+ type uint8 {
+ range "0..31";
+ }
+ description
+ "C-state index to override. The mapping of indices
+ to states is implementation-specific.";
+ }
+
+ leaf action {
+ type state-action-type;
+ mandatory true;
+ description
+ "Action to apply to this C-state.";
+ }
+ }
+ }
+ }
+
+ container profile-assignment {
+ description
+ "Maps logical CPUs to frequency profiles.";
+
+ list cpu-assignment {
+ key "cpu-id";
+ description
+ "Assigns a logical CPU to a named frequency profile.";
+
+ leaf cpu-id {
+ type cpu-id-type;
+ description
+ "Logical CPU to assign.
+ Maps to the '-c ' argument of cpupower(1).";
+ }
+
+ leaf profile-ref {
+ type leafref {
+ path "../../../frequency-profile/profile-id";
+ }
+ mandatory true;
+ description
+ "Reference to the frequency-profile that governs this
+ CPU's frequency scaling and idle state policy.";
+ }
+ }
+ }
+ }
+
+ // -------------------------------------------------------------------
+ // 3. Uncore / Ring Bus Frequency
+ // -------------------------------------------------------------------
+
+ container uncore-frequency {
+ description
+ "Per-CPU ring/uncore bus frequency configuration.
+ Locking the ring frequency eliminates latency variation
+ caused by dynamic frequency scaling transitions.";
+
+ list cpu-ring-freq {
+ key "cpu-id";
+ description
+ "Ring frequency setting for one logical CPU.";
+
+ must "min-ring-ratio = max-ring-ratio" {
+ error-message
+ "min-ring-ratio must equal max-ring-ratio to lock the
+ ring bus at a constant frequency.";
+ }
+
+ leaf cpu-id {
+ type cpu-id-type;
+ description
+ "Logical CPU to configure.
+ Maps to the '-p ' argument of wrmsr(1).";
+ }
+
+ leaf min-ring-ratio {
+ type ring-ratio-type;
+ mandatory true;
+ description
+ "Minimum ring bus frequency ratio.
+ Maps to bits [15:8] of MSR 0x620.";
+ }
+
+ leaf max-ring-ratio {
+ type ring-ratio-type;
+ mandatory true;
+ description
+ "Maximum ring bus frequency ratio.
+ Maps to bits [7:0] of MSR 0x620.";
+ }
+ }
+ }
+
+ // -------------------------------------------------------------------
+ // 4. Platform QoS Resource Configuration (L3 CAT + CMT/MBM)
+ // -------------------------------------------------------------------
+
+ container platform-qos-resource-config {
+ description
+ "Per-CPU L3 cache allocation (Class of Service) assignment
+ and optional cache/memory bandwidth monitoring configuration
+ via Intel Resource Director Technology (RDT).";
+
+ list cpu-pqr-assoc {
+ key "cpu-id";
+ description
+ "CLOS and monitoring assignment for one logical CPU.";
+
+ leaf cpu-id {
+ type cpu-id-type;
+ description
+ "Logical CPU to configure.
+ Maps to the '-p ' argument of wrmsr(1).";
+ }
+
+ leaf class-of-service-id {
+ type clos-id-type;
+ mandatory true;
+ description
+ "Class of Service (CLOS) to assign to this CPU.
+ Determines which L3 cache-way allocation bitmask
+ applies to this CPU's memory accesses.
+ Maps to bits [33:32] of IA32_PQR_ASSOC (MSR 0xc8f).";
+ }
+
+ container resource-monitoring {
+ description
+ "Optional L3 cache occupancy and memory bandwidth
+ monitoring for this CPU via Intel RDT.";
+
+ leaf enabled {
+ type boolean;
+ default false;
+ description
+ "When true, L3 cache and memory bandwidth monitoring
+ is active for this CPU. When false (default), no
+ monitoring slot is consumed.";
+ }
+
+ leaf rmid-id {
+ when "../enabled = 'true'" {
+ description
+ "Only present when monitoring is enabled.";
+ }
+ type rmid-type;
+ mandatory true;
+ description
+ "Resource Monitoring ID (RMID) to assign to this CPU.
+ Maps to bits [9:0] of IA32_PQR_ASSOC (MSR 0xc8f).";
+ }
+
+ leaf rmid-label {
+ when "../enabled = 'true'" {
+ description
+ "Only present when monitoring is enabled.";
+ }
+ type string {
+ length "1..64";
+ }
+ description
+ "Human-readable label for this monitoring slot.
+ Used for documentation and tooling display only;
+ has no effect on the hardware configuration.";
+ }
+ }
+ }
+ }
+}
+}
+