diff --git a/.github/workflows/ccpp.yml b/.github/workflows/ccpp.yml index f293353765..8debd8006f 100644 --- a/.github/workflows/ccpp.yml +++ b/.github/workflows/ccpp.yml @@ -24,7 +24,7 @@ jobs: fail-fast: false steps: - - uses: actions/checkout@v6 + - uses: actions/checkout@v7 with: fetch-depth: '0' fetch-tags: 'true' @@ -154,7 +154,7 @@ jobs: - name: Upload results if: ${{ always() }} - uses: actions/upload-artifact@v6 + uses: actions/upload-artifact@v7 timeout-minutes: 1 with: name: Results-${{ env.runner_name }}-${{ env.runner_label }} diff --git a/.github/workflows/glibc_fault.yml b/.github/workflows/glibc_fault.yml index cdcee453ce..5cf0b6ebc4 100644 --- a/.github/workflows/glibc_fault.yml +++ b/.github/workflows/glibc_fault.yml @@ -31,7 +31,7 @@ jobs: fail-fast: false steps: - - uses: actions/checkout@v6 + - uses: actions/checkout@v7 with: fetch-depth: '0' fetch-tags: 'true' @@ -115,7 +115,7 @@ jobs: - name: Upload results if: ${{ always() }} - uses: actions/upload-artifact@v6 + uses: actions/upload-artifact@v7 timeout-minutes: 1 with: name: Results-${{ env.runner_name }}-${{ env.runner_label }} diff --git a/.github/workflows/hostrunner.yml b/.github/workflows/hostrunner.yml index dd1cb61105..2ad9f70e0c 100644 --- a/.github/workflows/hostrunner.yml +++ b/.github/workflows/hostrunner.yml @@ -24,7 +24,7 @@ jobs: fail-fast: false steps: - - uses: actions/checkout@v6 + - uses: actions/checkout@v7 with: fetch-depth: '0' fetch-tags: 'true' @@ -59,7 +59,7 @@ jobs: - name: Upload results if: ${{ always() }} - uses: actions/upload-artifact@v6 + uses: actions/upload-artifact@v7 timeout-minutes: 1 with: name: Results-${{ env.runner_name }}-${{ env.runner_label }} diff --git a/.github/workflows/instcountci.yml b/.github/workflows/instcountci.yml index f109a933ad..2c50f49981 100644 --- a/.github/workflows/instcountci.yml +++ b/.github/workflows/instcountci.yml @@ -23,7 +23,7 @@ jobs: fail-fast: false steps: - - uses: actions/checkout@v6 + - uses: actions/checkout@v7 with: fetch-depth: '0' fetch-tags: 'true' @@ -70,7 +70,7 @@ jobs: - name: Upload results if: ${{ always() }} - uses: actions/upload-artifact@v6 + uses: actions/upload-artifact@v7 timeout-minutes: 1 with: name: Results-${{ env.runner_name }}-${{ env.runner_label }} diff --git a/.github/workflows/mingw_build.yml b/.github/workflows/mingw_build.yml index df325610a4..adf63537f5 100644 --- a/.github/workflows/mingw_build.yml +++ b/.github/workflows/mingw_build.yml @@ -20,7 +20,7 @@ jobs: fail-fast: false steps: - - uses: actions/checkout@v6 + - uses: actions/checkout@v7 with: fetch-depth: '0' fetch-tags: 'true' @@ -47,7 +47,8 @@ jobs: run: | cmake -S . -B build -DCMAKE_BUILD_TYPE=$BUILD_TYPE -DCMAKE_TOOLCHAIN_FILE=$GITHUB_WORKSPACE/Data/CMake/toolchain_mingw.cmake \ -DMINGW_TRIPLE=$MINGW_TRIPLE -G Ninja -DENABLE_LTO=False -DENABLE_ASSERTIONS=True -DENABLE_X86_HOST_DEBUG=True -DBUILD_TESTING=False \ - -DCMAKE_INSTALL_PREFIX="$PWD"/build/install + -DCMAKE_INSTALL_PREFIX="$PWD"/build/install \ + -DBUILD_FEX_MINGW_TESTS=True -DLLVM_MINGW="$HOME/llvm-mingw/build/" - name: Build run: cmake --build build diff --git a/.github/workflows/pr-code-format.yml b/.github/workflows/pr-code-format.yml index 37ac402ebf..20bf886e35 100644 --- a/.github/workflows/pr-code-format.yml +++ b/.github/workflows/pr-code-format.yml @@ -14,7 +14,7 @@ jobs: steps: - name: Checkout - uses: actions/checkout@v4 + uses: actions/checkout@v7 with: ref: ${{ github.event.pull_request.head.sha }} @@ -39,7 +39,7 @@ jobs: run: which git-clang-format-19 - name: Setup Python env - uses: actions/setup-python@v4 + uses: actions/setup-python@v7 with: python-version: 3.11 cache: pip @@ -61,3 +61,19 @@ jobs: --start-rev "$START_REV" \ --end-rev "$END_REV" \ --changed-files "$CHANGED_FILES" + + - name: Check long CMake lines + if: always() + run: | + # check lines > 140 chars + # unit tests are left alone for now + # FEXInterpreter is also left alone until its long echo lines can be removed + echo "$CHANGED_FILES" | tr ',' '\n' | grep -ve "unittests\|External\|FEXInterpreter" \ + | grep -e "CMakeLists.txt\|\.cmake" | xargs -L1 wc -L | while read -r line; do + if [ "$(echo "$line" | cut -d' ' -f1)" -gt 140 ]; then + echo "$line" + fi + done | tee lines.txt + + # if any lines were emitted, fail + [ ! -s lines.txt ] \ No newline at end of file diff --git a/.github/workflows/steamrt4.yml b/.github/workflows/steamrt4.yml index ce3da7391d..b1fbd99383 100644 --- a/.github/workflows/steamrt4.yml +++ b/.github/workflows/steamrt4.yml @@ -23,7 +23,7 @@ jobs: fail-fast: false steps: - - uses: actions/checkout@v6 + - uses: actions/checkout@v7 with: fetch-depth: '0' fetch-tags: 'true' @@ -62,7 +62,7 @@ jobs: run: DESTDIR="$PWD"/install distrobox enter --name steamrt4 -- cmake --build build -t install - name: Upload libraries - uses: actions/upload-artifact@v6 + uses: actions/upload-artifact@v7 timeout-minutes: 1 with: overwrite: true diff --git a/.github/workflows/vixl_simulator.yml b/.github/workflows/vixl_simulator.yml index a17fb7d95b..f7f6c47b15 100644 --- a/.github/workflows/vixl_simulator.yml +++ b/.github/workflows/vixl_simulator.yml @@ -25,7 +25,7 @@ jobs: fail-fast: false steps: - - uses: actions/checkout@v6 + - uses: actions/checkout@v7 with: fetch-depth: '0' fetch-tags: 'true' @@ -75,7 +75,7 @@ jobs: - name: Upload results if: ${{ always() }} - uses: actions/upload-artifact@v6 + uses: actions/upload-artifact@v7 timeout-minutes: 1 with: name: Results-${{ env.runner_name }}-${{ env.runner_label }} diff --git a/.github/workflows/wine_dll_artifacts.yml b/.github/workflows/wine_dll_artifacts.yml index 7a4ca69a06..872c464994 100644 --- a/.github/workflows/wine_dll_artifacts.yml +++ b/.github/workflows/wine_dll_artifacts.yml @@ -17,7 +17,7 @@ jobs: fail-fast: false steps: - - uses: actions/checkout@v6 + - uses: actions/checkout@v7 with: fetch-depth: '0' fetch-tags: 'true' @@ -45,7 +45,7 @@ jobs: target: arm64ec - name: Upload libraries - uses: actions/upload-artifact@v6 + uses: actions/upload-artifact@v7 timeout-minutes: 1 with: overwrite: true diff --git a/.neocmake.toml b/.neocmake.toml new file mode 100644 index 0000000000..2030bb4e30 --- /dev/null +++ b/.neocmake.toml @@ -0,0 +1 @@ +line_max_words = 140 diff --git a/CMakeLists.txt b/CMakeLists.txt index 71d8a738a5..89765883ff 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -5,40 +5,69 @@ include(CheckIncludeFiles) check_include_files("gdb/jit-reader.h" HAVE_GDB_JIT_READER_H) option(BUILD_FEX_LINUX_TESTS "Build FEXLinuxTests (requires x86 compiler)" FALSE) +option(BUILD_FEX_MINGW_TESTS "Build FEXMingwTests (requires llvm-mingw compiler)" FALSE) option(BUILD_THUNKS "Build thunks" FALSE) -option(BUILD_FEXCONFIG "Build FEXConfig" TRUE) option(ENABLE_CLANG_THUNKS "Build thunks with clang" TRUE) + +option(BUILD_FEXCONFIG "Build FEXConfig" TRUE) option(ENABLE_IWYU "Enable the Include What You Use sanitizer" FALSE) option(ENABLE_LTO "Enable LTO with compilation" TRUE) -option(ENABLE_XRAY "Enable building with LLVM X-Ray" FALSE) +option(ENABLE_COVERAGE "Enable Code Coverage" FALSE) set(USE_LINKER "" CACHE STRING "Path to a custom linker program") + +option(ENABLE_XRAY "Enable building with LLVM X-Ray" FALSE) option(ENABLE_UBSAN "Enable the Clang Undefined Behavior Sanitizer" FALSE) option(ENABLE_ASAN "Enable the Clang Address Sanitizer" FALSE) option(ENABLE_TSAN "Enable the Clang Thread Sanitizer" FALSE) -option(ENABLE_COVERAGE "Enable Code Coverage" FALSE) + option(ENABLE_ASSERTIONS "Enable debug assertions" FALSE) option(ENABLE_GDB_SYMBOLS "Enable GDBSymbols integration support" ${HAVE_GDB_JIT_READER_H}) + option(ENABLE_STRICT_WERROR "Enable stricter -Werror" FALSE) option(ENABLE_WERROR "Enable -Werror" FALSE) + option(ENABLE_FEX_ALLOCATOR "Enable allocator for FEX" TRUE) option(ENABLE_JEMALLOC_GLIBC_ALLOC "Enable jemalloc glibc allocator" TRUE) + option(ENABLE_OFFLINE_TELEMETRY "Enable FEX offline telemetry" TRUE) option(ENABLE_COMPILE_TIME_TRACE "Enable time trace compile option" FALSE) + option(ENABLE_LIBCXX "Use LLVM's libc++ instead of the GNU libstdc++" FALSE) option(ENABLE_CCACHE "Enable ccache for build caching" TRUE) + option(ENABLE_VIXL_SIMULATOR "Use the VIXL simulator for emulation (only useful for CI testing)" FALSE) option(ENABLE_VIXL_DISASSEMBLER "Enable debug disassembler output with VIXL" FALSE) option(ENABLE_ZYDIS "Enable x86/x86-64 guest disassembler output with Zydis" FALSE) + option(USE_LEGACY_BINFMTMISC "Use legacy method of setting up binfmt_misc" FALSE) + option(ENABLE_FEXCORE_PROFILER "Enable FEXCore's timeline profiling capabilities" FALSE) set(FEXCORE_PROFILER_BACKEND "gpuvis" CACHE STRING "Set which backend to use for FEXCore's profiler") set_property(CACHE FEXCORE_PROFILER_BACKEND PROPERTY STRINGS gpuvis tracy) + option(ENABLE_GLIBC_ALLOCATOR_HOOK_FAULT "Enables glibc memory allocation hooking with fault for CI testing") + option(USE_PDB_DEBUGINFO "Build debug info in PDB format" FALSE) option(BUILD_STEAM_SUPPORT "Enable Steam integration" FALSE) -set(X86_32_TOOLCHAIN_FILE "${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/toolchain_x86_32.cmake" CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting i686") -set(X86_64_TOOLCHAIN_FILE "${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/toolchain_x86_64.cmake" CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting x86_64") +set(X86_32_TOOLCHAIN_FILE + "${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/toolchain_x86_32.cmake" + CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting i686") + +set(X86_64_TOOLCHAIN_FILE + "${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/toolchain_x86_64.cmake" + CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting x86_64") + +if (BUILD_FEX_MINGW_TESTS) + set(LLVM_MINGW "" CACHE FILEPATH "Path to llvm_mingw") + set(X86_32_MINGW_TOOLCHAIN_FILE + "${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/toolchain_mingw_x86_32.cmake" + CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting mingw_i686") + set(X86_64_MINGW_TOOLCHAIN_FILE + "${CMAKE_CURRENT_SOURCE_DIR}/Data/CMake/toolchain_mingw_x86_64.cmake" + CACHE FILEPATH "Toolchain file for the (cross-)compiler targeting mingw_x86_64") +endif() + set(X86_DEV_ROOTFS "/" CACHE FILEPATH "Path to the sysroot used for cross-compiling for i686 and x86_64") set(DATA_DIRECTORY "" CACHE PATH "Global data directory (override)") set(HOSTLIBS_DATA_DIRECTORY "" CACHE PATH "Global data directory (override)") @@ -81,7 +110,8 @@ else () message(STATUS "Clang version ${CMAKE_CXX_COMPILER_VERSION}") set(CLANG_MINIMUM_VERSION 13.0) if (CMAKE_CXX_COMPILER_VERSION VERSION_LESS ${CLANG_MINIMUM_VERSION}) - message(FATAL_ERROR "Clang version too old for FEX. Need at least ${CLANG_MINIMUM_VERSION} but has ${CMAKE_CXX_COMPILER_VERSION}") + message(FATAL_ERROR "Clang version too old for FEX. Need at least " + "${CLANG_MINIMUM_VERSION} but has ${CMAKE_CXX_COMPILER_VERSION}") endif() endif() @@ -137,7 +167,8 @@ if (ENABLE_FEXCORE_PROFILER) # Tracy can gather call stack samples in regular intervals, but this # isn't useful for us since it would usually sample opaque JIT code add_compile_definitions(TRACY_NO_SAMPLING=1) - # This pulls in libbacktrace which allocators in global constructors (before FEX can set up its allocator hooks) + # This pulls in libbacktrace which allocators in global constructors + # (before FEX can set up its allocator hooks) add_compile_definitions(TRACY_NO_CALLSTACK=1) if (MINGW) message(FATAL_ERROR "Tracy profiler not supported on MinGW") @@ -174,8 +205,7 @@ set(OVERRIDE_HASH "detect" CACHE STRING "Override the FEX git hash") get_property(IS_MULTI_CONFIG GLOBAL PROPERTY GENERATOR_IS_MULTI_CONFIG) if (NOT IS_MULTI_CONFIG AND NOT CMAKE_BUILD_TYPE) - set(CMAKE_BUILD_TYPE Release - CACHE STRING "Choose the type of build." FORCE) + set(CMAKE_BUILD_TYPE Release CACHE STRING "Choose the type of build." FORCE) message(STATUS "No build type set, defaulting to a Release build") endif() @@ -224,11 +254,17 @@ check_cxx_source_compiles( HAS_CLANG_PRESERVE_ALL) unset(CMAKE_REQUIRED_FLAGS) if (HAS_CLANG_PRESERVE_ALL) - if (MINGW) + message(STATUS "Clang version ${CMAKE_CXX_COMPILER_VERSION}") + set(CLANG_MINIMUM_VERSION 22.1) + if (MINGW AND CMAKE_CXX_COMPILER_VERSION VERSION_LESS ${CLANG_MINIMUM_VERSION}) message(STATUS "Ignoring broken clang::preserve_all support") set(HAS_CLANG_PRESERVE_ALL FALSE) else() message(STATUS "Has clang::preserve_all") + if (MINGW) + message(STATUS "Disabling asynchronous-unwind-tables due to bug with preserve_all and mingw") + add_compile_options(-fno-asynchronous-unwind-tables) + endif() endif() endif() @@ -246,7 +282,7 @@ check_cxx_source_compiles( return program_invocation_name == nullptr; }" HAS_PROGRAM_INVOCATION_NAME) -add_compile_definitions("HAS_PROGRAM_INVOCATION_NAME=${HAS_PROGRAM_INVOCATION_NAME}") +add_compile_definitions( "HAS_PROGRAM_INVOCATION_NAME=${HAS_PROGRAM_INVOCATION_NAME}") if (ENABLE_VIXL_SIMULATOR) # We can run the simulator on both x86-64 or AArch64 hosts @@ -278,7 +314,8 @@ if (ENABLE_COMPILE_TIME_TRACE) link_libraries(-ftime-trace) endif() -set(PTHREAD_LIB pthread) +set(THREADS_PREFER_PTHREAD_FLAG ON) +find_package(Threads REQUIRED) if (USE_LINKER) message(STATUS "Overriding linker to: ${USE_LINKER}") @@ -287,8 +324,8 @@ endif() if (ENABLE_LIBCXX) message(WARNING "This is an unsupported configuration and should only be used for testing") - set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++11 -stdlib=libc++") - set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -stdlib=libc++ -lc++abi") + string(APPEND CMAKE_CXX_FLAGS " -std=c++11 -stdlib=libc++") + string(APPEND CMAKE_EXE_LINKER_FLAGS " -stdlib=libc++ -lc++abi") endif() if (NOT ENABLE_OFFLINE_TELEMETRY) @@ -298,15 +335,16 @@ endif() if (ENABLE_UBSAN) # See https://github.com/FEX-Emu/FEX/pull/4494#issuecomment-2800608944 - # and related discussion for the use of -fno-sanitize=alignment -fno-sanitize=function - # with UBSAN. - # alignment: we don't follow a strict alignment policy, for example IR uses packed structs - # that are regularly access unaligned. - # function: syscalls cast function pointers to void (*)(unsigned long...), causing warnings - # related to this access. + # and related discussion for the use of -fno-sanitize=alignment and -fno-sanitize=function with UBSAN. + # alignment: we don't follow a strict alignment policy, for example IR uses packed structs that are regularly access unaligned. + # function: syscalls cast function pointers to void (*)(unsigned long...), causing warnings related to this access. add_compile_definitions(ENABLE_UBSAN=1) - add_compile_options(-fno-omit-frame-pointer -fsanitize=undefined -fno-sanitize=alignment -fno-sanitize=function -fno-sanitize-recover=undefined) - link_libraries(-fno-omit-frame-pointer -fsanitize=undefined -fno-sanitize=alignment -fno-sanitize=function -fno-sanitize-recover=undefined) + add_compile_options(-fno-omit-frame-pointer -fsanitize=undefined + -fno-sanitize=alignment -fno-sanitize=function + -fno-sanitize-recover=undefined) + link_libraries(-fno-omit-frame-pointer -fsanitize=undefined + -fno-sanitize=alignment -fno-sanitize=function + -fno-sanitize-recover=undefined) endif() if (ENABLE_ASAN) @@ -328,7 +366,8 @@ endif() if (ENABLE_JEMALLOC_GLIBC_ALLOC) # The glibc jemalloc subproject which hooks the glibc allocator. # Required for thunks to work. - # All host native libraries will use this allocator, while *most* other FEX internal allocations will use the other jemalloc allocator. + # All host native libraries will use this allocator, while *most* + # other FEX internal allocations will use the other jemalloc allocator. add_subdirectory(External/jemalloc_glibc/) elseif (NOT MINGW) message(STATUS @@ -354,11 +393,11 @@ if (USE_PDB_DEBUGINFO) add_link_options(-g -Wl,--pdb=) endif() -set(CMAKE_CXX_FLAGS_RELWITHDEBINFO "${CMAKE_CXX_FLAGS_RELWITHDEBINFO} -fno-omit-frame-pointer") -set(CMAKE_LINKER_FLAGS_RELWITHDEBINFO "${CMAKE_LINKER_FLAGS_RELWITHDEBINFO} -fno-omit-frame-pointer") +string(APPEND CMAKE_CXX_FLAGS_RELWITHDEBINFO " -fno-omit-frame-pointer") +string(APPEND CMAKE_LINKER_FLAGS_RELWITHDEBINFO " -fno-omit-frame-pointer") -set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -fomit-frame-pointer") -set(CMAKE_LINKER_FLAGS_RELEASE "${CMAKE_LINKER_FLAGS_RELEASE} -fomit-frame-pointer") +string(APPEND CMAKE_CXX_FLAGS_RELEASE " -fomit-frame-pointer") +string(APPEND CMAKE_LINKER_FLAGS_RELEASE " -fomit-frame-pointer") ## Modules ## list(APPEND CMAKE_MODULE_PATH ${CMAKE_SOURCE_DIR}/Data/CMake/) @@ -424,7 +463,8 @@ if (BUILD_TESTING) add_subdirectory(External/Catch2/) # Pull in catch_discover_tests definition - list(APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_SOURCE_DIR}/External/Catch2/contrib/") + list(APPEND CMAKE_MODULE_PATH + "${CMAKE_CURRENT_SOURCE_DIR}/External/Catch2/contrib/") endif() include(Catch) @@ -451,7 +491,8 @@ endif() if (NOT range-v3_FOUND) add_subdirectory(External/range-v3/) - target_compile_definitions(range-v3 INTERFACE RANGES_DISABLE_DEPRECATED_WARNINGS) + target_compile_definitions(range-v3 INTERFACE + RANGES_DISABLE_DEPRECATED_WARNINGS) endif() add_subdirectory(External/tiny-json/) @@ -492,11 +533,13 @@ if(ENABLE_WERROR OR ENABLE_STRICT_WERROR) endif() set(FEX_TUNE_COMPILE_FLAGS) + if (NOT TUNE_ARCH STREQUAL "generic") set(TUNE_ARCH_STRING "${TUNE_ARCH}") if(ARCHITECTURE_arm64) set(TUNE_ARCH_STRING "${TUNE_ARCH}+crc") endif() + check_cxx_compiler_flag("-march=${TUNE_ARCH_STRING}" COMPILER_SUPPORTS_ARCH_TYPE) if(COMPILER_SUPPORTS_ARCH_TYPE) list(APPEND FEX_TUNE_COMPILE_FLAGS "-march=${TUNE_ARCH_STRING}") @@ -513,19 +556,23 @@ if (TUNE_CPU STREQUAL "native") if(ARCHITECTURE_arm64) if (CMAKE_CXX_COMPILER_VERSION VERSION_GREATER_EQUAL 999999.0) # Clang 12.0 fixed the -mcpu=native bug with mixed big.little implementers - # Clang can not currently check for native Apple M1 type in hypervisor. Currently disabled + # Clang can not currently check for native Apple M1 type in hypervisor. + # Currently disabled check_cxx_compiler_flag("-mcpu=native" COMPILER_SUPPORTS_CPU_TYPE) if(COMPILER_SUPPORTS_CPU_TYPE) list(APPEND FEX_TUNE_COMPILE_FLAGS "-mcpu=native") endif() else() - execute_process(COMMAND python3 "${PROJECT_SOURCE_DIR}/Scripts/aarch64_fit_native.py" "/proc/cpuinfo" "${CMAKE_CXX_COMPILER_VERSION}" + execute_process(COMMAND python3 + "${PROJECT_SOURCE_DIR}/Scripts/aarch64_fit_native.py" + "/proc/cpuinfo" "${CMAKE_CXX_COMPILER_VERSION}" OUTPUT_VARIABLE AARCH64_CPU) string(STRIP ${AARCH64_CPU} AARCH64_CPU) execute_process(COMMAND python3 "${PROJECT_SOURCE_DIR}/Scripts/NeedDisabledSVE.py" RESULT_VARIABLE NEEDS_SVE_DISABLED) + if (NEEDS_SVE_DISABLED) message(STATUS "Platform has bugged SVE. Disabling") set(AARCH64_CPU "cortex-a78") @@ -547,7 +594,8 @@ elseif (NOT TUNE_CPU STREQUAL "none") if(COMPILER_SUPPORTS_CPU_TYPE) list(APPEND FEX_TUNE_COMPILE_FLAGS "-mcpu=${TUNE_CPU}") else() - message(FATAL_ERROR "Trying to compile cpu type '${TUNE_CPU}' but the compiler doesn't support this") + message(FATAL_ERROR "Trying to compile cpu type '${TUNE_CPU}' " + "but the compiler doesn't support this") endif() endif() @@ -610,19 +658,38 @@ add_compile_options(-Wall) if (BUILD_TESTING) message(STATUS "Unit tests are enabled") - set(TEST_JOB_COUNT "" CACHE STRING "Override number of parallel jobs to use while running tests") + set(TEST_JOB_COUNT "" CACHE STRING + "Override number of parallel jobs to use while running tests") if (TEST_JOB_COUNT) message(STATUS "Running tests with ${TEST_JOB_COUNT} jobs") elseif(CMAKE_VERSION VERSION_LESS "3.29") - execute_process(COMMAND "nproc" OUTPUT_STRIP_TRAILING_WHITESPACE OUTPUT_VARIABLE TEST_JOB_COUNT) + execute_process(COMMAND "nproc" + OUTPUT_STRIP_TRAILING_WHITESPACE + OUTPUT_VARIABLE TEST_JOB_COUNT) endif() + set(TEST_JOB_FLAG "-j${TEST_JOB_COUNT}") - # Runs the whole test suite, with large pages enabled to reduce the cost of fork() in ctest. + # When running "ninja tests", defined below, it is useful to intentionally + # oversubscribe the CPU cores since many of the tests spend their time idle. + if ("$CACHE{TEST_JOB_COUNT}" STREQUAL "") + execute_process(COMMAND "nproc" + OUTPUT_STRIP_TRAILING_WHITESPACE + OUTPUT_VARIABLE TESTS_TARGET_JOB_COUNT) + + math(EXPR TESTS_TARGET_JOB_COUNT "${TESTS_TARGET_JOB_COUNT} * 3 / 2") + set(TESTS_TARGET_JOB_FLAG "-j${TESTS_TARGET_JOB_COUNT}") + else() + set(TESTS_TARGET_JOB_FLAG ${TEST_JOB_FLAG}) + endif() + + # Runs the whole test suite, with large pages enabled to + # reduce the cost of fork() in ctest. add_custom_target(tests WORKING_DIRECTORY "${CMAKE_BINARY_DIR}" USES_TERMINAL - COMMAND ${CMAKE_COMMAND} -E env GLIBC_TUNABLES=glibc.malloc.hugetlb=1 ctest "--progress" "--timeout" "302" ${TEST_JOB_FLAG}) + COMMAND ${CMAKE_COMMAND} -E env GLIBC_TUNABLES=glibc.malloc.hugetlb=1 + ctest "--progress" "--timeout" "302" ${TESTS_TARGET_JOB_FLAG}) endif() add_subdirectory(External/SoftFloat-3e/) @@ -642,15 +709,15 @@ if (NOT BUILD_STEAM_SUPPORT) add_subdirectory(Data/AppConfig/) endif() -# Install the ThunksDB file -file(GLOB CONFIG_SOURCES CONFIGURE_DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/Data/*.json) - -# Any application configuration json file gets installed -foreach(CONFIG_SRC ${CONFIG_SOURCES}) - install(FILES ${CONFIG_SRC} - DESTINATION ${DATA_DIRECTORY}/ - COMPONENT Runtime) -endforeach() +if (NOT MINGW) + # Install the ThunksDB file + file(GLOB CONFIG_SOURCES CONFIGURE_DEPENDS ${CMAKE_CURRENT_SOURCE_DIR}/Data/*.json) + foreach(CONFIG_SRC ${CONFIG_SOURCES}) + install(FILES ${CONFIG_SRC} + DESTINATION ${DATA_DIRECTORY}/ + COMPONENT Runtime) + endforeach() +endif() if (BUILD_TESTING) add_subdirectory(unittests/) diff --git a/CodeEmitter/CodeEmitter/ASIMDOps.inl b/CodeEmitter/CodeEmitter/ASIMDOps.inl index 90576cfdc9..01c4ca90cb 100644 --- a/CodeEmitter/CodeEmitter/ASIMDOps.inl +++ b/CodeEmitter/CodeEmitter/ASIMDOps.inl @@ -768,6 +768,16 @@ public: ASIMD2RegMisc(0, size, 0b11101, rd, rn); } } + ///< size is the destination size. + ///< source size is the next size up. + void bfcvtn(QRegister rd, QRegister rn) { + ASIMD2RegMisc(0, SubRegSize::i32Bit, 0b10110, rd.D(), rn.D()); + } + ///< size is the destination size. + ///< source size is the next size up. + void bfcvtn2(QRegister rd, QRegister rn) { + ASIMD2RegMisc(0, SubRegSize::i32Bit, 0b10110, rd, rn); + } template void rev32(SubRegSize size, T rd, T rn) { diff --git a/Data/CMake/LinkerGC.cmake b/Data/CMake/LinkerGC.cmake index d7b2fac5c8..ea70bbf786 100644 --- a/Data/CMake/LinkerGC.cmake +++ b/Data/CMake/LinkerGC.cmake @@ -3,7 +3,7 @@ # This applies some common linker options that reduce code size and linking time in Release mode. Namely: # --gc-sections: Linktime garbage collection, discards unused sections from the final output # --strip-all : Similar to running `strip`, discards the symbol table from the final output -# --as-needed : Only includes libraries that are actually needed in the final output. +# --as-needed : Only includes libraries that are actually needed in the final output macro(LinkerGC target) if (CMAKE_BUILD_TYPE MATCHES "RELEASE") diff --git a/Data/CMake/toolchain_mingw.cmake b/Data/CMake/toolchain_mingw.cmake index cff0b7b271..d35324313b 100644 --- a/Data/CMake/toolchain_mingw.cmake +++ b/Data/CMake/toolchain_mingw.cmake @@ -6,14 +6,17 @@ set(CMAKE_CXX_COMPILER ${MINGW_TRIPLE}-clang++) set(CMAKE_DLLTOOL ${MINGW_TRIPLE}-dlltool) set(CMAKE_AR ${MINGW_TRIPLE}-ar) -# Compile everything as static to avoid requiring the MinGW runtime libraries, force page aligned sections so that -# debug symbols work correctly, and disable loop alignment to workaround an LLVM bug +# Compile everything as static to avoid requiring the MinGW runtime libraries, +# force page aligned sections so that debug symbols work correctly, +# and disable loop alignment to workaround an LLVM bug # (https://github.com/llvm/llvm-project/issues/47432) set(CMAKE_SHARED_LINKER_FLAGS_INIT "-static -Wl,--file-alignment=4096,/mllvm:-align-loops=1") set(CMAKE_EXE_LINKER_FLAGS_INIT "-static -Wl,--file-alignment=4096,/mllvm:-align-loops=1") + set(CMAKE_C_STANDARD_LIBRARIES "" CACHE STRING "" FORCE) set(CMAKE_CXX_STANDARD_LIBRARIES "" CACHE STRING "" FORCE) set(CMAKE_STANDARD_LIBRARIES "" CACHE STRING "" FORCE) + set(CMAKE_SYSTEM_NAME Windows) set(CMAKE_SYSTEM_PROCESSOR ${MINGW_TRIPLE}) diff --git a/Data/CMake/toolchain_mingw_x86_32.cmake b/Data/CMake/toolchain_mingw_x86_32.cmake new file mode 100644 index 0000000000..a3ad26b35a --- /dev/null +++ b/Data/CMake/toolchain_mingw_x86_32.cmake @@ -0,0 +1,30 @@ +set(CMAKE_SYSTEM_PROCESSOR i686) + +set(LLVM_MINGW "" CACHE FILEPATH "Path to LLVM_MINGW") +if (LLVM_MINGW) + set(LLVM_MINGW_BIN "${LLVM_MINGW}/bin/") +else() + set(LLVM_MINGW_BIN "") +endif() + +set(MINGW_TRIPLE "i686-w64-mingw32") + +set(CMAKE_RC_COMPILER ${LLVM_MINGW_BIN}${MINGW_TRIPLE}-windres) +set(CMAKE_C_COMPILER ${LLVM_MINGW_BIN}${MINGW_TRIPLE}-clang) +set(CMAKE_CXX_COMPILER ${LLVM_MINGW_BIN}${MINGW_TRIPLE}-clang++) +set(CMAKE_DLLTOOL ${LLVM_MINGW_BIN}${MINGW_TRIPLE}-dlltool) +set(CMAKE_AR ${LLVM_MINGW_BIN}${MINGW_TRIPLE}-ar) + +# Compile everything as static to avoid requiring the MinGW runtime libraries, force page aligned sections so that +# debug symbols work correctly, and disable loop alignment to workaround an LLVM bug +# (https://github.com/llvm/llvm-project/issues/47432) +set(CMAKE_SHARED_LINKER_FLAGS_INIT "-static -Wl,--file-alignment=4096,/mllvm:-align-loops=1") +set(CMAKE_EXE_LINKER_FLAGS_INIT "-static -Wl,--file-alignment=4096,/mllvm:-align-loops=1") +set(CMAKE_C_STANDARD_LIBRARIES "" CACHE STRING "" FORCE) +set(CMAKE_CXX_STANDARD_LIBRARIES "" CACHE STRING "" FORCE) +set(CMAKE_STANDARD_LIBRARIES "" CACHE STRING "" FORCE) +set(CMAKE_SYSTEM_NAME Windows) +set(CMAKE_SYSTEM_PROCESSOR ${MINGW_TRIPLE}) + +set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY) + diff --git a/Data/CMake/toolchain_mingw_x86_64.cmake b/Data/CMake/toolchain_mingw_x86_64.cmake new file mode 100644 index 0000000000..76edb9ff59 --- /dev/null +++ b/Data/CMake/toolchain_mingw_x86_64.cmake @@ -0,0 +1,29 @@ +set(CMAKE_SYSTEM_PROCESSOR x86_64) + +set(LLVM_MINGW "" CACHE FILEPATH "Path to LLVM_MINGW") +if (LLVM_MINGW) + set(LLVM_MINGW_BIN "${LLVM_MINGW}/bin/") +else() + set(LLVM_MINGW_BIN "") +endif() + +set(MINGW_TRIPLE "x86_64-w64-mingw32") + +set(CMAKE_RC_COMPILER ${LLVM_MINGW_BIN}${MINGW_TRIPLE}-windres) +set(CMAKE_C_COMPILER ${LLVM_MINGW_BIN}${MINGW_TRIPLE}-clang) +set(CMAKE_CXX_COMPILER ${LLVM_MINGW_BIN}${MINGW_TRIPLE}-clang++) +set(CMAKE_DLLTOOL ${LLVM_MINGW_BIN}${MINGW_TRIPLE}-dlltool) +set(CMAKE_AR ${LLVM_MINGW_BIN}${MINGW_TRIPLE}-ar) + +# Compile everything as static to avoid requiring the MinGW runtime libraries, force page aligned sections so that +# debug symbols work correctly, and disable loop alignment to workaround an LLVM bug +# (https://github.com/llvm/llvm-project/issues/47432) +set(CMAKE_SHARED_LINKER_FLAGS_INIT "-static -Wl,--file-alignment=4096,/mllvm:-align-loops=1") +set(CMAKE_EXE_LINKER_FLAGS_INIT "-static -Wl,--file-alignment=4096,/mllvm:-align-loops=1") +set(CMAKE_C_STANDARD_LIBRARIES "" CACHE STRING "" FORCE) +set(CMAKE_CXX_STANDARD_LIBRARIES "" CACHE STRING "" FORCE) +set(CMAKE_STANDARD_LIBRARIES "" CACHE STRING "" FORCE) +set(CMAKE_SYSTEM_NAME Windows) +set(CMAKE_SYSTEM_PROCESSOR ${MINGW_TRIPLE}) + +set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY) diff --git a/Data/binfmts/CMakeLists.txt b/Data/binfmts/CMakeLists.txt index e70cb6f171..02df8fa326 100644 --- a/Data/binfmts/CMakeLists.txt +++ b/Data/binfmts/CMakeLists.txt @@ -15,7 +15,8 @@ if (NOT USE_LEGACY_BINFMTMISC) configure_file(FEX-x86.conf.in ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86.conf) configure_file(FEX-x86_64.conf.in ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86_64.conf) - install(FILES ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86.conf ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86_64.conf + install(FILES ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86.conf + ${CMAKE_BINARY_DIR}/Data/binfmts/FEX-x86_64.conf DESTINATION ${CMAKE_INSTALL_PREFIX}/lib/binfmt.d/ COMPONENT Runtime) else() diff --git a/External/code-format-helper/requirements_formatting.txt b/External/code-format-helper/requirements_formatting.txt index d175b9f2fd..da973e3ae1 100644 --- a/External/code-format-helper/requirements_formatting.txt +++ b/External/code-format-helper/requirements_formatting.txt @@ -4,40 +4,40 @@ # # pip-compile --generate-hashes --output-file=requirements_formatting.txt --strip-extras requirements_formatting.txt.in # -black==26.3.1 \ - --hash=sha256:0126ae5b7c09957da2bdbd91a9ba1207453feada9e9fe51992848658c6c8e01c \ - --hash=sha256:0f76ff19ec5297dd8e66eb64deda23631e642c9393ab592826fd4bdc97a4bce7 \ - --hash=sha256:28ef38aee69e4b12fda8dba75e21f9b4f979b490c8ac0baa7cb505369ac9e1ff \ - --hash=sha256:2bd5aa94fc267d38bb21a70d7410a89f1a1d318841855f698746f8e7f51acd1b \ - --hash=sha256:2c50f5063a9641c7eed7795014ba37b0f5fa227f3d408b968936e24bc0566b07 \ - --hash=sha256:2d6bfaf7fd0993b420bed691f20f9492d53ce9a2bcccea4b797d34e947318a78 \ - --hash=sha256:41cd2012d35b47d589cb8a16faf8a32ef7a336f56356babd9fcf70939ad1897f \ - --hash=sha256:474c27574d6d7037c1bc875a81d9be0a9a4f9ee95e62800dab3cfaadbf75acd5 \ - --hash=sha256:5602bdb96d52d2d0672f24f6ffe5218795736dd34807fd0fd55ccd6bf206168b \ - --hash=sha256:5e9d0d86df21f2e1677cc4bd090cd0e446278bcbbe49bf3659c308c3e402843e \ - --hash=sha256:5ed0ca58586c8d9a487352a96b15272b7fa55d139fc8496b519e78023a8dab0a \ - --hash=sha256:6c54a4a82e291a1fee5137371ab488866b7c86a3305af4026bdd4dc78642e1ac \ - --hash=sha256:6e131579c243c98f35bce64a7e08e87fb2d610544754675d4a0e73a070a5aa3a \ - --hash=sha256:855822d90f884905362f602880ed8b5df1b7e3ee7d0db2502d4388a954cc8c54 \ - --hash=sha256:86a8b5035fce64f5dcd1b794cf8ec4d31fe458cf6ce3986a30deb434df82a1d2 \ - --hash=sha256:8a33d657f3276328ce00e4d37fe70361e1ec7614da5d7b6e78de5426cb56332f \ - --hash=sha256:92c0ec1f2cc149551a2b7b47efc32c866406b6891b0ee4625e95967c8f4acfb1 \ - --hash=sha256:9a5e9f45e5d5e1c5b5c29b3bd4265dcc90e8b92cf4534520896ed77f791f4da5 \ - --hash=sha256:afc622538b430aa4c8c853f7f63bc582b3b8030fd8c80b70fb5fa5b834e575c2 \ - --hash=sha256:b07fc0dab849d24a80a29cfab8d8a19187d1c4685d8a5e6385a5ce323c1f015f \ - --hash=sha256:b5e6f89631eb88a7302d416594a32faeee9fb8fb848290da9d0a5f2903519fc1 \ - --hash=sha256:bf9bf162ed91a26f1adba8efda0b573bc6924ec1408a52cc6f82cb73ec2b142c \ - --hash=sha256:c7e72339f841b5a237ff14f7d3880ddd0fc7f98a1199e8c4327f9a4f478c1839 \ - --hash=sha256:ddb113db38838eb9f043623ba274cfaf7d51d5b0c22ecb30afe58b1bb8322983 \ - --hash=sha256:dfdd51fc3e64ea4f35873d1b3fb25326773d55d2329ff8449139ebaad7357efb \ - --hash=sha256:f1cd08e99d2f9317292a311dfe578fd2a24b15dbce97792f9c4d752275c1fa56 \ - --hash=sha256:f89f2ab047c76a9c03f78d0d66ca519e389519902fa27e7a91117ef7611c0568 +black==26.10.1 \ + --hash=sha256:03c0ddd93bb392e71209903a691767eb366fe1a76deb9509ccbaae9e1f14bb52 \ + --hash=sha256:0ce08b367307b0fd91c9dd1d4084e62b05b3055475f951f0f34a46b6e2393b64 \ + --hash=sha256:182f6c32be38074b16d378498c498b32cb51928178ee611485344972c35ec9c6 \ + --hash=sha256:1935b32f5326028019856e18cb42b4da63db23765dc84464cec723e0de478a9b \ + --hash=sha256:19fa8f5beb5e77c54c9c7e21d00cc93ed6c8b6228ee385616906d6befe081143 \ + --hash=sha256:2520037aa62f8a1454d0811b8f5c88b444445b03a4bfba480d8d220893b64c34 \ + --hash=sha256:28842f9a8207cc1df6eb983a35a14c5a0dfcd603d214fe82d84bef552afd2e3a \ + --hash=sha256:289282aa2e09d3162312a3be1788ff21b08e9ea9cc4a81e656024728b32428fb \ + --hash=sha256:2ffbc023a12d0c729408823b8f10514490bd0baa301d0d4e21a7240249f9507f \ + --hash=sha256:3414a0c52901964dceabd98c7c56beac0f964115a116ecedcce7247359b14017 \ + --hash=sha256:4d9a90516db1d99c25dbb20cc0998e0e01531dd903466c7744e56d66f864220a \ + --hash=sha256:51d5e417e700fe6ec0b0ecdc408c6f6cb5def80328f31f724993d82c6486b746 \ + --hash=sha256:5cd88fd7b444ca51f3fc883b6f6657ea53a258b0b2eef6d9f2dfcfa17ce0e27b \ + --hash=sha256:5f9f83beae62437e060dafd53d7f1fc327e3d3494f74d72ee5c2b73eb90fc4e7 \ + --hash=sha256:70ccbd175b7f6be29d2b727ee7ca6b4c54053df59da653a6df80b175d20a94fa \ + --hash=sha256:7bdade400bfe24d78a7762896acc2f9a8e1a17fb0fd0536bf6b7c7097cf3eec7 \ + --hash=sha256:8375962579d537364cc0efa19b1474481915d3a793f9fc0774901814c5e5b5f4 \ + --hash=sha256:978113a40223a6aaefc17364176a809a320e6b288683841427fff04c6d7b4130 \ + --hash=sha256:9a0219b29cd70e49f920acb7081e6ce5025c719008447c521d0200dcad93206a \ + --hash=sha256:b5347d760f0c02bb00dd249384cab71c3bf828b4f68d5b401eb116e0390f147d \ + --hash=sha256:b6272cfd7e1e8e271f5b0e0207259fe2834687e5cb9b5f620b34a44db9754993 \ + --hash=sha256:d42dd2fac7c342ae67e64ee99c9532e20b2a84e92c79ed3317fa2ef54c801d93 \ + --hash=sha256:d5bd3518d8e97138fef295230b1e9804076d69fa4e3594071494a8c68abe6266 \ + --hash=sha256:d8b3a9074a680b3c5749633714e9ae3992a1e5a23343a97ad61cd9b119b444d2 \ + --hash=sha256:f6dba8138cdc99061ef07b958ac082d2aa057b6961d1936f9717c350f02bab5f \ + --hash=sha256:fe85fc4019bee59bc495c0f2a8ee76c5cd02c7015508d94a967ba2376f39a52c \ + --hash=sha256:ff57f63029aa1353fa8b1b0c8971fd88a6c92dc766608d2eee33ad2deb23270e # via # -r requirements_formatting.txt.in # darker -certifi==2025.7.14 \ - --hash=sha256:6b31f564a415d79ee77df69d757bb49a5bb53bd9f756cbbe24394ffd6fc1f4b2 \ - --hash=sha256:8ea99dbdfaaf2ba2f9bac77b9249ef62ec5218e7c2b2e903378ed5fccf765995 +certifi==2026.10.19 \ + --hash=sha256:035c1e85572b141bf1c3a3eff0e33a8eb74917522f2559075ff8d2fea780a1ae \ + --hash=sha256:42d35340cc5b9ba78e818ddbff0c5b1c2b779de448a340fd1b989f5fa8670e1b # via # -r requirements_formatting.txt.in # requests @@ -403,9 +403,9 @@ typing-extensions==4.14.1 \ --hash=sha256:38b39f4aeeab64884ce9f74c94263ef78f3c22467c8724005483154c26648d36 \ --hash=sha256:d1e1e3b58374dc93031d6eda2420a48ea44a36c2b4766a4fdeb3710755731d76 # via pygithub -urllib3==2.7.0 \ - --hash=sha256:231e0ec3b63ceb14667c67be60f2f2c40a518cb38b03af60abc813da26505f4c \ - --hash=sha256:9fb4c81ebbb1ce9531cce37674bbc6f1360472bc18ca9a553ede278ef7276897 +urllib3==2.8.0 \ + --hash=sha256:0cf3cae568d36aa9576b28dfb35f11328f1cb974ca7647d9475ebb86c75ac6e3 \ + --hash=sha256:63bf2ead4c879426ebf22ef2a781eeb4aa3b4ae798a0435506f8687fd5bb9b63 # via # -r requirements_formatting.txt.in # pygithub diff --git a/External/code-format-helper/requirements_formatting.txt.in b/External/code-format-helper/requirements_formatting.txt.in index ad31dc8caa..9d5f77e79d 100644 --- a/External/code-format-helper/requirements_formatting.txt.in +++ b/External/code-format-helper/requirements_formatting.txt.in @@ -1,10 +1,10 @@ -black>=26.3.1 +black>=26.10.1 darker==2.1.1 PyGithub==2.6.1 cryptography>=50.0.0 -urllib3>=2.7.0 +urllib3>=2.8.0 requests>=2.33.0 idna>=3.15 -certifi>=2024.7.4 +certifi>=2026.10.19 PyNaCl>=1.6.2 PyJWT>=2.15.1 diff --git a/External/rpmalloc b/External/rpmalloc index 09142d7264..ed227446af 160000 --- a/External/rpmalloc +++ b/External/rpmalloc @@ -1 +1 @@ -Subproject commit 09142d726429416bfa7b459151515fe3ab7622dd +Subproject commit ed227446afce6ff505b312bae1e10a3daaeeea39 diff --git a/External/vixl b/External/vixl index 585d860b12..6561d40650 160000 --- a/External/vixl +++ b/External/vixl @@ -1 +1 @@ -Subproject commit 585d860b12cdfc3a72f5fdad5e02e4d50a64c014 +Subproject commit 6561d40650885ad24fbd0aa0cdb20ccb4808d444 diff --git a/FEXCore/CMakeLists.txt b/FEXCore/CMakeLists.txt index e61f1b9f98..a44e14a5d5 100644 --- a/FEXCore/CMakeLists.txt +++ b/FEXCore/CMakeLists.txt @@ -33,9 +33,11 @@ configure_file(${CMAKE_CURRENT_SOURCE_DIR}/include/git_version.h.in include_directories(${CMAKE_BINARY_DIR}/generated) # Disable strict aliasing for all build modes -# See discussion in https://github.com/FEX-Emu/FEX/pull/4494#issuecomment-2800608944 +# See discussion in +# https://github.com/FEX-Emu/FEX/pull/4494#issuecomment-2800608944 # for background context. -add_compile_options($<$:-fno-strict-aliasing> $<$:-fno-exceptions>) +add_compile_options($<$:-fno-strict-aliasing> + $<$:-fno-exceptions>) add_subdirectory(Source/) diff --git a/FEXCore/Source/CMakeLists.txt b/FEXCore/Source/CMakeLists.txt index dd8e4aa240..61385d2c31 100644 --- a/FEXCore/Source/CMakeLists.txt +++ b/FEXCore/Source/CMakeLists.txt @@ -104,9 +104,13 @@ if (ENABLE_ZYDIS) endif() if (ARCHITECTURE_arm64 AND HAS_CLANG_PRESERVE_ALL) - list(APPEND DEFINES "-DFEXCORE_PRESERVE_ALL_ATTR=__attribute__((preserve_all));-DFEXCORE_HAS_PRESERVE_ALL_ATTR=1") + list(APPEND DEFINES + "-DFEXCORE_PRESERVE_ALL_ATTR=__attribute__((preserve_all))" + "-DFEXCORE_HAS_PRESERVE_ALL_ATTR=1") else() - list(APPEND DEFINES "-DFEXCORE_PRESERVE_ALL_ATTR=;-DFEXCORE_HAS_PRESERVE_ALL_ATTR=0") + list(APPEND DEFINES + "-DFEXCORE_PRESERVE_ALL_ATTR=" + "-DFEXCORE_HAS_PRESERVE_ALL_ATTR=0") endif() set(LIBS fmt::fmt xxHash::xxhash FEXHeaderUtils CodeEmitter cephes_128bit) @@ -187,8 +191,8 @@ add_custom_command( OUTPUT "${OUTPUT_MAN_NAME}" DEPENDS "${INPUT_CONFIG_NAME}" DEPENDS "${CMAKE_CURRENT_SOURCE_DIR}/../Scripts/config_generator.py" - COMMAND "python3" "${CMAKE_CURRENT_SOURCE_DIR}/../Scripts/config_generator.py" "${INPUT_CONFIG_NAME}" "${OUTPUT_CONFIG_NAME}" "${OUTPUT_MAN_NAME}" - "${OUTPUT_CONFIG_OPTION_NAME}") + COMMAND "python3" "${CMAKE_CURRENT_SOURCE_DIR}/../Scripts/config_generator.py" + "${INPUT_CONFIG_NAME}" "${OUTPUT_CONFIG_NAME}" "${OUTPUT_MAN_NAME}" "${OUTPUT_CONFIG_OPTION_NAME}") add_custom_command( OUTPUT "${OUTPUT_MAN_NAME_COMPRESS}" @@ -284,8 +288,8 @@ function(AddLibrary Name Type) add_library(${Name} ${Type} $) set_target_properties(${Name} PROPERTIES OUTPUT_NAME FEXCore) - # During generation of the import library (dll.a), MinGW needs some extra symbols from libraries - # such as fmt, which are propagated by FEXCore_Base. Wonderful. + # During generation of the import library (dll.a), MinGW needs some extra + # symbols from libraries such as fmt, which are propagated by FEXCore_Base if (MINGW) target_link_libraries(${Name} PRIVATE FEXCore_Base) endif() @@ -311,7 +315,8 @@ if (ENABLE_FEX_ALLOCATOR) target_include_directories(JemallocLibs PRIVATE "${PROJECT_SOURCE_DIR}/include/") endif() if (ENABLE_JEMALLOC_GLIBC_ALLOC) - set_source_files_properties(Interface/HLE/Thunks/Thunks.cpp PROPERTIES COMPILE_DEFINITIONS ENABLE_JEMALLOC_GLIBC=1) + set_source_files_properties(Interface/HLE/Thunks/Thunks.cpp + PROPERTIES COMPILE_DEFINITIONS ENABLE_JEMALLOC_GLIBC=1) target_link_libraries(JemallocLibs INTERFACE FEX_jemalloc_glibc) endif() diff --git a/FEXCore/Source/Interface/Config/Config.json.in b/FEXCore/Source/Interface/Config/Config.json.in index 938377f324..602b2a50d0 100644 --- a/FEXCore/Source/Interface/Config/Config.json.in +++ b/FEXCore/Source/Interface/Config/Config.json.in @@ -42,6 +42,19 @@ "Enable expensive validation when loading code caches" ] }, + "JITFeatures": { + "Type": "strenum", + "Default": "FEXCore::Config::JITFeatures::OFF", + "AffectsCodeGen": "true", + "Enums": { + "ENABLEX87FIP": "enablex87fip" + }, + "Desc": [ + "Allows controlling JIT features in the unified location", + "\toff: Default JIT features.", + "\tenablex87fip: Turns on the x87 FIP emulation feature" + ] + }, "HostFeatures": { "Type": "strenum", "Default": "FEXCore::Config::HostFeatures::OFF", @@ -95,7 +108,11 @@ "ENABLEI8MM": "enablei8mm", "DISABLEI8MM": "disablei8mm", "ENABLEDOTPROD": "enabledotprod", - "DISABLEDOTPROD": "disabledotprod" + "DISABLEDOTPROD": "disabledotprod", + "ENABLEBF16": "enablebf16", + "DISABLEBF16": "disablebf16", + "ENABLETPIDRRO": "enabletpidrro", + "DISABLETPIDRRO": "disabletpidrro" }, "Desc": [ "Allows controlling of the CPU features in the JIT.", @@ -122,7 +139,9 @@ "\t{enable,disable}sse4a: Will force enable or disable SSE4a even if the host doesn't support it", "\t{enable,disable}mops: Will force enable or disable FEAT_MOPS even if the host doesn't support it", "\t{enable,disable}i8mm: Will force enable or disable i8mm even if the host doesn't support it", - "\t{enable,disable}dotprod: Will force enable or disable dotprod even if the host doesn't support it" + "\t{enable,disable}dotprod: Will force enable or disable dotprod even if the host doesn't support it", + "\t{enable,disable}bf16: Will force enable or disable bf16 even if the host doesn't support it", + "\t{enable,disable}tpidrro: Will force enable or disable tpidrro for CPU index even if the host doesn't support it" ] }, "SmallTSCScale": { @@ -354,6 +373,15 @@ "Can potentially introduce more stutters, more likely the higher the number.", "Don't have this number larger than the increase count!" ] + }, + "UndefinedFlagAcidTest": { + "Type": "bool", + "Default": "false", + "AffectsCodeGen": "true", + "Desc": [ + "Ensures that all undefined flags generate consistent results", + "This is a useful test to determine if undefined flags are causing problems" + ] } }, "Debug": { diff --git a/FEXCore/Source/Interface/Context/Context.h b/FEXCore/Source/Interface/Context/Context.h index 9f427da200..9b91055bd0 100644 --- a/FEXCore/Source/Interface/Context/Context.h +++ b/FEXCore/Source/Interface/Context/Context.h @@ -371,6 +371,7 @@ class ContextImpl final : public FEXCore::Context::Context, public CPU::SharedCo FEX_CONFIG_OPT(SoftwareRNG, SOFTWARERNG); FEX_CONFIG_OPT(StrictInProcessSplitLocks, STRICTINPROCESSSPLITLOCKS); FEX_CONFIG_OPT(MonoHacks, MONOHACKS); + FEX_CONFIG_OPT(JITFeatures, JITFEATURES); } Config; bool SoftwareRNGEnabled() const { diff --git a/FEXCore/Source/Interface/Core/ArchHelpers/Arm64Emitter.cpp b/FEXCore/Source/Interface/Core/ArchHelpers/Arm64Emitter.cpp index 3ebadb5aa8..09828be17b 100644 --- a/FEXCore/Source/Interface/Core/ArchHelpers/Arm64Emitter.cpp +++ b/FEXCore/Source/Interface/Core/ArchHelpers/Arm64Emitter.cpp @@ -665,11 +665,11 @@ void Arm64Emitter::FillSpecialRegs(ARMEmitter::Register TmpReg, ARMEmitter::Regi // We don't bother spilling these in SpillStaticRegs, // since all that matters is we restore them on a fill. // It's not a concern if they get trounced by something else. - if (EmitterCTX->HostFeatures.SupportsSVE256) { + if (EmitterCTX->HostFeatures.SupportsSVE256()) { ptrue(ARMEmitter::SubRegSize::i8Bit, PRED_TMP_32B, ARMEmitter::PredicatePattern::SVE_VL32); } - if (EmitterCTX->HostFeatures.SupportsSVE128) { + if (EmitterCTX->HostFeatures.SupportsSVE128()) { ptrue(ARMEmitter::SubRegSize::i8Bit, PRED_TMP_16B, ARMEmitter::PredicatePattern::SVE_VL16); } @@ -739,7 +739,7 @@ void Arm64Emitter::SpillStaticRegs(ARMEmitter::Register TmpReg, SpillStaticRegOp } if (Options.FPRs) { - if (EmitterCTX->HostFeatures.SupportsAVX && EmitterCTX->HostFeatures.SupportsSVE256) { + if (EmitterCTX->HostFeatures.SupportsAVX() && EmitterCTX->HostFeatures.SupportsSVE256()) { for (size_t i = 0; i < StaticFPRegisters.size(); i++) { const auto Reg = StaticFPRegisters[i]; @@ -826,7 +826,7 @@ void Arm64Emitter::FillStaticRegs(FillStaticRegOptions Options) { FillSpecialRegs(TmpReg, TmpReg2, {.SetFIZ = true, .SetPredRegs = Options.FPRs}); if (Options.FPRs) { - if (EmitterCTX->HostFeatures.SupportsAVX && EmitterCTX->HostFeatures.SupportsSVE256) { + if (EmitterCTX->HostFeatures.SupportsAVX() && EmitterCTX->HostFeatures.SupportsSVE256()) { for (size_t i = 0; i < StaticFPRegisters.size(); i++) { const auto Reg = StaticFPRegisters[i]; if (((1U << Reg.Idx()) & Options.FPRFillMask) != 0) { @@ -990,7 +990,7 @@ void Arm64Emitter::PopGeneralRegisters(std::span Reg } size_t Arm64Emitter::PushDynamicRegs(ARMEmitter::Register TmpReg) { - const auto CanUseSVE256 = EmitterCTX->HostFeatures.SupportsSVE256; + const auto CanUseSVE256 = EmitterCTX->HostFeatures.SupportsSVE256(); const auto GPRSize = GeneralRegistersNotPreserved.size() * Core::CPUState::GPR_REG_SIZE; const auto FPRRegSize = CanUseSVE256 ? 32 : 16; const auto FPRSize = GeneralFPRegisters.size() * FPRRegSize; @@ -1013,7 +1013,7 @@ size_t Arm64Emitter::PushDynamicRegs(ARMEmitter::Register TmpReg) { } void Arm64Emitter::PopDynamicRegs() { - const auto CanUseSVE256 = EmitterCTX->HostFeatures.SupportsSVE256; + const auto CanUseSVE256 = EmitterCTX->HostFeatures.SupportsSVE256(); // Pop vectors first PopVectorRegisters(CanUseSVE256, GeneralFPRegisters); @@ -1023,7 +1023,7 @@ void Arm64Emitter::PopDynamicRegs() { } size_t Arm64Emitter::SpillForPreserveAllABICall(ARMEmitter::Register TmpReg, bool FPRs) { - const auto CanUseSVE256 = EmitterCTX->HostFeatures.SupportsSVE256; + const auto CanUseSVE256 = EmitterCTX->HostFeatures.SupportsSVE256(); const auto FPRRegSize = CanUseSVE256 ? 32 : 16; std::span DynamicGPRs {}; @@ -1078,7 +1078,7 @@ size_t Arm64Emitter::SpillForPreserveAllABICall(ARMEmitter::Register TmpReg, boo } void Arm64Emitter::FillForPreserveAllABICall(bool FPRs) { - const auto CanUseSVE256 = EmitterCTX->HostFeatures.SupportsSVE256; + const auto CanUseSVE256 = EmitterCTX->HostFeatures.SupportsSVE256(); std::span DynamicGPRs {}; std::span DynamicFPRs {}; @@ -1129,4 +1129,9 @@ void Arm64Emitter::Align16B() { } } +ARMEmitter::Register Arm64Emitter::GetX86GPRMapping(FEXCore::X86State::X86Reg Reg) { + LOGMAN_THROW_A_FMT(Reg <= FEXCore::X86State::X86Reg::REG_R15, "Incorrect register"); + return StaticRegisters[Reg]; +} + } // namespace FEXCore::CPU diff --git a/FEXCore/Source/Interface/Core/ArchHelpers/Arm64Emitter.h b/FEXCore/Source/Interface/Core/ArchHelpers/Arm64Emitter.h index 5ad6e7b195..02d22e149a 100644 --- a/FEXCore/Source/Interface/Core/ArchHelpers/Arm64Emitter.h +++ b/FEXCore/Source/Interface/Core/ArchHelpers/Arm64Emitter.h @@ -235,6 +235,8 @@ class Arm64Emitter : public ARMEmitter::Emitter { void Align16B(); + ARMEmitter::Register GetX86GPRMapping(FEXCore::X86State::X86Reg Reg); + #ifdef VIXL_SIMULATOR // Generates a vixl simulator runtime call. // diff --git a/FEXCore/Source/Interface/Core/CPUBackend.h b/FEXCore/Source/Interface/Core/CPUBackend.h index 0183694cdf..1d19bc1233 100644 --- a/FEXCore/Source/Interface/Core/CPUBackend.h +++ b/FEXCore/Source/Interface/Core/CPUBackend.h @@ -115,7 +115,7 @@ namespace CPU { * @return Information about the compiled code block. */ [[nodiscard]] - virtual CompiledCode CompileCode(uint64_t Entry, uint64_t Size, bool SingleInst, const FEXCore::IR::IRListView* IR, + virtual CompiledCode EmitJITCode(uint64_t Entry, uint64_t Size, bool SingleInst, const FEXCore::IR::IRListView* IR, FEXCore::Core::DebugData* DebugData, bool CheckTF) = 0; virtual CompiledCode LoadCachedCode(std::span HostBytes) { diff --git a/FEXCore/Source/Interface/Core/CPUID.cpp b/FEXCore/Source/Interface/Core/CPUID.cpp index ddce98d66c..5b4e6b083d 100644 --- a/FEXCore/Source/Interface/Core/CPUID.cpp +++ b/FEXCore/Source/Interface/Core/CPUID.cpp @@ -89,6 +89,18 @@ namespace ProductNames { static const char ARM_Blizzard_M2Pro[] = "Apple Blizzard (M2 Pro)"; static const char ARM_Avalanche_M2Max[] = "Apple Avalanche (M2 Max)"; static const char ARM_Blizzard_M2Max[] = "Apple Blizzard (M2 Max)"; + static const char ARM_Sawtooth_M3[] = "Apple Sawtooth (M3)"; + static const char ARM_Everest_M3[] = "Apple Everest (M3)"; + static const char ARM_Sawtooth_M3Pro[] = "Apple Sawtooth (M3 Pro)"; + static const char ARM_Everest_M3Pro[] = "Apple Everest (M3 Pro)"; + static const char ARM_Sawtooth_M3Max[] = "Apple Sawtooth (M3 Max)"; + static const char ARM_Everest_M3Max[] = "Apple Everest (M3 Max)"; + static const char ARM_DonanP_M4[] = "Apple DonanP (M4)"; + static const char ARM_DonanE_M4[] = "Apple DonanE (M4)"; + static const char ARM_TahitiP_A18[] = "Apple TahitiP (A18)"; + static const char ARM_TahitiE_A18[] = "Apple TahitiE (A18)"; + static const char ARM_SotraP_M5[] = "Apple SotraP (M5)"; + static const char ARM_SotraE_M5[] = "Apple SotraE (M5)"; static const char ARM_AppleSilicon[] = "Apple Silicon"; static const char ARM_ORYON_1[] = "Oryon-1"; @@ -187,11 +199,17 @@ void CPUIDEmu::SetupHostHybridFlag() { // CPU priority order // This is mostly arbitrary but will sort by some sort of CPU priority by performance // Relative list so things they will commonly end up in big.little configurations sort of relate - static constexpr std::array CPUMIDRs = {{ + static constexpr std::array CPUMIDRs = {{ // Typically big CPU cores {0x51, 0x002, 1, ProductNames::ARM_ORYON_3}, // Qualcomm Oryon-3 {0x51, 0x001, 1, ProductNames::ARM_ORYON_1}, // Qualcomm Oryon-1 + {0x61, 0x065, 1, ProductNames::ARM_SotraP_M5}, // Apple SotraP (M5) + {0x61, 0x061, 1, ProductNames::ARM_TahitiP_A18}, // Apple TahitiP (A18) + {0x61, 0x053, 1, ProductNames::ARM_DonanP_M4}, // Apple DonanP (M4) + {0x61, 0x048, 1, ProductNames::ARM_Sawtooth_M3Max}, // Apple Sawtooth (M3 Max) + {0x61, 0x044, 1, ProductNames::ARM_Sawtooth_M3Pro}, // Apple Sawtooth (M3 Pro) + {0x61, 0x042, 1, ProductNames::ARM_Sawtooth_M3}, // Apple Sawtooth (M3) {0x61, 0x039, 1, ProductNames::ARM_Avalanche_M2Max}, // Apple Avalanche (M2 Max) {0x61, 0x035, 1, ProductNames::ARM_Avalanche_M2Pro}, // Apple Avalanche (M2 Pro) {0x61, 0x033, 1, ProductNames::ARM_Avalanche_M2}, // Apple Avalanche (M2) @@ -248,6 +266,12 @@ void CPUIDEmu::SetupHostHybridFlag() { {0x41, 0xd07, 1, ProductNames::ARM_A57}, // A57 // Typically Little CPU cores + {0x61, 0x064, 1, ProductNames::ARM_SotraE_M5}, // Apple SotraE (M5) + {0x61, 0x060, 1, ProductNames::ARM_TahitiE_A18}, // Apple TahitiE (A18) + {0x61, 0x052, 1, ProductNames::ARM_DonanE_M4}, // Apple DonanE (M4) + {0x61, 0x049, 0, ProductNames::ARM_Everest_M3Max}, // Apple Everest (M3 Max) + {0x61, 0x045, 0, ProductNames::ARM_Everest_M3Pro}, // Apple Everest (M3 Pro) + {0x61, 0x043, 0, ProductNames::ARM_Everest_M3}, // Apple Everest (M3) {0x61, 0x038, 0, ProductNames::ARM_Blizzard_M2Max}, // Apple Blizzard (M2 Max) {0x61, 0x034, 0, ProductNames::ARM_Blizzard_M2Pro}, // Apple Blizzard (M2 Pro) {0x61, 0x032, 0, ProductNames::ARM_Blizzard_M2}, // Apple Blizzard (M2) @@ -419,7 +443,7 @@ void CPUIDEmu::SetupHostHybridFlag() {} void CPUIDEmu::SetupFeatures() { - if (CTX->HostFeatures.SupportsAVX) { + if (CTX->HostFeatures.SupportsAVX()) { XCR0 |= XCR0_AVX; } @@ -673,6 +697,9 @@ FEXCore::CPUID::FunctionResults CPUIDEmu::Function_07h(uint32_t Leaf) const { const uint32_t SupportsWFXT = CTX->HostFeatures.SupportsWFXT; const uint32_t SupportsRAND = CTX->HostFeatures.SupportsRAND || CTX->SoftwareRNGEnabled(); + // When the X87 FIP feature is enabled, we update the state pointers on every instruction. + // We don't even update them on exception so this isn't quite true the other way anyway. + const uint32_t X87DataPtrExcept = (CTX->Config.JITFeatures & FEXCore::Config::JITFeatures::ENABLEX87FIP) == 0; // Number of subfunctions // TODO: For now, subfunction 1 only exposes AVX-VNNI so we make it conditional @@ -684,7 +711,7 @@ FEXCore::CPUID::FunctionResults CPUIDEmu::Function_07h(uint32_t Leaf) const { (SupportsAVX() << 3) | // BMI1 (0 << 4) | // Intel Hardware Lock Elison (SupportsAVX() << 5) | // AVX2 support - (1 << 6) | // FPU data pointer updated only on exception + (X87DataPtrExcept << 6) | // FPU data pointer updated only on exception (1 << 7) | // SMEP support (SupportsAVX() << 8) | // BMI2 (SupportsEnhancedREPMOVS << 9) | // Enhanced REP MOVSB/STOSB @@ -758,7 +785,7 @@ FEXCore::CPUID::FunctionResults CPUIDEmu::Function_07h(uint32_t Leaf) const { (0 << 11) | // rtm-always-abort (0 << 12) | // Reserved (0 << 13) | // TSX Force Abort (TSX will force abort if attempted) - (0 << 14) | // SERIALIZE instruction + (1 << 14) | // SERIALIZE instruction ((Hybrid ? 1U : 0U) << 15) | // Hybrid (0 << 16) | // TSXLDTRK (TSX Suspend load address tracking) - Allows untracked memory loads inside TSX region (0 << 17) | // Reserved @@ -777,6 +804,8 @@ FEXCore::CPUID::FunctionResults CPUIDEmu::Function_07h(uint32_t Leaf) const { (0 << 30) | // Arch capabilities - MSR module specific (0 << 31); // SSBD - Speculative Store Bypass Disable } else if (Leaf == 1) { + const uint32_t SupportsAVXConvert = SupportsAVX() && CTX->HostFeatures.SupportsBF16; + Res.eax = (0U << 0) | // SHA512 (0U << 1) | // SM3 (0U << 2) | // SM4 @@ -825,31 +854,31 @@ FEXCore::CPUID::FunctionResults CPUIDEmu::Function_07h(uint32_t Leaf) const { (0U << 5); // MSR_IMM // Bits 25-31 also reserved. - Res.edx = (0U << 0) | // Reserved - (0U << 1) | // Reserved - (0U << 2) | // Reserved - (0U << 3) | // Reserved - (0U << 4) | // AVX_VNNI_INT8 - (0U << 5) | // AVX_NE_CONVERT - (0U << 6) | // Reserved - (0U << 7) | // Reserved - (0U << 8) | // AMX_COMPLEX - (0U << 9) | // Reserved - (0U << 10) | // AVX_VNNI_INT16 - (0U << 11) | // Reserved - (0U << 12) | // Reserved - (0U << 13) | // UTMR (User-timer events) - (0U << 14) | // PREFETCHI - (0U << 15) | // USER_MSR - (0U << 16) | // Reserved - (0U << 17) | // UIRET_UIF - (0U << 18) | // CET_SSS - (0U << 19) | // AVX10 - (0U << 20) | // Reserved - (0U << 21) | // APX_F - (0U << 22) | // SEC-TEE_ATTESTATION - (0U << 23) | // MWAIT - (0U << 24); // SLSM (Static LSM) + Res.edx = (0U << 0) | // Reserved + (0U << 1) | // Reserved + (0U << 2) | // Reserved + (0U << 3) | // Reserved + (0U << 4) | // AVX_VNNI_INT8 + (SupportsAVXConvert << 5) | // AVX_NE_CONVERT + (0U << 6) | // Reserved + (0U << 7) | // Reserved + (0U << 8) | // AMX_COMPLEX + (0U << 9) | // Reserved + (0U << 10) | // AVX_VNNI_INT16 + (0U << 11) | // Reserved + (0U << 12) | // Reserved + (0U << 13) | // UTMR (User-timer events) + (0U << 14) | // PREFETCHI + (0U << 15) | // USER_MSR + (0U << 16) | // Reserved + (0U << 17) | // UIRET_UIF + (0U << 18) | // CET_SSS + (0U << 19) | // AVX10 + (0U << 20) | // Reserved + (0U << 21) | // APX_F + (0U << 22) | // SEC-TEE_ATTESTATION + (0U << 23) | // MWAIT + (0U << 24); // SLSM (Static LSM) } else if (Leaf == 2) { // All bits are reserved except for EDX Res.eax = 0; @@ -1133,14 +1162,14 @@ FEXCore::CPUID::FunctionResults CPUIDEmu::Function_8000_0004h(uint32_t Leaf) con FEXCore::CPUID::FunctionResults CPUIDEmu::Function_8000_0002h(uint32_t Leaf, uint32_t CPU) const { FEXCore::CPUID::FunctionResults Res {}; - auto& Data = PerCPUData[CPU]; + auto& Data = PerCPUData[std::min(CPU, PerCPUData.size() - 1)]; memcpy(&Res, Data.ProductName, std::min(strlen(Data.ProductName), sizeof(FEXCore::CPUID::FunctionResults))); return Res; } FEXCore::CPUID::FunctionResults CPUIDEmu::Function_8000_0003h(uint32_t Leaf, uint32_t CPU) const { FEXCore::CPUID::FunctionResults Res {}; - auto& Data = PerCPUData[CPU]; + auto& Data = PerCPUData[std::min(CPU, PerCPUData.size() - 1)]; const auto RemainingStringSize = std::max(0, strlen(Data.ProductName) - 16); memcpy(&Res, Data.ProductName + 16, std::min(RemainingStringSize, sizeof(FEXCore::CPUID::FunctionResults))); return Res; @@ -1148,7 +1177,7 @@ FEXCore::CPUID::FunctionResults CPUIDEmu::Function_8000_0003h(uint32_t Leaf, uin FEXCore::CPUID::FunctionResults CPUIDEmu::Function_8000_0004h(uint32_t Leaf, uint32_t CPU) const { FEXCore::CPUID::FunctionResults Res {}; - auto& Data = PerCPUData[CPU]; + auto& Data = PerCPUData[std::min(CPU, PerCPUData.size() - 1)]; const auto RemainingStringSize = std::max(0, strlen(Data.ProductName) - 32); memcpy(&Res, Data.ProductName + 32, std::min(RemainingStringSize, sizeof(FEXCore::CPUID::FunctionResults))); return Res; diff --git a/FEXCore/Source/Interface/Core/CPUID.h b/FEXCore/Source/Interface/Core/CPUID.h index f7f32571bd..688eb9429c 100644 --- a/FEXCore/Source/Interface/Core/CPUID.h +++ b/FEXCore/Source/Interface/Core/CPUID.h @@ -119,6 +119,7 @@ class CPUIDEmu final { bool Hybrid {}; uint32_t Cores {}; FEX_CONFIG_OPT(HideHypervisorBit, HIDEHYPERVISORBIT); + FEX_CONFIG_OPT(JITFeatures, JITFEATURES); // XFEATURE_ENABLED_MASK // Mask that configures what features are enabled on the CPU. diff --git a/FEXCore/Source/Interface/Core/Core.cpp b/FEXCore/Source/Interface/Core/Core.cpp index 63280a42a3..1946dc946f 100644 --- a/FEXCore/Source/Interface/Core/Core.cpp +++ b/FEXCore/Source/Interface/Core/Core.cpp @@ -264,8 +264,8 @@ uint32_t ContextImpl::ReconstructCompactedEFLAGS(FEXCore::Core::InternalThreadSt void ContextImpl::ReconstructXMMRegisters(const FEXCore::Core::InternalThreadState* Thread, __uint128_t* XMM_Low, __uint128_t* YMM_High) { const size_t MaximumRegisters = Config.Is64BitMode ? FEXCore::Core::CPUState::NUM_XMMS : 8; - if (YMM_High != nullptr && HostFeatures.SupportsAVX) { - const bool SupportsConvergedRegisters = HostFeatures.SupportsSVE256; + if (YMM_High != nullptr && HostFeatures.SupportsAVX()) { + const bool SupportsConvergedRegisters = HostFeatures.SupportsSVE256(); if (SupportsConvergedRegisters) { ///< Output wants to de-interleave @@ -288,8 +288,8 @@ void ContextImpl::ReconstructXMMRegisters(const FEXCore::Core::InternalThreadSta void ContextImpl::SetXMMRegistersFromState(FEXCore::Core::InternalThreadState* Thread, const __uint128_t* XMM_Low, const __uint128_t* YMM_High) { const size_t MaximumRegisters = Config.Is64BitMode ? FEXCore::Core::CPUState::NUM_XMMS : 8; - if (YMM_High != nullptr && HostFeatures.SupportsAVX) { - const bool SupportsConvergedRegisters = HostFeatures.SupportsSVE256; + if (YMM_High != nullptr && HostFeatures.SupportsAVX()) { + const bool SupportsConvergedRegisters = HostFeatures.SupportsSVE256(); if (SupportsConvergedRegisters) { ///< Output wants to de-interleave @@ -715,13 +715,19 @@ ContextImpl::GenerateIR(FEXCore::Core::InternalThreadState* Thread, uint64_t Gue LogMan::Msg::EFmt("Invalid or Unknown instruction: {} 0x{:x}", TableInfo->Name ?: "UND", Block.Entry - GuestRIP); } - if (Block.BlockStatus == Frontend::Decoder::DecodedBlockStatus::INVALID_INST || - Block.BlockStatus == Frontend::Decoder::DecodedBlockStatus::BAD_RELOCATION) { + if (Block.BlockStatus == Frontend::Decoder::DecodedBlockStatus::BREAKPOINT_0 || + Block.BlockStatus == Frontend::Decoder::DecodedBlockStatus::BREAKPOINT_1 || + Block.BlockStatus == Frontend::Decoder::DecodedBlockStatus::BREAKPOINT_2 || + Block.BlockStatus == Frontend::Decoder::DecodedBlockStatus::BREAKPOINT_3) { + Thread->OpDispatcher->BreakpointOp(DecodedInfo, FEXCore::ToUnderlying(Block.BlockStatus) - + FEXCore::ToUnderlying(Frontend::Decoder::DecodedBlockStatus::BREAKPOINT_0)); + } else if (Block.BlockStatus == Frontend::Decoder::DecodedBlockStatus::INVALID_INST || + Block.BlockStatus == Frontend::Decoder::DecodedBlockStatus::BAD_RELOCATION) { Thread->OpDispatcher->InvalidOp(DecodedInfo); } else if (Block.BlockStatus == Frontend::Decoder::DecodedBlockStatus::UNIMPLEMENTED_INST) { Thread->OpDispatcher->UnimplementedOp(DecodedInfo); } else { - Thread->OpDispatcher->NoExecOp(DecodedInfo); + Thread->OpDispatcher->NoExecOrPartialOp(DecodedInfo); } } @@ -832,7 +838,7 @@ ContextImpl::CompileCodeResult ContextImpl::CompileCode(FEXCore::Core::InternalT // If the trap flag is set we generate single instruction blocks that each check to generate a single step exception. bool TFSet = Thread->CurrentFrame->State.flags[X86State::RFLAG_TF_RAW_LOC]; - auto CompiledCode = Thread->CPUBackend->CompileCode(GuestRIP, Length, TotalInstructions == 1, &*IRView, DebugData.get(), TFSet); + auto CompiledCode = Thread->CPUBackend->EmitJITCode(GuestRIP, Length, TotalInstructions == 1, &*IRView, DebugData.get(), TFSet); // Release the IR Thread->OpDispatcher->DelayedDisownBuffer(); diff --git a/FEXCore/Source/Interface/Core/DiskCache.cpp b/FEXCore/Source/Interface/Core/DiskCache.cpp index cf341913bc..3c78b22dad 100644 --- a/FEXCore/Source/Interface/Core/DiskCache.cpp +++ b/FEXCore/Source/Interface/Core/DiskCache.cpp @@ -409,17 +409,24 @@ namespace DiskCache { uint64_t HostFeaturesHash; } MachineBucketData = {FormatVersion, HostFeatureHash.HostFeaturesHash}; - fextl::vector BucketBytes(sizeof(MachineBucketData) + (sizeof(uint8_t) * 2) + SerializedConfig.size()); + uint8_t ProcessFeaturesHash {}; + memcpy(&ProcessFeaturesHash, &HostFeatureHash.ProcessFeaturesHash, sizeof(ProcessFeaturesHash)); + LogMan::Msg::IFmt("Disk Cache features:"); + LogMan::Msg::IFmt("HostFeatures Hash: 0x{:016x}", HostFeatureHash.HostFeaturesHash); + LogMan::Msg::IFmt("ProcessFeaturesHash: 0x{:02x}", ProcessFeaturesHash); + + fextl::vector BucketBytes(sizeof(MachineBucketData) + sizeof(HostFeatureHash.ProcessFeaturesHash) + SerializedConfig.size()); memcpy(BucketBytes.data(), &MachineBucketData, sizeof(MachineBucketData)); // 64-bit mode and HostType is in the ProcessBucket hash only instead of the MachineBucketHash // These effect code-gen, but they aren't part of the MachineBucketHash, as it comes from Process state. - BucketBytes[sizeof(MachineBucketData)] = CTX->Config.Is64BitMode; - BucketBytes[sizeof(MachineBucketData) + 1] = FEXCore::ToUnderlying(HostFeatureHash.HostType); - memcpy(BucketBytes.data() + sizeof(MachineBucketData) + 2, SerializedConfig.data(), SerializedConfig.size()); + memcpy(&BucketBytes[sizeof(MachineBucketData)], &HostFeatureHash.ProcessFeaturesHash, sizeof(HostFeatureHash.ProcessFeaturesHash)); + memcpy(BucketBytes.data() + sizeof(MachineBucketData) + sizeof(HostFeatureHash.ProcessFeaturesHash), SerializedConfig.data(), + SerializedConfig.size()); uint64_t MachineBucketHash = XXH3_64bits(BucketBytes.data(), sizeof(MachineBucketData)); - uint64_t ProcessBucketHash = XXH3_64bits(BucketBytes.data() + sizeof(MachineBucketData), 2 + SerializedConfig.size()); + uint64_t ProcessBucketHash = + XXH3_64bits(BucketBytes.data() + sizeof(MachineBucketData), sizeof(HostFeatureHash.ProcessFeaturesHash) + SerializedConfig.size()); BucketHash.high64 = MachineBucketHash; BucketHash.low64 = ProcessBucketHash; @@ -1026,9 +1033,8 @@ namespace DiskCache { const size_t TotalSize = GuestCodeOffset + GuestCode.size(); // we'll copy everything into here and pass it to the Writer, then return to caller quickly - fextl::vector Blob; - Blob.resize(TotalSize); - uint8_t* BlobData = Blob.data(); + auto BlobRef = fextl::make_shared>(TotalSize); + uint8_t* BlobData = BlobRef->data(); BlobFixedHeader Header { .GuestSize = (uint32_t)GuestCode.size(), @@ -1182,7 +1188,6 @@ namespace DiskCache { MakeLookupKey(Thread, GuestCodeKey, RangeInfo.Writable, GuestRIP == CTX->GetMonoBackPatcherBlock().load(std::memory_order_relaxed)); // blob done, publish to index as in-memory for now, flush to disk below - auto BlobRef = fextl::make_shared>(std::move(Blob)); struct IndexEntry NewEntry {nullptr, 0, (uint32_t)TotalSize, Header.GuestSize, Header.GuestHash, BlobRef}; NewEntry.GuestExtents = ExactGuestCodeExtents; { diff --git a/FEXCore/Source/Interface/Core/DiskCache.h b/FEXCore/Source/Interface/Core/DiskCache.h index fd017c3e09..4899cd2506 100644 --- a/FEXCore/Source/Interface/Core/DiskCache.h +++ b/FEXCore/Source/Interface/Core/DiskCache.h @@ -249,7 +249,7 @@ namespace DiskCache { // The current version of the diskcache. // This must be changed any time codegen changes occur! // Be aware of the impact of changing this frequently! - static constexpr uint16_t FormatVersion = 29; + static constexpr uint16_t FormatVersion = 43; static constexpr uint32_t LOOKUP_KEY_MAX_BUCKET_DEPTH = 500; diff --git a/FEXCore/Source/Interface/Core/Dispatcher/Dispatcher.cpp b/FEXCore/Source/Interface/Core/Dispatcher/Dispatcher.cpp index 2f4babd703..ba6fcd3e9f 100644 --- a/FEXCore/Source/Interface/Core/Dispatcher/Dispatcher.cpp +++ b/FEXCore/Source/Interface/Core/Dispatcher/Dispatcher.cpp @@ -417,6 +417,7 @@ void Dispatcher::EmitDispatcher() { brk(0); } + ARMEmitter::BackwardLabel GuestSIGSEGVLabelPostSpill; { // Guest Overflow handler // Needs to be distinct from the SignalHandlerReturnAddress @@ -424,6 +425,8 @@ void Dispatcher::EmitDispatcher() { SpillStaticRegs(TMP1); + (void)Bind(&GuestSIGSEGVLabelPostSpill); + // hlt/udf = SIGILL // brk = SIGTRAP // ??? = SIGSEGV @@ -439,6 +442,26 @@ void Dispatcher::EmitDispatcher() { } } + { + // Faultless synchronous signal. + // Some games abuse SIGILL/SIGTRAP/SIGSEGV heavily and the fault overhead is visible. + // Instead of double faulting, clean up state and jump to the frontend to handle this. + // `FEXCore::Core::CpuStateFrame::SynchronousFaultData` needs to be setup at this point. + GuestSignal_SynchronousFault = GetCursorAddress(); + + SpillStaticRegs(TMP1); + + ldr(ARMEmitter::XReg::x0, &l_CTX); + mov(ARMEmitter::XReg::x1, STATE); + ldr(ARMEmitter::XReg::x2, STATE_PTR(CpuStateFrame, Pointers.SynchronousExceptionHandler)); + + if (!CTX->Config.DisableVixlIndirectCalls) [[unlikely]] { + GenerateIndirectRuntimeCall(ARMEmitter::Reg::r2); + } else { + br(ARMEmitter::Reg::r2); + } + } + { ThreadPauseHandlerAddressSpillSRA = GetCursorAddress(); SpillStaticRegs(TMP1); @@ -514,6 +537,28 @@ void Dispatcher::EmitDispatcher() { (void)b(&LoopTop); } + auto EmitL1Lookup = [&](int rip_offset = 0) { + // L1 lookup after syscall. Mirrors the implementation in `ExitFunction`. + // Most syscall instructions just return to the following RIP, so it is highly likely to be in the L1 in tight loops. + ldr(TMP3, STATE_PTR(CpuStateFrame, State.rip)); + ldp(TMP1, TMP2, STATE, offsetof(FEXCore::Core::CpuStateFrame, State.L1Pointer)); + + if (rip_offset) { + add(ARMEmitter::Size::i64Bit, TMP3, TMP3, rip_offset); + } + + // Calculate (tmp1 + ((ripreg & L1_ENTRIES_MASK) << 4)) for the address + // L1Mask is pre-shifted. + and_(ARMEmitter::Size::i64Bit, TMP2, TMP2, TMP3, ARMEmitter::ShiftType::LSL, FEXCore::ilog2(sizeof(LookupCache::LookupCacheEntry))); + add(TMP1, TMP1, TMP2); + + ldp(TMP2, TMP1, TMP1, 0); + + sub(TMP1, TMP1, TMP3); + (void)cbnz(ARMEmitter::Size::i64Bit, TMP1, &LoopTop); + br(TMP2); + }; + { // All dynamic and static registers are spilled coming in to this handler. // It's also the end of block and RIP might have changed, so we jump directly to the top of the loop. @@ -546,69 +591,113 @@ void Dispatcher::EmitDispatcher() { // We can safely claim we are no longer in a syscall str(ARMEmitter::XReg::zr, STATE, offsetof(FEXCore::Core::CpuStateFrame, InSyscallInfo)); - // Now go back to the regular dispatcher loop - (void)b(&LoopTop); + EmitL1Lookup(); } { // All dynamic and static registers are spilled coming in to this handler. // It's also the end of block and RIP might have changed, so we jump directly to the top of the loop. - ThreadDispatchRemoveCodeEntry = GetCursorAddress(); + ThreadDispatchCPUIDHandler = GetCursorAddress(); - // Arguments are already in x0, x1. Just jump to the handler. - ldr(ARMEmitter::XReg::x2, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.ThreadRemoveCodeEntryFromJIT)); - if (!CTX->Config.DisableVixlIndirectCalls) [[unlikely]] { - GenerateIndirectRuntimeCall(ARMEmitter::Reg::r2); - } else { - blr(ARMEmitter::Reg::r2); - } + // CPUID behaves like an ISB. + isb(); - FillStaticRegs({ - .OptionalReg = ARMEmitter::Reg::r1, - .OptionalReg2 = ARMEmitter::Reg::r2, - }); + auto RAXReg = GetX86GPRMapping(FEXCore::X86State::REG_RAX); + auto RBXReg = GetX86GPRMapping(FEXCore::X86State::REG_RBX); + auto RCXReg = GetX86GPRMapping(FEXCore::X86State::REG_RCX); + auto RDXReg = GetX86GPRMapping(FEXCore::X86State::REG_RDX); - // Now go back to the regular dispatcher loop - (void)b(&LoopTop); - } + ARMEmitter::ForwardLabel SetupCPUIDFault {}; + ldr(TMP2, STATE, offsetof(FEXCore::Core::CPUState, CoreFlags)); + (void)tbz(TMP2, FEXCore::ilog2(FEXCore::ToUnderlying(FEXCore::Core::CoreFlagsEnum::CPUID_ENABLED)), &SetupCPUIDFault); - auto EmitLongALUOpHandler = [&](auto R, auto Offset) { - auto Address = GetCursorAddress(); + // TMP1 passes the instruction size. Usually only 2-bytes but prefixes can make it 15. + ldr(TMP2, STATE_PTR(CpuStateFrame, State.rip)); + add(TMP2, TMP2, TMP1); + str(TMP2, STATE_PTR(CpuStateFrame, State.rip)); - PushDynamicRegs(TMP4); - SpillStaticRegs(TMP4); + mov(ARMEmitter::XReg::x1, RAXReg.X()); + mov(ARMEmitter::XReg::x2, RCXReg.X()); - if (!TMP_ABIARGS) { - mov(ARMEmitter::XReg::x0, TMP1); - mov(ARMEmitter::XReg::x1, TMP2); - mov(ARMEmitter::XReg::x2, TMP3); - } + // x0 = CPUID Handler + // x1 = CPUID Function (RAX) + // x2 = CPUID Leaf (RCX) + ldr(ARMEmitter::XReg::x0, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.CPUIDObj)); + ldr(ARMEmitter::XReg::x3, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.CPUIDFunction)); - ldr(ARMEmitter::XReg::x3, R, Offset); if (!CTX->Config.DisableVixlIndirectCalls) [[unlikely]] { - GenerateIndirectRuntimeCall<__uint128_t, uint64_t, uint64_t, uint64_t>(ARMEmitter::Reg::r3); + GenerateIndirectRuntimeCall<__uint128_t, void*, uint64_t, uint64_t>(ARMEmitter::Reg::r3); } else { blr(ARMEmitter::Reg::r3); } - // Result is now in x0, x1 + // Results are in x0, x1 + auto Res0 = ARMEmitter::Reg::r0; + auto Res1 = ARMEmitter::Reg::r1; + if (!TMP_ABIARGS) { - mov(TMP1, ARMEmitter::XReg::x0); - mov(TMP2, ARMEmitter::XReg::x1); + // SRA Overlaps, need to move. + mov(ARMEmitter::Size::i64Bit, TMP1, Res0); + mov(ARMEmitter::Size::i64Bit, TMP2, Res1); + Res0 = TMP1; + Res1 = TMP2; } FillStaticRegs(); - // Fix the stack and any values that were stepped on - PopDynamicRegs(); + // Results need to be moved to 32-bit EAX, ECX, EBX, EDX. + mov(ARMEmitter::Size::i32Bit, RAXReg, Res0); + mov(ARMEmitter::Size::i32Bit, RCXReg, Res1); + ubfx(ARMEmitter::Size::i64Bit, RBXReg, Res0, 32, 32); + ubfx(ARMEmitter::Size::i64Bit, RDXReg, Res1, 32, 32); - // Go back to our code block - ret(); - return Address; - }; + EmitL1Lookup(); + + // CPUID fault handling + (void)Bind(&SetupCPUIDFault); + + constexpr Core::CpuStateFrame::SynchronousFaultDataStruct State = { + .FaultToTopAndGeneratedException = 1, + .Signal = Core::FAULT_SIGSEGV, + .TrapNo = X86State::X86_TRAPNO_GP, + .si_code = 0x80, + .err_code = 0, + .FaultAddress = 0, // Comes from register. + }; + + uint64_t Constant {}; + memcpy(&Constant, &State, sizeof(uint64_t)); + + LoadConstant(ARMEmitter::Size::i64Bit, TMP1, static_cast(Constant)); + + str(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, SynchronousFaultData)); + ldr(TMP2, STATE_PTR(CpuStateFrame, State.rip)); + str(TMP2, STATE, offsetof(FEXCore::Core::CpuStateFrame, SynchronousFaultData) + 8); + + (void)b(&GuestSIGSEGVLabelPostSpill); + } + + { + // All dynamic and static registers are spilled coming in to this handler. + // It's also the end of block and RIP might have changed, so we jump directly to the top of the loop. + ThreadDispatchRemoveCodeEntry = GetCursorAddress(); + + // Arguments are already in x0, x1. Just jump to the handler. + ldr(ARMEmitter::XReg::x2, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.ThreadRemoveCodeEntryFromJIT)); + if (!CTX->Config.DisableVixlIndirectCalls) [[unlikely]] { + GenerateIndirectRuntimeCall(ARMEmitter::Reg::r2); + } else { + blr(ARMEmitter::Reg::r2); + } - LUDIVHandlerAddress = EmitLongALUOpHandler(STATE_PTR(CpuStateFrame, Pointers.LUDIV)); - LDIVHandlerAddress = EmitLongALUOpHandler(STATE_PTR(CpuStateFrame, Pointers.LDIV)); + FillStaticRegs({ + .OptionalReg = ARMEmitter::Reg::r1, + .OptionalReg2 = ARMEmitter::Reg::r2, + }); + + // Now go back to the regular dispatcher loop + (void)b(&LoopTop); + } EmitF64Sin(); EmitF64Cos(); @@ -2686,14 +2775,14 @@ void Dispatcher::InitThreadPointers(FEXCore::Core::InternalThreadState* Thread) Ptrs.ThreadStopHandlerSpillSRA = ThreadStopHandlerAddressSpillSRA; Ptrs.ThreadPauseHandlerSpillSRA = ThreadPauseHandlerAddressSpillSRA; Ptrs.ThreadDispatchSyscallHandler = ThreadDispatchSyscallHandler; + Ptrs.ThreadDispatchCPUIDHandler = ThreadDispatchCPUIDHandler; Ptrs.ThreadDispatchRemoveCodeEntry = ThreadDispatchRemoveCodeEntry; Ptrs.GuestSignal_SIGILL = GuestSignal_SIGILL; Ptrs.GuestSignal_SIGTRAP = GuestSignal_SIGTRAP; Ptrs.GuestSignal_SIGSEGV = GuestSignal_SIGSEGV; + Ptrs.GuestSignal_SynchronousFault = GuestSignal_SynchronousFault; Ptrs.SignalReturnHandler = SignalHandlerReturnAddress; Ptrs.SignalReturnHandlerRT = SignalHandlerReturnAddressRT; - Ptrs.LUDIVHandler = LUDIVHandlerAddress; - Ptrs.LDIVHandler = LDIVHandlerAddress; Ptrs.F64SinHandler = F64SinHandlerAddress; Ptrs.F64CosHandler = F64CosHandlerAddress; Ptrs.F64TanHandler = F64TanHandlerAddress; diff --git a/FEXCore/Source/Interface/Core/Dispatcher/Dispatcher.h b/FEXCore/Source/Interface/Core/Dispatcher/Dispatcher.h index 9df667efb7..a97ccfe1e2 100644 --- a/FEXCore/Source/Interface/Core/Dispatcher/Dispatcher.h +++ b/FEXCore/Source/Interface/Core/Dispatcher/Dispatcher.h @@ -82,6 +82,7 @@ class Dispatcher final : public Arm64Emitter { uint64_t ThreadPauseHandlerAddress {}; uint64_t ThreadPauseHandlerAddressSpillSRA {}; uint64_t ThreadDispatchSyscallHandler {}; + uint64_t ThreadDispatchCPUIDHandler {}; uint64_t ThreadDispatchRemoveCodeEntry {}; uint64_t ExitFunctionLinkerAddress {}; uint64_t SignalHandlerReturnAddress {}; @@ -89,6 +90,7 @@ class Dispatcher final : public Arm64Emitter { uint64_t GuestSignal_SIGILL {}; uint64_t GuestSignal_SIGTRAP {}; uint64_t GuestSignal_SIGSEGV {}; + uint64_t GuestSignal_SynchronousFault {}; uint64_t PauseReturnInstruction {}; std::array ABIPointers {}; @@ -97,10 +99,6 @@ class Dispatcher final : public Arm64Emitter { uint64_t Start {}; uint64_t End {}; - // Long division helpers - uint64_t LUDIVHandlerAddress {}; - uint64_t LDIVHandlerAddress {}; - // F64 reduced-precision shared handlers uint64_t F64SinHandlerAddress {}; uint64_t F64CosHandlerAddress {}; diff --git a/FEXCore/Source/Interface/Core/Frontend.cpp b/FEXCore/Source/Interface/Core/Frontend.cpp index 78d5f1a2ec..8d1d8db471 100644 --- a/FEXCore/Source/Interface/Core/Frontend.cpp +++ b/FEXCore/Source/Interface/Core/Frontend.cpp @@ -79,39 +79,56 @@ Decoder::Decoder(FEXCore::Core::InternalThreadState* Thread) X87Table = &FEXCore::X86Tables::X87F80Ops; } - if (CTX->HostFeatures.SupportsAVX && CTX->HostFeatures.SupportsSVE256) { + if (CTX->HostFeatures.SupportsAVX() && CTX->HostFeatures.SupportsSVE256()) { VEXTable = &FEXCore::X86Tables::VEXTableOps; VEXTableGroup = &FEXCore::X86Tables::VEXTableGroupOps; - } else if (CTX->HostFeatures.SupportsAVX) { + } else if (CTX->HostFeatures.SupportsAVX()) { VEXTable = &FEXCore::X86Tables::VEXTableOps_AVX128; VEXTableGroup = &FEXCore::X86Tables::VEXTableGroupOps_AVX128; } } -bool Decoder::CheckRangeExecutable(uint64_t Address, uint64_t Size) { +int32_t Decoder::CheckRangeExecutable(uint64_t Address, uint64_t Size) { // Check for wraparound if (Address + Size < Address) { - return false; + // Say that any bytes that wrapped around are unreadable + return -(Address + Size); + } + + if (Thread->CurrentFrame->State.Dr7) [[unlikely]] { + // If Dr7 has anything enabled then check it. + for (size_t i = 0; i < Core::CPUState::NUM_DEBUG_ADDRESSES; ++i) { + if (Core::CPUState::IsInstructionBPEnabled(i, Thread->CurrentFrame->State.Dr7)) { + size_t DrSize = Core::CPUState::BreakpointSize(i, Thread->CurrentFrame->State.Dr7); + if (Address >= Thread->CurrentFrame->State.Dr[i] && (Address + Size - 1) < (Thread->CurrentFrame->State.Dr[i] + DrSize)) { + HitBreakpoint = i; + return false; + } + } + } } - while (Address < ExecutableRangeBase || Address + Size > ExecutableRangeEnd) { + uint64_t RemainingSize = Size; + while (Address < ExecutableRangeBase || Address + RemainingSize > ExecutableRangeEnd) { auto RangeInfo = CTX->SyscallHandler->QueryGuestExecutableRange(Thread, Address); ExecutableRangeBase = RangeInfo.Base; ExecutableRangeEnd = RangeInfo.Base + RangeInfo.Size; ExecutableRangeWritable = RangeInfo.Writable; if (RangeInfo.Size == 0) { - return false; + // Return the number of bytes that couldn't be decoded. + return -(Size - RemainingSize); } uint64_t RangeRemainingSize = ExecutableRangeEnd - Address; - if (Size > RangeRemainingSize) { - Size -= RangeRemainingSize; + if (RemainingSize > RangeRemainingSize) { + RemainingSize -= RangeRemainingSize; Address += RangeRemainingSize; } } - return true; + // Say all bytes are readable. + return Size; } uint8_t Decoder::ReadByte() { @@ -129,7 +146,7 @@ uint8_t Decoder::ReadByte() { std::optional Decoder::PeekByte(uint8_t Offset) { uint64_t ByteAddress = reinterpret_cast(InstStream.InstStream + InstructionSize + Offset); - if (CheckRangeExecutable(ByteAddress, 1)) { + if (CheckRangeExecutable(ByteAddress, 1) == 1) { return InstStream.AdjustedInstStream[InstructionSize + Offset]; } else { return std::nullopt; @@ -143,7 +160,8 @@ std::pair Decoder::ReadData(uint8_t Size) { uint64_t Address = reinterpret_cast(InstStream.InstStream + InstructionSize); LastFieldReadOffset = (uint8_t)InstructionSize; LastFieldReadSize = Size; - if (CheckRangeExecutable(Address, Size)) { + auto ReadableSize = CheckRangeExecutable(Address, Size); + if (ReadableSize == Size) { std::memcpy(&Res, &InstStream.AdjustedInstStream[InstructionSize], Size); } else { HitNonExecutableRange = true; @@ -151,13 +169,14 @@ std::pair Decoder::ReadData(uint8_t Size) { Res = 0; } - + // Skip the number of decoded bytes regardless to get instruction size. + // Even partially decoded instruction. #if defined(ASSERTIONS_ENABLED) && ASSERTIONS_ENABLED - for (size_t i = 0; i < Size; ++i) { + for (size_t i = 0; i < std::abs(ReadableSize); ++i) { ReadByte(); } #else - SkipBytes(Size); + SkipBytes(std::abs(ReadableSize)); #endif if (Relocations) { @@ -942,23 +961,24 @@ Decoder::DecodedBlockStatus Decoder::DecodeInstructionImpl(uint64_t PC) { // If any of these three prefixes are used then it falls down the subtable // Additionally: If you hit repeat of differnt prefixes then only the LAST one before this one works for subtable selection - bool NoOverlay = (FEXCore::X86Tables::SecondBaseOps[EscapeOp].Flags & InstFlags::FLAGS_NO_OVERLAY) != 0; - bool NoOverlay66 = (FEXCore::X86Tables::SecondBaseOps[EscapeOp].Flags & InstFlags::FLAGS_NO_OVERLAY66) != 0; + const bool NoOverlay = (FEXCore::X86Tables::SecondBaseOps[EscapeOp].Flags & InstFlags::FLAGS_NO_OVERLAY) != 0; + const bool NoOverlay66 = (FEXCore::X86Tables::SecondBaseOps[EscapeOp].Flags & InstFlags::FLAGS_NO_OVERLAY66) != 0; + const bool NoPrefixOrder = (FEXCore::X86Tables::SecondBaseOps[EscapeOp].Flags & InstFlags::FLAGS_NO_PREFIX_ORDER) != 0; DecodeREXIfValid(-2); if (NoOverlay) { // This section of the table ignores prefix extention return NormalOpHeader(&FEXCore::X86Tables::SecondBaseOps[EscapeOp], EscapeOp); - } else if (LastEscapePrefix == 0xF3) { // REP + } else if (LastEscapePrefix == 0xF3 || (NoPrefixOrder && DecodeInst->Flags & DecodeFlags::FLAG_REP_PREFIX)) { // REP // Remove prefix so it doesn't effect calculations. // This is only an escape prefix rather tan modifier now DecodeInst->Flags &= ~DecodeFlags::FLAG_REP_PREFIX; return NormalOpHeader(&FEXCore::X86Tables::RepModOps[EscapeOp], EscapeOp); - } else if (LastEscapePrefix == 0xF2) { // REPNE + } else if (LastEscapePrefix == 0xF2 || (NoPrefixOrder && DecodeInst->Flags & DecodeFlags::FLAG_REPNE_PREFIX)) { // REPNE // Remove prefix so it doesn't effect calculations. // This is only an escape prefix rather tan modifier now DecodeInst->Flags &= ~DecodeFlags::FLAG_REPNE_PREFIX; return NormalOpHeader(&FEXCore::X86Tables::RepNEModOps[EscapeOp], EscapeOp); - } else if (LastEscapePrefix == 0x66 && !NoOverlay66) { // Operand Size + } else if ((LastEscapePrefix == 0x66 || (NoPrefixOrder && DecodeInst->Flags & DecodeFlags::FLAG_OPERAND_SIZE)) && !NoOverlay66) { // Operand Size // Remove prefix so it doesn't effect calculations. // This is only an escape prefix rather tan modifier now DecodeInst->Flags &= ~DecodeFlags::FLAG_OPERAND_SIZE; @@ -1078,21 +1098,27 @@ Decoder::DecodedBlockStatus Decoder::DecodeInstruction(uint64_t PC) { // Will be set if DecodeInstructionImpl tries to read non-executable memory HitNonExecutableRange = false; HitBadRelocation = false; + HitBreakpoint = ~0U; auto ErrorDuringDecoding = DecodeInstructionImpl(PC); if (ErrorDuringDecoding != DecodedBlockStatus::SUCCESS || HitNonExecutableRange || HitBadRelocation) [[unlikely]] { // Put an invalid instruction in the stream so the core can raise SIGILL if hit // Error while decoding instruction. We don't know the table or instruction size - const auto InstSize = DecodeInst->InstSize; DecodeInst->TableInfo = nullptr; - DecodeInst->InstSize = 0; + + if (HitBreakpoint != ~0U) { + return static_cast(FEXCore::ToUnderlying(DecodedBlockStatus::BREAKPOINT_0) + HitBreakpoint); + } // A decode error can be caused by substituting zero for an inaccessible // instruction byte, so the instruction fetch fault takes priority. if (HitNonExecutableRange) { - return InstSize ? DecodedBlockStatus::PARTIAL_DECODE_INST : DecodedBlockStatus::NOEXEC_INST; + return DecodeInst->InstSize ? DecodedBlockStatus::PARTIAL_DECODE_INST : DecodedBlockStatus::NOEXEC_INST; } + // Keep InstSize around for PARTIAL_DECODE_INST so we can get the offset where it partial decoded. + DecodeInst->InstSize = 0; + if (HitBadRelocation) { return DecodedBlockStatus::BAD_RELOCATION; } @@ -1352,8 +1378,8 @@ const Decoder::DecodeStream Decoder::AdjustAddrForSpecialRegion(const uint8_t* _ constexpr uint64_t VSyscall_Base = 0xFFFF'FFFF'FF60'0000ULL; constexpr uint64_t VSyscall_End = VSyscall_Base + 0x1000; - if (BlockInfo.Is64BitMode && CTX->HostFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Linux && RIP >= VSyscall_Base && - RIP < VSyscall_End) { + if (BlockInfo.Is64BitMode && CTX->HostFeatures.ProcessFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Linux && + RIP >= VSyscall_Base && RIP < VSyscall_End) { // VSyscall // This doesn't exist on AArch64 and on x86_64 hosts this is emulated with faults to a region mapped with --xp permissions // Offset 0: vgettimeofday @@ -1650,6 +1676,10 @@ void Decoder::DecodeLoop(const uint8_t* _InstStream, uint64_t GuestSizePause) { EraseBlock = true; } else { LogMan::Msg::EFmt("{} instruction in entry block: {:X}", + BlockIt->BlockStatus == DecodedBlockStatus::BREAKPOINT_0 ? "Breakpoint" : + BlockIt->BlockStatus == DecodedBlockStatus::BREAKPOINT_1 ? "Breakpoint" : + BlockIt->BlockStatus == DecodedBlockStatus::BREAKPOINT_2 ? "Breakpoint" : + BlockIt->BlockStatus == DecodedBlockStatus::BREAKPOINT_3 ? "Breakpoint" : BlockIt->BlockStatus == DecodedBlockStatus::INVALID_INST ? "Invalid" : BlockIt->BlockStatus == DecodedBlockStatus::NOEXEC_INST ? "NoExec" : BlockIt->BlockStatus == DecodedBlockStatus::BAD_RELOCATION ? "BadRelocation" : diff --git a/FEXCore/Source/Interface/Core/Frontend.h b/FEXCore/Source/Interface/Core/Frontend.h index 1fc0e6ed36..ade14bc445 100644 --- a/FEXCore/Source/Interface/Core/Frontend.h +++ b/FEXCore/Source/Interface/Core/Frontend.h @@ -30,6 +30,10 @@ class Decoder final { PARTIAL_DECODE_INST, BAD_RELOCATION, UNIMPLEMENTED_INST, + BREAKPOINT_0, + BREAKPOINT_1, + BREAKPOINT_2, + BREAKPOINT_3, }; enum class DataMaskType : uint8_t { NONE, MOV, BRANCH, DISP, NOP }; @@ -115,7 +119,10 @@ class Decoder final { void DetectDataMasks(uint64_t OpAddress, DecodedBlocks& Block); void PruneInlinedBranchDataMasks(); - bool CheckRangeExecutable(uint64_t Address, uint64_t Size); + // Check for the number of bytes that are able to be decoded as executable + // Size: Returns Size if able to decode all bytes. + // Negative: Number of bytes that failed to decode. + int32_t CheckRangeExecutable(uint64_t Address, uint64_t Size); uint8_t ReadByte(); std::optional PeekByte(uint8_t Offset); @@ -153,6 +160,7 @@ class Decoder final { bool ExecutableRangeWritable {}; bool HitNonExecutableRange {}; bool HitBadRelocation {}; + uint32_t HitBreakpoint {~0U}; struct DecodeStream { // Original instruction stream RIP location. diff --git a/FEXCore/Source/Interface/Core/JIT/ALUOps.cpp b/FEXCore/Source/Interface/Core/JIT/ALUOps.cpp index b65bf80fce..7d553cd410 100644 --- a/FEXCore/Source/Interface/Core/JIT/ALUOps.cpp +++ b/FEXCore/Source/Interface/Core/JIT/ALUOps.cpp @@ -865,6 +865,159 @@ DEF_OP(PExt) { } } +// Divide a uint128_t by a uint64_t, producing quotient and remainder. +// +// Adapted from divllu() in libdivide: https://github.com/ridiculousfish/libdivide/blob/master/doc/divlu.c +// divllu() specifically is licensed as public domain, despite the zlib license that covers the rest of libdivide. +// divllu() is itself an adaptation of Knuth's classic Algorithm D for long division, with some optimizations. +// Where possible we have followed divllu() to the letter, including comments, but some changes were needed +// due to our limited set of temp registers. Some comments below represent the original C code from divllu() +// which is intended to match the assembly we emit. +// +// Additional reading: +// https://ridiculousfish.com/blog/posts/labor-of-division-episode-iv.html +// https://ridiculousfish.com/blog/posts/labor-of-division-episode-v.html +void Arm64JITCore::EmitDivllu(ARMEmitter::Register Quotient, ARMEmitter::Register Remainder, ARMEmitter::Register Upper, + ARMEmitter::Register Lower, ARMEmitter::Register Divisor) { + const auto EmitSize = ARMEmitter::Size::i64Bit; + ARMEmitter::ForwardLabel UpperReduced {}; + ARMEmitter::ForwardLabel HighDigitDone {}; + ARMEmitter::ForwardLabel LowDigitDone {}; + + // We work in base 2**32. + // A uint32 holds a single digit. A uint64 holds two digits. + // Our numerator is conceptually [num3, num2, num1, num0]. + // Our denominator is [den1, den0]. + + // The normalization shift factor. + const auto Shift = TMP1; + + // The divisor, and the high and low words of the dividend. + const auto Den = TMP2; + const auto NumHi = TMP3; + const auto NumLo = TMP4; + + // A partial remainder. + const auto Rem = TMP3; + + // Check for overflow and divide by 0. + // TODO: IF FEX handled #DE, we could simplify this I think. + if (NumHi != Upper) { + mov(EmitSize, NumHi, Upper); + } + cmp(EmitSize, Upper, Divisor); + (void)b(ARMEmitter::Condition::CC_LO, &UpperReduced); + udiv(EmitSize, Quotient, Upper, Divisor); + msub(EmitSize, NumHi, Quotient, Divisor, Upper); + (void)Bind(&UpperReduced); + + // Determine the normalization factor. We multiply den by this, so that its leading digit is at + // least half b. In binary this means just shifting left by the number of leading zeros, so that + // there's a 1 in the MSB. + // We also shift numer by the same amount. This cannot overflow because numhi < den. + // The expression (-shift & 63) is the same as (64 - shift), except it avoids the UB of shifting + // by 64. The funny bitwise 'and' ensures that numlo does not get shifted into numhi if shift is 0. + + // shift = divlu_count_leading_zeros64(den); + clz(EmitSize, Shift, Divisor); + // den <<= shift; + lslv(EmitSize, Den, Divisor, Shift); + // numhi <<= shift; + lslv(EmitSize, NumHi, NumHi, Shift); + // numhi |= (numlo >> (-shift & 63)) & (-(int64_t)shift >> 63); + mvn(EmitSize, Quotient, Shift); + lsr(EmitSize, Remainder, Lower, 1); + lsrv(EmitSize, Remainder, Remainder, Quotient); + orr(EmitSize, NumHi, NumHi, Remainder); + // numlo <<= shift; + lslv(EmitSize, NumLo, Lower, Shift); + + // We wish to compute q1 = [n3 n2 n1] / [d1 d0]. + // Estimate q1 as [n3 n2] / [d1], and then correct it. + // Note while qhat may be 2 digits, q1 is always 1 digit. + { + const auto Den1 = TMP1; + const auto Den0 = TMP1; + + // The estimated quotient, and estimated remainder. + const auto QHat = Quotient; + const auto RHat = Remainder; + + // Variables used to correct the estimated quotient. + const auto C1 = TMP1; + const auto C2 = Remainder; + + // qhat = numhi / den1; + lsr(EmitSize, Den1, Den, 32); + udiv(EmitSize, QHat, NumHi, Den1); + // rhat = numhi % den1; + msub(EmitSize, RHat, QHat, Den1, NumHi); + // c1 = qhat * den0; + mov(ARMEmitter::Size::i32Bit, Den0, Den); + mul(EmitSize, C1, QHat, Den0); + // c2 = rhat * b + num1; + extr(EmitSize, C2, RHat, NumLo, 32); + // if (c1 > c2) + // qhat -= (c1 - c2 > den) ? 2 : 1; + // C1 holds c1 - c2 after the subs. + subs(EmitSize, C1, C1, C2); + (void)b(ARMEmitter::Condition::CC_LS, &HighDigitDone); + sub(EmitSize, QHat, QHat, 1); + cmp(EmitSize, C1, Den); + (void)b(ARMEmitter::Condition::CC_LS, &HighDigitDone); + sub(EmitSize, QHat, QHat, 1); + (void)Bind(&HighDigitDone); + // q1 = (uint32_t)qhat; + // This move is a nop for us. + } + + // Compute the true (partial) remainder. + // rem = numhi * b + num1 - q1 * den; + extr(EmitSize, Rem, NumHi, NumLo, 32); + msub(EmitSize, Rem, Quotient, Den, Rem); + + // We wish to compute q0 = [rem1 rem0 n0] / [d1 d0]. + // Estimate q0 as [rem1 rem0] / [d1] and correct it. + { + const auto Den1 = TMP1; + const auto Den0 = TMP3; + + // The estimated quotient, and its corresponding remainder + const auto QHat = Remainder; + const auto RHat = TMP1; + + // Variables used to correct the estimated quotient. + const auto C1 = TMP3; + const auto C2 = NumLo; + + // qhat = rem / den1; + lsr(EmitSize, Den1, Den, 32); + udiv(EmitSize, QHat, Rem, Den1); + // rhat = rem % den1; + msub(EmitSize, RHat, QHat, Den1, Rem); + // c1 = qhat * den0; + mov(ARMEmitter::Size::i32Bit, Den0, Den); + mul(EmitSize, C1, QHat, Den0); + // c2 = rhat * b + num0; + bfi(EmitSize, C2, RHat, 32, 32); + // if (c1 > c2) + // qhat -= (c1 - c2 > den) ? 2 : 1; + // C1 holds c1 - c2 after the subs. + subs(EmitSize, C1, C1, C2); + (void)b(ARMEmitter::Condition::CC_LS, &LowDigitDone); + sub(EmitSize, QHat, QHat, 1); + cmp(EmitSize, C1, Den); + (void)b(ARMEmitter::Condition::CC_LS, &LowDigitDone); + sub(EmitSize, QHat, QHat, 1); + (void)Bind(&LowDigitDone); + // q0 = (uint32_t)qhat; + // This move is a nop for us. + } + + // q = ((uint64_t)q1 << 32) | q0; + orr(EmitSize, Quotient, Remainder, Quotient, ARMEmitter::ShiftType::LSL, 32); +} + DEF_OP(Div) { auto Op = IROp->C(); const auto OpSize = IROp->Size; @@ -930,22 +1083,48 @@ DEF_OP(Div) { // If the sign bit matches then the result is zero (void)cbz(EmitSize, TMP1, &Only64Bit); + // The x86 instruction raises #DE when the divisor is zero which we don't do. + // TODO: #DE + (void)cbz(EmitSize, Divisor, &Only64Bit); // Long divide + // EmitDivllu() is the unsigned case, so we need to "cast" to unsigned first, + // and then apply the correct sign back to the results afterwards. { - mov(EmitSize, TMP1, Upper); - mov(EmitSize, TMP2, Lower); - mov(EmitSize, TMP3, Divisor); + const auto Sign = TMP1; + const auto AbsUpper = TMP3; + const auto AbsLower = TMP4; + const auto AbsDivisor = TMP2; + + mrs(TMP1, ARMEmitter::SystemRegister::NZCV); + str(TMP1.W(), STATE.R(), offsetof(FEXCore::Core::CpuStateFrame, State.flags[X86State::RFLAG_NZCV_LOC])); + + // Extract sign bit of the dividend. + asr(EmitSize, Sign, Upper, 63); + + // Compute absolute value of the 128 bit dividend. + eor(EmitSize, AbsLower, Lower, Sign); + eor(EmitSize, AbsUpper, Upper, Sign); + subs(EmitSize, AbsLower, AbsLower, Sign); + sbc(EmitSize, AbsUpper, AbsUpper, Sign); - ldr(TMP4, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.LDIVHandler)); + // Absolute value of the divisor. + cmp(EmitSize, Divisor, 0); + cneg(EmitSize, AbsDivisor, Divisor, ARMEmitter::Condition::CC_LT); - str(ARMEmitter::XReg::lr, ARMEmitter::Reg::rsp, -16); - blr(TMP4); - ldr(ARMEmitter::XReg::lr, ARMEmitter::Reg::rsp, 16); + // Now do the unsigned divide. + EmitDivllu(Quotient, Remainder, AbsUpper, AbsLower, AbsDivisor); - // Move results to the destination registers - mov(EmitSize, Quotient, TMP1); - mov(EmitSize, Remainder, TMP2); + // The quotient is negative when the dividend and the divisor have different signs. + eor(EmitSize, TMP1, Upper, Divisor); + cmp(EmitSize, TMP1, 0); + cneg(EmitSize, Quotient, Quotient, ARMEmitter::Condition::CC_LT); + + ldr(TMP1.W(), STATE.R(), offsetof(FEXCore::Core::CpuStateFrame, State.flags[X86State::RFLAG_NZCV_LOC])); + msr(ARMEmitter::SystemRegister::NZCV, TMP1); + + // Compute the remainder. + msub(EmitSize, Remainder, Quotient, Divisor, Lower); // Skip 64-bit path (void)b(&LongDIVRet); @@ -1013,22 +1192,22 @@ DEF_OP(UDiv) { // Check the upper bits for zero // If the upper bits are zero then we can do a 64-bit divide (void)cbz(EmitSize, Upper, &Only64Bit); + // The x86 instruction raises #DE when the divisor is zero which we don't do. + // TODO: #DE + (void)cbz(EmitSize, Divisor, &Only64Bit); // Long divide { - mov(EmitSize, TMP1, Upper); - mov(EmitSize, TMP2, Lower); - mov(EmitSize, TMP3, Divisor); + mrs(TMP1, ARMEmitter::SystemRegister::NZCV); + str(TMP1.W(), STATE.R(), offsetof(FEXCore::Core::CpuStateFrame, State.flags[X86State::RFLAG_NZCV_LOC])); - ldr(TMP4, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.LUDIVHandler)); + EmitDivllu(Quotient, Remainder, Upper, Lower, Divisor); - str(ARMEmitter::XReg::lr, ARMEmitter::Reg::rsp, -16); - blr(TMP4); - ldr(ARMEmitter::XReg::lr, ARMEmitter::Reg::rsp, 16); + ldr(TMP1.W(), STATE.R(), offsetof(FEXCore::Core::CpuStateFrame, State.flags[X86State::RFLAG_NZCV_LOC])); + msr(ARMEmitter::SystemRegister::NZCV, TMP1); - // Move results to the destination registers - mov(EmitSize, Quotient, TMP1); - mov(EmitSize, Remainder, TMP2); + // Compute the remainder. + msub(EmitSize, Remainder, Quotient, Divisor, Lower); // Skip 64-bit path (void)b(&LongDIVRet); diff --git a/FEXCore/Source/Interface/Core/JIT/BranchOps.cpp b/FEXCore/Source/Interface/Core/JIT/BranchOps.cpp index c2b1d8e287..66c93f0966 100644 --- a/FEXCore/Source/Interface/Core/JIT/BranchOps.cpp +++ b/FEXCore/Source/Interface/Core/JIT/BranchOps.cpp @@ -395,45 +395,12 @@ DEF_OP(ThreadRemoveCodeEntry) { DEF_OP(CPUID) { auto Op = IROp->C(); - isb(); - mov(ARMEmitter::Size::i64Bit, TMP2, GetReg(Op->Function)); - mov(ARMEmitter::Size::i64Bit, TMP3, GetReg(Op->Leaf)); - - PushDynamicRegs(TMP4); - SpillStaticRegs(TMP4); - - // x0 = CPUID Handler - // x1 = CPUID Function - // x2 = CPUID Leaf - ldr(ARMEmitter::XReg::x0, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.CPUIDObj)); - ldr(ARMEmitter::XReg::x3, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.CPUIDFunction)); - - if (!TMP_ABIARGS) { - mov(ARMEmitter::Size::i64Bit, ARMEmitter::Reg::r1, TMP2); - mov(ARMEmitter::Size::i64Bit, ARMEmitter::Reg::r2, TMP3); - } - - if (!CTX->Config.DisableVixlIndirectCalls) [[unlikely]] { - GenerateIndirectRuntimeCall<__uint128_t, void*, uint64_t, uint64_t>(ARMEmitter::Reg::r3); - } else { - blr(ARMEmitter::Reg::r3); - } - - if (!TMP_ABIARGS) { - mov(ARMEmitter::Size::i64Bit, TMP1, ARMEmitter::Reg::r0); - mov(ARMEmitter::Size::i64Bit, TMP2, ARMEmitter::Reg::r1); - } - - FillStaticRegs(); - - PopDynamicRegs(); + SpillStaticRegs(TMP1); - // Results are in x0, x1 - // Results want to be 4xi32 scalars - mov(ARMEmitter::Size::i32Bit, GetReg(Op->OutEAX), TMP1); - mov(ARMEmitter::Size::i32Bit, GetReg(Op->OutECX), TMP2); - ubfx(ARMEmitter::Size::i64Bit, GetReg(Op->OutEBX), TMP1, 32, 32); - ubfx(ARMEmitter::Size::i64Bit, GetReg(Op->OutEDX), TMP2, 32, 32); + LoadConstant(ARMEmitter::Size::i32Bit, TMP1, Op->InstSize); + // Jump to the syscall dispatch handler. We won't return after this. + ldr(TMP2, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.ThreadDispatchCPUIDHandler)); + br(TMP2); } DEF_OP(XGetBV) { diff --git a/FEXCore/Source/Interface/Core/JIT/ConversionOps.cpp b/FEXCore/Source/Interface/Core/JIT/ConversionOps.cpp index 03cc9af416..9caf364b4a 100644 --- a/FEXCore/Source/Interface/Core/JIT/ConversionOps.cpp +++ b/FEXCore/Source/Interface/Core/JIT/ConversionOps.cpp @@ -405,6 +405,37 @@ DEF_OP(VFCVTN2) { } } +DEF_OP(VBFCVTN) { + LOGMAN_THROW_A_FMT(CTX->HostFeatures.SupportsBF16, "Need BF16 for VBFCVTN"); + const auto Op = IROp->C(); + + const auto Dst = GetVReg(Node); + const auto Vector = GetVReg(Op->Vector); + + bfcvtn(Dst.Q(), Vector.Q()); +} + +DEF_OP(VBFCVTN2) { + LOGMAN_THROW_A_FMT(CTX->HostFeatures.SupportsBF16, "Need BF16 for VBFCVTN"); + const auto Op = IROp->C(); + + const auto Dst = GetVReg(Node); + const auto VectorLower = GetVReg(Op->VectorLower); + const auto VectorUpper = GetVReg(Op->VectorUpper); + + auto Lower = VectorLower; + if (Dst != VectorLower) { + mov(VTMP1.Q(), VectorLower.Q()); + Lower = VTMP1; + } + + bfcvtn2(Lower.Q(), VectorUpper.Q()); + + if (Dst != VectorLower) { + mov(Dst.Q(), Lower.Q()); + } +} + DEF_OP(Vector_FToI) { const auto Op = IROp->C(); const auto OpSize = IROp->Size; diff --git a/FEXCore/Source/Interface/Core/JIT/JIT.cpp b/FEXCore/Source/Interface/Core/JIT/JIT.cpp index ef7e332996..435afed5ef 100644 --- a/FEXCore/Source/Interface/Core/JIT/JIT.cpp +++ b/FEXCore/Source/Interface/Core/JIT/JIT.cpp @@ -46,34 +46,9 @@ desc: Main glue logic of the arm64 splatter backend #endif namespace { -struct DivRem { - uint64_t Quotient; - uint64_t Remainder; -}; - -static struct DivRem LUDIV(uint64_t SrcHigh, uint64_t SrcLow, uint64_t Divisor) { - __uint128_t Source = (static_cast<__uint128_t>(SrcHigh) << 64) | SrcLow; - - return { - .Quotient = (uint64_t)(Source / Divisor), - .Remainder = (uint64_t)(Source % Divisor), - }; -} - -static struct DivRem -LDIV(uint64_t SrcHigh, uint64_t SrcLow, int64_t Divisor) { - __int128_t Source = (static_cast<__uint128_t>(SrcHigh) << 64) | SrcLow; - - return { - .Quotient = (uint64_t)(Source / Divisor), - .Remainder = (uint64_t)(Source % Divisor), - }; -} - #ifndef _WIN32 -static std::optional -RDRANDFallback(uint64_t Reseed) { +static std::optional RDRANDFallback(uint64_t Reseed) { uint64_t Value {}; FHU::Syscalls::getrandom(&Value, sizeof(Value), 0); return Value; @@ -87,8 +62,7 @@ RDRANDFallback(uint64_t Reseed) { // Reference implementation by Sebastiano Vigna, public domain (CC0) // https://prng.di.unimi.it/splitmix64.c -static std::atomic - RNGState {static_cast(__builtin_readcyclecounter())}; +static std::atomic RNGState {static_cast(__builtin_readcyclecounter())}; static std::optional RDRANDFallback(uint64_t Reseed) { const uint64_t State = RNGState.load(std::memory_order_relaxed) + 0x9E3779B97F4A7C15ULL; @@ -651,9 +625,9 @@ void Arm64JITCore::Op_NoOp(const IR::IROp_Header* IROp, IR::Ref Node) {} Arm64JITCore::Arm64JITCore(FEXCore::Context::ContextImpl* ctx, FEXCore::Core::InternalThreadState* Thread) : CPUBackend(*ctx, Thread) , Arm64Emitter(ctx) - , HostSupportsSVE128 {ctx->HostFeatures.SupportsSVE128 != 0} - , HostSupportsSVE256 {ctx->HostFeatures.SupportsSVE256 != 0} - , HostSupportsAVX256 {ctx->HostFeatures.SupportsAVX && ctx->HostFeatures.SupportsSVE256} + , HostSupportsSVE128 {ctx->HostFeatures.SupportsSVE128()} + , HostSupportsSVE256 {ctx->HostFeatures.SupportsSVE256()} + , HostSupportsAVX256 {ctx->HostFeatures.SupportsAVX() && ctx->HostFeatures.SupportsSVE256()} , HostSupportsRPRES {ctx->HostFeatures.SupportsRPRES != 0} , HostSupportsAFP {ctx->HostFeatures.SupportsAFP != 0} , CTX {ctx} @@ -697,8 +671,6 @@ Arm64JITCore::Arm64JITCore(FEXCore::Context::ContextImpl* ctx, FEXCore::Core::In Ptrs.SyscallHandlerFunc = PMF.GetVTableEntry(CTX->SyscallHandler); } Ptrs.ExitFunctionLink = reinterpret_cast(&Arm64JITCore::ExitFunctionLink); - Ptrs.LUDIV = reinterpret_cast(LUDIV); - Ptrs.LDIV = reinterpret_cast(LDIV); Ptrs.RDRANDFallback = reinterpret_cast(RDRANDFallback); } @@ -782,13 +754,17 @@ void Arm64JITCore::EmitTFCheck() { .TrapNo = X86State::X86_TRAPNO_DB, .si_code = 2, .err_code = 0, + .FaultAddress = 0, }; uint64_t Constant {}; - memcpy(&Constant, &State, sizeof(State)); + memcpy(&Constant, &State, sizeof(uint64_t)); - LoadConstant(ARMEmitter::Size::i64Bit, TMP1, Constant); + LoadConstant(ARMEmitter::Size::i64Bit, TMP1, static_cast(Constant)); + // Can't use stp, offset is too large. str(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, SynchronousFaultData)); + str(ARMEmitter::XReg::zr, STATE, offsetof(FEXCore::Core::CpuStateFrame, SynchronousFaultData) + 8); + ldr(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.GuestSignal_SIGTRAP)); br(TMP1); @@ -876,9 +852,9 @@ CodeBuffer::CodeBufferAllocation Arm64JITCore::AllocateCodeBufferInSharedCache(s return AllocatedInfo; } -CPUBackend::CompiledCode Arm64JITCore::CompileCode(uint64_t Entry, uint64_t Size, bool SingleInst, const FEXCore::IR::IRListView* IR, +CPUBackend::CompiledCode Arm64JITCore::EmitJITCode(uint64_t Entry, uint64_t Size, bool SingleInst, const FEXCore::IR::IRListView* IR, FEXCore::Core::DebugData* DebugData, bool CheckTF) { - FEXCORE_PROFILE_SCOPED("Arm64::CompileCode"); + FEXCORE_PROFILE_SCOPED("Arm64::EmitJITCode"); const auto PrevNumAllocations = Relocations.size(); diff --git a/FEXCore/Source/Interface/Core/JIT/JITClass.h b/FEXCore/Source/Interface/Core/JIT/JITClass.h index 7c60a2708d..980a83237c 100644 --- a/FEXCore/Source/Interface/Core/JIT/JITClass.h +++ b/FEXCore/Source/Interface/Core/JIT/JITClass.h @@ -51,7 +51,7 @@ class Arm64JITCore final : public CPUBackend, public Arm64Emitter { ~Arm64JITCore() override; [[nodiscard]] - CPUBackend::CompiledCode CompileCode(uint64_t Entry, uint64_t Size, bool SingleInst, const FEXCore::IR::IRListView* IR, + CPUBackend::CompiledCode EmitJITCode(uint64_t Entry, uint64_t Size, bool SingleInst, const FEXCore::IR::IRListView* IR, FEXCore::Core::DebugData* DebugData, bool CheckTF) override; [[nodiscard]] @@ -629,10 +629,14 @@ class Arm64JITCore final : public CPUBackend, public Arm64Emitter { void Emulate128BitGather(IR::OpSize Size, IR::OpSize ElementSize, ARMEmitter::VRegister Dst, ARMEmitter::VRegister IncomingDst, std::optional BaseAddr, ARMEmitter::VRegister VectorIndexLow, std::optional VectorIndexHigh, ARMEmitter::VRegister MaskReg, IR::OpSize VectorIndexSize, - size_t DataElementOffsetStart, size_t IndexElementOffsetStart, uint8_t OffsetScale, IR::OpSize AddrSize); + size_t DataElementOffsetStart, size_t IndexElementOffsetStart, uint8_t OffsetScale, IR::OpSize AddrSize, + bool MaskAllOnes); void EmitTFCheck(); + void EmitDivllu(ARMEmitter::Register Quotient, ARMEmitter::Register Remainder, ARMEmitter::Register Upper, ARMEmitter::Register Lower, + ARMEmitter::Register Divisor); + void EmitSuspendInterruptCheck(); void EmitEntryPoint(ARMEmitter::BackwardLabel& HeaderLabel, bool CheckTF); diff --git a/FEXCore/Source/Interface/Core/JIT/MemoryOps.cpp b/FEXCore/Source/Interface/Core/JIT/MemoryOps.cpp index 805a7312a0..d7b716cab9 100644 --- a/FEXCore/Source/Interface/Core/JIT/MemoryOps.cpp +++ b/FEXCore/Source/Interface/Core/JIT/MemoryOps.cpp @@ -1058,7 +1058,7 @@ void Arm64JITCore::Emulate128BitGather(IR::OpSize Size, IR::OpSize ElementSize, ARMEmitter::VRegister IncomingDst, std::optional BaseAddr, ARMEmitter::VRegister VectorIndexLow, std::optional VectorIndexHigh, ARMEmitter::VRegister MaskReg, IR::OpSize VectorIndexSize, size_t DataElementOffsetStart, - size_t IndexElementOffsetStart, uint8_t OffsetScale, IR::OpSize AddrSize) { + size_t IndexElementOffsetStart, uint8_t OffsetScale, IR::OpSize AddrSize, bool MaskAllOnes) { LOGMAN_THROW_A_FMT(ElementSize >= IR::OpSize::i8Bit && ElementSize <= IR::OpSize::i64Bit, "Invalid element size"); const auto PerformSMove = [this](IR::OpSize ElementSize, const ARMEmitter::Register Dst, const ARMEmitter::VRegister Vector, int index) { @@ -1116,11 +1116,13 @@ void Arm64JITCore::Emulate128BitGather(IR::OpSize Size, IR::OpSize ElementSize, for (size_t i = DataElementOffsetStart, IndexElement = IndexElementOffsetStart; i < NumDataElements; ++i, ++IndexElement) { ARMEmitter::ForwardLabel Skip {}; - // Extract mask element - PerformMove(ElementSize, WorkingReg, MaskReg, i); + if (!MaskAllOnes) { + // Extract mask element + PerformMove(ElementSize, WorkingReg, MaskReg, i); - // Skip if the mask's sign bit isn't set - (void)tbz(WorkingReg, ElementSizeInBits - 1, &Skip); + // Skip if the mask's sign bit isn't set + (void)tbz(WorkingReg, ElementSizeInBits - 1, &Skip); + } // Extract Index Element if ((IndexElement * IR::OpSizeToSize(VectorIndexSize)) >= 16) { @@ -1216,12 +1218,15 @@ DEF_OP(VLoadVectorGatherMasked) { const auto SubRegSize = ConvertSubRegSize8(IROp); - const auto CMPPredicate = ARMEmitter::PReg::p0; const auto GoverningPredicate = Is256Bit ? PRED_TMP_32B : PRED_TMP_16B; - // Check if the sign bit is set for the given element size. - cmplt(SubRegSize, CMPPredicate, GoverningPredicate.Zeroing(), MaskReg.Z(), 0); - auto TempDst = VTMP1; + // A mask known to be all-ones loads every element straight into the destination under the governing predicate. + const ARMEmitter::PRegister CMPPredicate = Op->MaskAllOnes ? GoverningPredicate : ARMEmitter::PReg::p0; + auto TempDst = Op->MaskAllOnes ? Dst : VTMP1; + if (!Op->MaskAllOnes) { + // Check if the sign bit is set for the given element size. + cmplt(SubRegSize, CMPPredicate, GoverningPredicate.Zeroing(), MaskReg.Z(), 0); + } // No need to load a temporary register in the case that we weren't provided a base address and there is no scaling. ARMEmitter::SVEMemOperand MemDst {ARMEmitter::SVEMemOperand(VectorIndexLow.Z(), 0)}; @@ -1256,12 +1261,14 @@ DEF_OP(VLoadVectorGatherMasked) { default: break; } - ///< Merge elements based on predicate. - sel(SubRegSize, Dst.Z(), CMPPredicate, TempDst.Z(), IncomingDst.Z()); + if (!Op->MaskAllOnes) { + ///< Merge elements based on predicate. + sel(SubRegSize, Dst.Z(), CMPPredicate, TempDst.Z(), IncomingDst.Z()); + } } else { LOGMAN_THROW_A_FMT(!Is256Bit, "Can't emulate this gather load in the backend! Programming error!"); Emulate128BitGather(IROp->Size, IROp->ElementSize, Dst, IncomingDst, BaseAddr, VectorIndexLow, VectorIndexHigh, MaskReg, - VectorIndexSize, DataElementOffsetStart, IndexElementOffsetStart, OffsetScale, Op->AddrSize); + VectorIndexSize, DataElementOffsetStart, IndexElementOffsetStart, OffsetScale, Op->AddrSize, Op->MaskAllOnes); } } @@ -1295,16 +1302,20 @@ DEF_OP(VLoadVectorGatherMaskedQPS) { } const auto CMPPredicate = ARMEmitter::PReg::p0; - const auto CMPPredicate2 = ARMEmitter::PReg::p1; + // A mask known to be all-ones loads every element under the governing predicate and narrows straight into the destination. + const ARMEmitter::PRegister CMPPredicate2 = Op->MaskAllOnes ? PRED_TMP_16B : ARMEmitter::PReg::p1; const auto GoverningPredicate = PRED_TMP_16B; - // Check if the sign bit is set for the given element size. - // This will set the predicate bits for elements [0, 1, 2, 3] - // We then use punpklo to extend the low results to be for 64-bit elements. - cmplt(ARMEmitter::SubRegSize::i32Bit, CMPPredicate, GoverningPredicate.Zeroing(), MaskReg.Z(), 0); - punpklo(CMPPredicate2, CMPPredicate); + if (!Op->MaskAllOnes) { + // Check if the sign bit is set for the given element size. + // This will set the predicate bits for elements [0, 1, 2, 3] + // We then use punpklo to extend the low results to be for 64-bit elements. + cmplt(ARMEmitter::SubRegSize::i32Bit, CMPPredicate, GoverningPredicate.Zeroing(), MaskReg.Z(), 0); + punpklo(CMPPredicate2, CMPPredicate); + } auto TempDst = VTMP1; + const auto NarrowDst = Op->MaskAllOnes ? Dst : TempDst; auto GatherExtend = [this](ARMEmitter::VRegister Dst, std::optional BaseAddr, ARMEmitter::VRegister VectorIndex, ARMEmitter::PRegister CMPPredicate, ARMEmitter::SVEModType ModType, uint8_t OffsetScale) { @@ -1328,21 +1339,23 @@ DEF_OP(VLoadVectorGatherMaskedQPS) { GatherExtend(TempDst, BaseAddr, VectorIndexLow, CMPPredicate2, ModType, OffsetScale); if (VectorIndexHigh.has_value()) { - punpkhi(CMPPredicate2, CMPPredicate); + if (!Op->MaskAllOnes) { + punpkhi(CMPPredicate2, CMPPredicate); + } GatherExtend(VTMP2, BaseAddr, *VectorIndexHigh, CMPPredicate2, ModType, OffsetScale); // Move elements to the lower half. - uzp1(ARMEmitter::SubRegSize::i32Bit, TempDst.Q(), TempDst.Q(), VTMP2.Q()); - ///< Merge elements based on predicate. - sel(ARMEmitter::SubRegSize::i32Bit, Dst.Z(), CMPPredicate, TempDst.Z(), IncomingDst.Z()); + uzp1(ARMEmitter::SubRegSize::i32Bit, NarrowDst.Q(), TempDst.Q(), VTMP2.Q()); } else { // Move elements to the lower half. - xtn(ARMEmitter::SubRegSize::i32Bit, TempDst.Q(), TempDst.Q()); + xtn(ARMEmitter::SubRegSize::i32Bit, NarrowDst.Q(), TempDst.Q()); + } + if (!Op->MaskAllOnes) { ///< Merge elements based on predicate. sel(ARMEmitter::SubRegSize::i32Bit, Dst.Z(), CMPPredicate, TempDst.Z(), IncomingDst.Z()); } } else { Emulate128BitGather(IR::OpSize::i128Bit, IR::OpSize::i32Bit, Dst, IncomingDst, BaseAddr, VectorIndexLow, VectorIndexHigh, MaskReg, - IR::OpSize::i64Bit, 0, 0, OffsetScale, Op->AddrSize); + IR::OpSize::i64Bit, 0, 0, OffsetScale, Op->AddrSize, Op->MaskAllOnes); } } diff --git a/FEXCore/Source/Interface/Core/JIT/MiscOps.cpp b/FEXCore/Source/Interface/Core/JIT/MiscOps.cpp index 6e8df95538..137c99c601 100644 --- a/FEXCore/Source/Interface/Core/JIT/MiscOps.cpp +++ b/FEXCore/Source/Interface/Core/JIT/MiscOps.cpp @@ -68,31 +68,42 @@ DEF_OP(Break) { .TrapNo = Op->Reason.TrapNumber, .si_code = Op->Reason.si_code, .err_code = Op->Reason.ErrorRegister, + .FaultAddress = 0, // Comes from SSA argument. }; uint64_t Constant {}; - memcpy(&Constant, &State, sizeof(State)); + memcpy(&Constant, &State, sizeof(uint64_t)); - LoadConstant(ARMEmitter::Size::i64Bit, TMP1, Constant); + LoadConstant(ARMEmitter::Size::i64Bit, TMP1, static_cast(Constant)); + + auto FaultGPR = GetZeroableReg(Op->FaultAddress); + + // Can't use stp, offset is too large. str(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, SynchronousFaultData)); + str(FaultGPR.X(), STATE, offsetof(FEXCore::Core::CpuStateFrame, SynchronousFaultData) + 8); - switch (Op->Reason.Signal) { - case Core::FAULT_SIGILL: - ldr(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.GuestSignal_SIGILL)); - br(TMP1); - break; - case Core::FAULT_SIGTRAP: - ldr(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.GuestSignal_SIGTRAP)); - br(TMP1); - break; - case Core::FAULT_SIGSEGV: - ldr(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.GuestSignal_SIGSEGV)); + if (CTX->HostFeatures.ProcessFeatures.SupportsFaultFreeSynchronousFaults) { + ldr(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.GuestSignal_SynchronousFault)); br(TMP1); - break; - default: - ldr(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.GuestSignal_SIGTRAP)); - br(TMP1); - break; + } else { + switch (Op->Reason.Signal) { + case Core::FAULT_SIGILL: + ldr(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.GuestSignal_SIGILL)); + br(TMP1); + break; + case Core::FAULT_SIGTRAP: + ldr(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.GuestSignal_SIGTRAP)); + br(TMP1); + break; + case Core::FAULT_SIGSEGV: + ldr(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.GuestSignal_SIGSEGV)); + br(TMP1); + break; + default: + ldr(TMP1, STATE, offsetof(FEXCore::Core::CpuStateFrame, Pointers.GuestSignal_SIGTRAP)); + br(TMP1); + break; + } } } diff --git a/FEXCore/Source/Interface/Core/JIT/VectorOps.cpp b/FEXCore/Source/Interface/Core/JIT/VectorOps.cpp index 43e38d8dd7..ee15b31c38 100644 --- a/FEXCore/Source/Interface/Core/JIT/VectorOps.cpp +++ b/FEXCore/Source/Interface/Core/JIT/VectorOps.cpp @@ -930,6 +930,9 @@ DEF_OP(VectorImm) { const auto Is256Bit = OpSize == IR::OpSize::i256Bit; LOGMAN_THROW_A_FMT(!Is256Bit || HostSupportsSVE256, "Need SVE256 support in order to use {} with 256-bit operation", __func__); + if (Op->Do64BitExpansion) { + LOGMAN_THROW_A_FMT(!Is256Bit, "64-bit expansion unsupported on 256-bit operations."); + } const auto ElementSize = Op->Header.ElementSize; const auto SubRegSize = ConvertSubRegSize8(IROp); @@ -945,12 +948,22 @@ DEF_OP(VectorImm) { dup_imm(SubRegSize, Dst.Z(), static_cast(Op->Immediate)); } } else { - if (ElementSize == IR::OpSize::i64Bit) { + if (!Op->Do64BitExpansion && ElementSize == IR::OpSize::i64Bit) { // movi with 64bit element size doesn't do what we want here LoadConstant(ARMEmitter::Size::i64Bit, TMP1, static_cast(Op->Immediate) << Op->ShiftAmount); dup(SubRegSize, Dst.Q(), TMP1.R()); } else { - movi(SubRegSize, Dst.Q(), Op->Immediate, Op->ShiftAmount); + uint64_t Imm = Op->Immediate; + if (Op->Do64BitExpansion) { + // Need to manually expand the immediate for this case. + Imm = 0; + for (size_t i = 0; i < 8; ++i) { + if ((Op->Immediate >> i) & 1) { + Imm |= (0xFFULL << (i * 8)); + } + } + } + movi(SubRegSize, Dst.Q(), Imm, Op->ShiftAmount); } } } diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index 8dc605ca7a..901a922872 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -184,30 +184,35 @@ void OpDispatchBuilder::SecondaryALUOp(OpcodeArgs) { switch (Op->OP) { case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 0): case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 0): + case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x82), 0): case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 0): IROp = FEXCore::IR::IROps::OP_ADD; AtomicIROp = FEXCore::IR::IROps::OP_ATOMICFETCHADD; break; case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 1): case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 1): + case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x82), 1): case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 1): IROp = FEXCore::IR::IROps::OP_OR; AtomicIROp = FEXCore::IR::IROps::OP_ATOMICFETCHOR; break; case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 4): case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 4): + case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x82), 4): case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 4): IROp = FEXCore::IR::IROps::OP_ANDWITHFLAGS; AtomicIROp = FEXCore::IR::IROps::OP_ATOMICFETCHAND; break; case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 5): case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 5): + case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x82), 5): case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 5): IROp = FEXCore::IR::IROps::OP_SUB; AtomicIROp = FEXCore::IR::IROps::OP_ATOMICFETCHSUB; break; case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 6): case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 6): + case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x82), 6): case OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 6): IROp = FEXCore::IR::IROps::OP_XOR; AtomicIROp = FEXCore::IR::IROps::OP_ATOMICFETCHXOR; @@ -1004,6 +1009,7 @@ void OpDispatchBuilder::TESTOp(OpcodeArgs, uint32_t SrcIndex, bool DestRAX) { } InvalidateAF(); + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC); } void OpDispatchBuilder::ARPLOp(OpcodeArgs) { @@ -1364,20 +1370,19 @@ void OpDispatchBuilder::MOVOffsetOp(OpcodeArgs) { } void OpDispatchBuilder::CPUIDOp(OpcodeArgs) { - Ref Src = LoadGPRRegister(X86State::REG_RAX); - Ref Leaf = LoadGPRRegister(X86State::REG_RCX); + BlockSetRIP = true; - Ref RAX = _AllocateGPR(false); - Ref RBX = _AllocateGPR(false); - Ref RCX = _AllocateGPR(false); - Ref RDX = _AllocateGPR(false); + // Calculate flags early. + CalculateDeferredFlags(); - _CPUID(Src, Leaf, RAX, RBX, RCX, RDX); + // Similar to Syscall. Store the RIP to the start of the instruction. + // CPUID operation will modify the RIP itself. + const auto GPRSize = GetGPROpSize(); + auto NewRIP = GetRelocatedPC(Op, -Op->InstSize); + _StoreContextGPR(GPRSize, NewRIP, offsetof(FEXCore::Core::CPUState, rip)); - StoreGPRRegister(X86State::REG_RAX, RAX); - StoreGPRRegister(X86State::REG_RBX, RBX); - StoreGPRRegister(X86State::REG_RCX, RCX); - StoreGPRRegister(X86State::REG_RDX, RDX); + FlushRegisterCache(); + _CPUID(Op->InstSize); } uint32_t OpDispatchBuilder::GetConstantShift(X86Tables::DecodedOp Op, bool Is1Bit) { @@ -1410,6 +1415,7 @@ void OpDispatchBuilder::SHLOp(OpcodeArgs) { Ref Result = _Lshl(Size == OpSize::i64Bit ? OpSize::i64Bit : OpSize::i32Bit, Dest, Src); HandleShift(Op, Result, Dest, ShiftType::LSL, Src); + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC); } void OpDispatchBuilder::SHLImmediateOp(OpcodeArgs, bool SHL1Bit) { @@ -1423,6 +1429,7 @@ void OpDispatchBuilder::SHLImmediateOp(OpcodeArgs, bool SHL1Bit) { CalculateFlags_ShiftLeftImmediate(OpSizeFromSrc(Op), Result, Dest, Shift); CalculateDeferredFlags(); StoreResultGPR(Op, Result); + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC); } void OpDispatchBuilder::SHROp(OpcodeArgs) { @@ -1432,6 +1439,8 @@ void OpDispatchBuilder::SHROp(OpcodeArgs) { auto ALUOp = _Lshr(std::max(OpSize::i32Bit, Size), Dest, Src); HandleShift(Op, ALUOp, Dest, ShiftType::LSR, Src); + + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC); } void OpDispatchBuilder::SHRImmediateOp(OpcodeArgs, bool SHR1Bit) { @@ -1444,6 +1453,8 @@ void OpDispatchBuilder::SHRImmediateOp(OpcodeArgs, bool SHR1Bit) { CalculateFlags_ShiftRightImmediate(OpSizeFromSrc(Op), ALUOp, Dest, Shift); CalculateDeferredFlags(); StoreResultGPR(Op, ALUOp); + + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC); } void OpDispatchBuilder::SHLDOp(OpcodeArgs) { @@ -1487,6 +1498,8 @@ void OpDispatchBuilder::SHLDOp(OpcodeArgs) { Res = _Select(OpSize::i64Bit, OpSize::i64Bit, CondClass::EQ, Shift, Constant(0), Dest, Res); HandleShift(Op, Res, Dest, ShiftType::LSL, Shift); + + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC); } void OpDispatchBuilder::SHLDImmediateOp(OpcodeArgs) { @@ -1518,6 +1531,8 @@ void OpDispatchBuilder::SHLDImmediateOp(OpcodeArgs) { // Ensure Zext still occurs StoreResultGPR(Op, Dest); } + + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC); } void OpDispatchBuilder::SHRDOp(OpcodeArgs) { @@ -1552,6 +1567,8 @@ void OpDispatchBuilder::SHRDOp(OpcodeArgs) { Res = _Select(OpSize::i64Bit, OpSize::i64Bit, CondClass::EQ, Shift, Constant(0), Dest, Res); HandleShift(Op, Res, Dest, ShiftType::LSR, Shift); + + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC); } void OpDispatchBuilder::SHRDImmediateOp(OpcodeArgs) { @@ -1582,6 +1599,8 @@ void OpDispatchBuilder::SHRDImmediateOp(OpcodeArgs) { // Ensure Zext still occurs StoreResultGPR(Op, Dest); } + + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC); } void OpDispatchBuilder::ASHROp(OpcodeArgs, bool Immediate, bool SHR1Bit) { @@ -1611,6 +1630,8 @@ void OpDispatchBuilder::ASHROp(OpcodeArgs, bool Immediate, bool SHR1Bit) { HandleShift(Op, Result, Dest, ShiftType::ASR, Src); } + + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC); } void OpDispatchBuilder::RotateOp(OpcodeArgs, bool Left, bool IsImmediate, bool Is1Bit) { @@ -1681,6 +1702,8 @@ void OpDispatchBuilder::ANDNBMIOp(OpcodeArgs) { StoreResultGPR(Op, Dest); CalculateFlags_Logical(OpSizeFromSrc(Op), Dest); + + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC, X86State::RFLAG_PF_RAW_LOC); } void OpDispatchBuilder::BEXTRBMIOp(OpcodeArgs) { @@ -1724,6 +1747,8 @@ void OpDispatchBuilder::BEXTRBMIOp(OpcodeArgs) { // AF are undefined. SetNZ_ZeroCV(GetOpSize(Dest), Dest); InvalidatePF_AF(); + + AcidTestFlags(X86State::RFLAG_SF_RAW_LOC, X86State::RFLAG_AF_RAW_LOC, X86State::RFLAG_PF_RAW_LOC); } void OpDispatchBuilder::BLSIBMIOp(OpcodeArgs) { @@ -1745,6 +1770,8 @@ void OpDispatchBuilder::BLSIBMIOp(OpcodeArgs) { SetNZ_ZeroCV(Size, Result); InvalidatePF_AF(); SetCFInverted(GetRFLAG(X86State::RFLAG_ZF_RAW_LOC)); + + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC, X86State::RFLAG_PF_RAW_LOC); } void OpDispatchBuilder::BLSMSKBMIOp(OpcodeArgs) { @@ -1765,6 +1792,8 @@ void OpDispatchBuilder::BLSMSKBMIOp(OpcodeArgs) { // and O) while setting S. SetNZ_ZeroCV(Size, Result); SetCFInverted(CFInv); + + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC, X86State::RFLAG_PF_RAW_LOC); } void OpDispatchBuilder::BLSRBMIOp(OpcodeArgs) { @@ -1782,6 +1811,8 @@ void OpDispatchBuilder::BLSRBMIOp(OpcodeArgs) { SetNZ_ZeroCV(Size, Result); SetCFInverted(CFInv); InvalidatePF_AF(); + + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC, X86State::RFLAG_PF_RAW_LOC); } // Handles SARX, SHLX, and SHRX @@ -1841,6 +1872,8 @@ void OpDispatchBuilder::BZHI(OpcodeArgs) { InvalidatePF_AF(); SetNZ_ZeroCV(Size, Result); SetCFInverted(CFInv); + + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC, X86State::RFLAG_PF_RAW_LOC); } void OpDispatchBuilder::RORX(OpcodeArgs) { @@ -2565,6 +2598,9 @@ void OpDispatchBuilder::BTOp(OpcodeArgs, uint32_t SrcIndex, BTAction Action) { // to insert into CF directly. We could optimize perhaps. SetCFDirect(Value, 0, true); } + + AcidTestFlags(X86State::RFLAG_OF_RAW_LOC, X86State::RFLAG_SF_RAW_LOC, X86State::RFLAG_ZF_RAW_LOC, X86State::RFLAG_AF_RAW_LOC, + X86State::RFLAG_PF_RAW_LOC); } void OpDispatchBuilder::IMUL1SrcOp(OpcodeArgs) { @@ -2604,6 +2640,8 @@ void OpDispatchBuilder::IMUL1SrcOp(OpcodeArgs) { StoreResultGPR(Op, Dest); CalculateFlags_MUL(Size, Dest, ResultHigh); + + AcidTestFlags(X86State::RFLAG_SF_RAW_LOC, X86State::RFLAG_ZF_RAW_LOC, X86State::RFLAG_AF_RAW_LOC, X86State::RFLAG_PF_RAW_LOC); } void OpDispatchBuilder::IMUL2SrcOp(OpcodeArgs) { @@ -2643,6 +2681,8 @@ void OpDispatchBuilder::IMUL2SrcOp(OpcodeArgs) { StoreResultGPR(Op, Dest); CalculateFlags_MUL(Size, Dest, ResultHigh); + + AcidTestFlags(X86State::RFLAG_SF_RAW_LOC, X86State::RFLAG_ZF_RAW_LOC, X86State::RFLAG_AF_RAW_LOC, X86State::RFLAG_PF_RAW_LOC); } void OpDispatchBuilder::IMULOp(OpcodeArgs) { @@ -2698,6 +2738,8 @@ void OpDispatchBuilder::IMULOp(OpcodeArgs) { } CalculateFlags_MUL(Size, Result, ResultHigh); + + AcidTestFlags(X86State::RFLAG_SF_RAW_LOC, X86State::RFLAG_ZF_RAW_LOC, X86State::RFLAG_AF_RAW_LOC, X86State::RFLAG_PF_RAW_LOC); } void OpDispatchBuilder::MULOp(OpcodeArgs) { @@ -2868,6 +2910,8 @@ void OpDispatchBuilder::DAAOp(OpcodeArgs) { SetCFInverted(CFInv); CalculatePF(AL); SetAFAndFixup(AF); + + AcidTestFlags(X86State::RFLAG_OF_RAW_LOC); } void OpDispatchBuilder::DASOp(OpcodeArgs) { @@ -2894,6 +2938,8 @@ void OpDispatchBuilder::DASOp(OpcodeArgs) { SetCFDirect(NewCF); CalculatePF(AL); SetAFAndFixup(AF); + + AcidTestFlags(X86State::RFLAG_OF_RAW_LOC); } void OpDispatchBuilder::AAAOp(OpcodeArgs) { @@ -2911,6 +2957,7 @@ void OpDispatchBuilder::AAAOp(OpcodeArgs) { // AL = AL & 0x0F A = _And(OpSize::i32Bit, A, Constant(0xFF0F)); StoreGPRRegister(X86State::REG_RAX, A, OpSize::i16Bit); + AcidTestFlags(X86State::RFLAG_OF_RAW_LOC, X86State::RFLAG_SF_RAW_LOC, X86State::RFLAG_ZF_RAW_LOC, X86State::RFLAG_PF_RAW_LOC); } void OpDispatchBuilder::AASOp(OpcodeArgs) { @@ -2928,6 +2975,8 @@ void OpDispatchBuilder::AASOp(OpcodeArgs) { // AL = AL & 0x0F A = _And(OpSize::i32Bit, A, Constant(0xFF0F)); StoreGPRRegister(X86State::REG_RAX, A, OpSize::i16Bit); + + AcidTestFlags(X86State::RFLAG_OF_RAW_LOC, X86State::RFLAG_SF_RAW_LOC, X86State::RFLAG_ZF_RAW_LOC, X86State::RFLAG_PF_RAW_LOC); } void OpDispatchBuilder::AAMOp(OpcodeArgs) { @@ -2942,6 +2991,8 @@ void OpDispatchBuilder::AAMOp(OpcodeArgs) { SetNZ_ZeroCV(OpSize::i8Bit, Res); CalculatePF(Res); InvalidateAF(); + + AcidTestFlags(X86State::RFLAG_OF_RAW_LOC, X86State::RFLAG_AF_RAW_LOC, X86State::RFLAG_CF_RAW_LOC); } void OpDispatchBuilder::AADOp(OpcodeArgs) { @@ -2955,6 +3006,8 @@ void OpDispatchBuilder::AADOp(OpcodeArgs) { SetNZ_ZeroCV(OpSize::i8Bit, Result); CalculatePF(Result); InvalidateAF(); + + AcidTestFlags(X86State::RFLAG_OF_RAW_LOC, X86State::RFLAG_AF_RAW_LOC, X86State::RFLAG_CF_RAW_LOC); } void OpDispatchBuilder::XLATOp(OpcodeArgs) { @@ -3102,7 +3155,38 @@ void OpDispatchBuilder::SMSWOp(OpcodeArgs) { } if (IsMemDst) { - // Memory destinatino always writes only 16-bits. + // Memory destination always writes only 16-bits. + DstSize = OpSize::i16Bit; + } + + StoreResultGPR_WithOpSize(Op, Op->Dest, Const, DstSize); +} + +void OpDispatchBuilder::SLDTOp(OpcodeArgs) { + const bool IsMemDst = DestIsMem(Op); + + IR::OpSize DstSize {OpSize::iInvalid}; + Ref Const = _Constant(0); + + const auto OpAddr = X86Tables::DecodeFlags::GetOpAddr(Op->Flags, 0); + if (Is64BitMode) { + DstSize = OpAddr == X86Tables::DecodeFlags::FLAG_OPERAND_SIZE_LAST ? OpSize::i16Bit : + OpAddr == X86Tables::DecodeFlags::FLAG_WIDENING_SIZE_LAST ? OpSize::i64Bit : + OpSize::i32Bit; + + if (!IsMemDst && DstSize == OpSize::i32Bit) { + // Special-case version of `sldt ebx`. This instruction does an insert in to the lower 32-bits on 64-bit hosts. + // Override and insert. + auto Dest = LoadSourceGPR_WithOpSize(Op, Op->Dest, GetGPROpSize(), Op->Flags); + Const = _Bfi(OpSize::i64Bit, 32, 0, Dest, Const); + DstSize = OpSize::i64Bit; + } + } else { + DstSize = OpAddr == X86Tables::DecodeFlags::FLAG_OPERAND_SIZE_LAST ? OpSize::i16Bit : OpSize::i32Bit; + } + + if (IsMemDst) { + // Memory destination always writes only 16-bits. DstSize = OpSize::i16Bit; } @@ -3754,6 +3838,10 @@ void OpDispatchBuilder::DIVOp(OpcodeArgs) { StoreGPRRegister(X86State::REG_RAX, Quotient, Size); StoreGPRRegister(X86State::REG_RDX, Remainder, Size); } + + // All flags are undefined. + AcidTestFlags(X86State::RFLAG_OF_RAW_LOC, X86State::RFLAG_SF_RAW_LOC, X86State::RFLAG_ZF_RAW_LOC, X86State::RFLAG_AF_RAW_LOC, + X86State::RFLAG_PF_RAW_LOC, X86State::RFLAG_CF_RAW_LOC); } void OpDispatchBuilder::IDIVOp(OpcodeArgs) { @@ -3797,6 +3885,10 @@ void OpDispatchBuilder::IDIVOp(OpcodeArgs) { StoreGPRRegister(X86State::REG_RAX, Quotient, Size); StoreGPRRegister(X86State::REG_RDX, Remainder, Size); } + + // All flags are undefined. + AcidTestFlags(X86State::RFLAG_OF_RAW_LOC, X86State::RFLAG_SF_RAW_LOC, X86State::RFLAG_ZF_RAW_LOC, X86State::RFLAG_AF_RAW_LOC, + X86State::RFLAG_PF_RAW_LOC, X86State::RFLAG_CF_RAW_LOC); } void OpDispatchBuilder::BSFOp(OpcodeArgs) { @@ -3819,6 +3911,9 @@ void OpDispatchBuilder::BSFOp(OpcodeArgs) { // applications might rely on that in the wild. auto SelectOp = NZCVSelect(GPRSize, CondClass::EQ, Dest, Result); StoreResultGPR_WithOpSize(Op, Op->Dest, SelectOp, DstSize); + + AcidTestFlags(X86State::RFLAG_OF_RAW_LOC, X86State::RFLAG_SF_RAW_LOC, X86State::RFLAG_AF_RAW_LOC, X86State::RFLAG_PF_RAW_LOC, + X86State::RFLAG_CF_RAW_LOC); } void OpDispatchBuilder::BSROp(OpcodeArgs) { @@ -3837,6 +3932,9 @@ void OpDispatchBuilder::BSROp(OpcodeArgs) { // If Src was zero then the destination doesn't get modified auto SelectOp = NZCVSelect(GPRSize, CondClass::EQ, Dest, Result); StoreResultGPR_WithOpSize(Op, Op->Dest, SelectOp, DstSize); + + AcidTestFlags(X86State::RFLAG_OF_RAW_LOC, X86State::RFLAG_SF_RAW_LOC, X86State::RFLAG_AF_RAW_LOC, X86State::RFLAG_PF_RAW_LOC, + X86State::RFLAG_CF_RAW_LOC); } void OpDispatchBuilder::CMPXCHGOp(OpcodeArgs) { @@ -4653,11 +4751,11 @@ OpDispatchBuilder::OpDispatchBuilder(FEXCore::Context::ContextImpl* ctx, FEXCore : IREmitter {ctx->OpDispatcherAllocator, ctx->HostFeatures.SupportsTSOImm9 != 0} , CTX {ctx} , Thread {Thread} { - if (CTX->HostFeatures.SupportsAVX && CTX->HostFeatures.SupportsSVE256) { + if (CTX->HostFeatures.SupportsAVX() && CTX->HostFeatures.SupportsSVE256()) { SaveAVXStateFunc = &OpDispatchBuilder::SaveAVXState; RestoreAVXStateFunc = &OpDispatchBuilder::RestoreAVXState; DefaultAVXStateFunc = &OpDispatchBuilder::DefaultAVXState; - } else if (CTX->HostFeatures.SupportsAVX) { + } else if (CTX->HostFeatures.SupportsAVX()) { SaveAVXStateFunc = &OpDispatchBuilder::AVX128_SaveAVXState; RestoreAVXStateFunc = &OpDispatchBuilder::AVX128_RestoreAVXState; DefaultAVXStateFunc = &OpDispatchBuilder::AVX128_DefaultAVXState; @@ -4782,12 +4880,14 @@ void OpDispatchBuilder::ALUOp(OpcodeArgs, FEXCore::IR::IROps ALUIROp, FEXCore::I case FEXCore::IR::IROps::OP_AND: case FEXCore::IR::IROps::OP_OR: { CalculateFlags_Logical(Size, Result); + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC); break; } case FEXCore::IR::IROps::OP_ANDWITHFLAGS: { HandleNZ00Write(); CalculatePF(Result); InvalidateAF(); + AcidTestFlags(X86State::RFLAG_AF_RAW_LOC); break; } default: break; @@ -4814,7 +4914,7 @@ void OpDispatchBuilder::INTOp(OpcodeArgs) { case 0xCD: { // INT imm8 uint8_t Literal = Op->Src[0].Literal(); - if (CTX->HostFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Linux) { + if (CTX->HostFeatures.ProcessFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Linux) { constexpr uint8_t SYSCALL_LITERAL = 0x80; if (Literal == SYSCALL_LITERAL) { if (Is64BitMode) [[unlikely]] { @@ -4826,8 +4926,8 @@ void OpDispatchBuilder::INTOp(OpcodeArgs) { SyscallOp(Op, false); return; } - } else if (CTX->HostFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Wow64 || - CTX->HostFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec) { + } else if (CTX->HostFeatures.ProcessFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Wow64 || + CTX->HostFeatures.ProcessFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec) { constexpr uint8_t SYSCALL_LITERAL = 0x2E; if (Literal == SYSCALL_LITERAL) { // Can be used for both 64-bit and 32-bit syscalls on windows @@ -4835,7 +4935,7 @@ void OpDispatchBuilder::INTOp(OpcodeArgs) { return; } - if (CTX->HostFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec) { + if (CTX->HostFeatures.ProcessFeatures.HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec) { // This is used when QueryPerformanceCounter is called on recent Windows versions, it causes CNTVCT to be written into RAX. constexpr uint8_t GET_CNTVCT_LITERAL = 0x81; if (Literal == GET_CNTVCT_LITERAL) { @@ -4938,6 +5038,8 @@ void OpDispatchBuilder::TZCNT(OpcodeArgs) { StoreResultGPR(Op, Src); CalculateFlags_ZCNT(OpSizeFromSrc(Op), Src); + + AcidTestFlags(X86State::RFLAG_OF_RAW_LOC, X86State::RFLAG_SF_RAW_LOC, X86State::RFLAG_AF_RAW_LOC, X86State::RFLAG_PF_RAW_LOC); } void OpDispatchBuilder::LZCNT(OpcodeArgs) { @@ -4947,6 +5049,7 @@ void OpDispatchBuilder::LZCNT(OpcodeArgs) { auto Res = _CountLeadingZeroes(OpSizeFromSrc(Op), Src); StoreResultGPR(Op, Res); CalculateFlags_ZCNT(OpSizeFromSrc(Op), Res); + AcidTestFlags(X86State::RFLAG_OF_RAW_LOC, X86State::RFLAG_SF_RAW_LOC, X86State::RFLAG_AF_RAW_LOC, X86State::RFLAG_PF_RAW_LOC); } void OpDispatchBuilder::MOVBEOp(OpcodeArgs) { @@ -5025,6 +5128,11 @@ void OpDispatchBuilder::StoreFenceOrCLFlush(OpcodeArgs) { } } +void OpDispatchBuilder::SerializeOp(OpcodeArgs) { + _Fence(FenceType::Inst); + _Fence(FenceType::Store); +} + void OpDispatchBuilder::UMonitorOrCLRSSBSY(OpcodeArgs) { if (DestIsMem(Op) || !CTX->HostFeatures.SupportsWFXT) { // CLRSSBSY @@ -5073,7 +5181,7 @@ void OpDispatchBuilder::RDTSCPOp(OpcodeArgs) { // - Explicitly use an MFENCE before this instruction if you want this behaviour // This instruction is not an execution fence, so subsequent instructions can execute after this // - Explicitly use an LFENCE after RDTSCP if you want to block this behaviour - if (CTX->HostFeatures.HostType != FEXCore::HostFeatures::HostTypeEnum::Linux && !CTX->HostFeatures.SupportsCPUIndexInTPIDRRO) { + if (CTX->HostFeatures.ProcessFeatures.HostType != FEXCore::HostFeatures::HostTypeEnum::Linux && !CTX->HostFeatures.SupportsCPUIndexInTPIDRRO) { // RDTSCP is unsupported on Win32 platforms if TPIDRRO isn't supported. UnimplementedOp(Op); return; @@ -5087,7 +5195,7 @@ void OpDispatchBuilder::RDTSCPOp(OpcodeArgs) { } void OpDispatchBuilder::RDPIDOp(OpcodeArgs) { - if (CTX->HostFeatures.HostType != FEXCore::HostFeatures::HostTypeEnum::Linux && !CTX->HostFeatures.SupportsCPUIndexInTPIDRRO) { + if (CTX->HostFeatures.ProcessFeatures.HostType != FEXCore::HostFeatures::HostTypeEnum::Linux && !CTX->HostFeatures.SupportsCPUIndexInTPIDRRO) { // RDTSCP is unsupported on Win32 platforms if TPIDRRO isn't supported. UnimplementedOp(Op); return; @@ -5143,14 +5251,13 @@ void OpDispatchBuilder::RDRANDOp(OpcodeArgs, bool Reseed) { } } -void OpDispatchBuilder::BreakOp(OpcodeArgs, FEXCore::IR::BreakDefinition BreakDefinition) { +void OpDispatchBuilder::BreakOp(OpcodeArgs, FEXCore::IR::BreakDefinition BreakDefinition, Ref RelocatedPC) { const auto GPRSize = GetGPROpSize(); // We don't actually support this instruction // Multiblock may hit it though _StoreContextGPR(GPRSize, GetRelocatedPC(Op, -Op->InstSize), offsetof(FEXCore::Core::CPUState, rip)); - Break(BreakDefinition); - + Break(BreakDefinition, RelocatedPC); if (Multiblock) { auto NextBlock = CreateNewCodeBlockAfter(GetCurrentBlock()); @@ -5161,6 +5268,25 @@ void OpDispatchBuilder::BreakOp(OpcodeArgs, FEXCore::IR::BreakDefinition BreakDe } } +void OpDispatchBuilder::BreakpointOp(OpcodeArgs, uint32_t BP) { + const auto GPRSize = GetGPROpSize(); + auto NewRIP = GetRelocatedPC(Op, -Op->InstSize); + _StoreContextGPR(GPRSize, NewRIP, offsetof(FEXCore::Core::CPUState, rip)); + + uint32_t DR6Value {1U << BP}; + _StoreContextGPR(GPRSize, _Constant(DR6Value), offsetof(FEXCore::Core::CPUState, Dr6)); + + IR::BreakDefinition Reason; + Reason.ErrorRegister = 0; + Reason.Signal = Core::FAULT_SIGTRAP; + Reason.TrapNumber = X86State::X86_TRAPNO_DB; + Reason.si_code = 0x80; + + Break(Reason); + + BlockSetRIP = true; +} + void OpDispatchBuilder::UnimplementedOp(OpcodeArgs) { BreakOp(Op, FEXCore::IR::BreakDefinition { .ErrorRegister = 0, @@ -5188,13 +5314,21 @@ void OpDispatchBuilder::InvalidOp(OpcodeArgs) { }); } -void OpDispatchBuilder::NoExecOp(OpcodeArgs) { - BreakOp(Op, FEXCore::IR::BreakDefinition { - .ErrorRegister = X86State::X86_PF_PROT | X86State::X86_PF_USER | X86State::X86_PF_INSTR, - .Signal = Core::FAULT_SIGSEGV, - .TrapNumber = X86State::X86_TRAPNO_PF, - .si_code = 2, // SEGV_ACCERR - }); +void OpDispatchBuilder::NoExecOrPartialOp(OpcodeArgs) { + // Partial decoded or fully no-exec instruction. + // Get the RIP inside the instruction where it failed to decode. + // - Full no-exec will be the first byte. + // - Partial will be the first byte that failed to decode. + auto RelocatedPC = GetRelocatedPC(Op, 0); + + BreakOp(Op, + FEXCore::IR::BreakDefinition { + .ErrorRegister = X86State::X86_PF_PROT | X86State::X86_PF_USER | X86State::X86_PF_INSTR, + .Signal = Core::FAULT_SIGSEGV, + .TrapNumber = X86State::X86_TRAPNO_PF, + .si_code = 2, // SEGV_ACCERR + }, + RelocatedPC); } #undef OpcodeArgs diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h index 0190282210..4477c7266c 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h @@ -207,9 +207,12 @@ class OpDispatchBuilder final : public IREmitter { FlushRegisterCache(); return _ExitFunction(GetOpSize(NewRIP), NewRIP, Hint, CallReturnAddress, CallReturnBlock, PatchSiteAddress, PatchSiteSize); } - IRPair Break(BreakDefinition Reason) { + IRPair Break(BreakDefinition Reason, Ref RelocatedPC = nullptr) { FlushRegisterCache(); - return _Break(Reason); + if (!RelocatedPC) { + RelocatedPC = Constant(0); + } + return _Break(Reason, RelocatedPC); } IRPair Thunk(Ref ArgPtr, SHA256Sum ThunkNameHash) { FlushRegisterCache(); @@ -217,6 +220,8 @@ class OpDispatchBuilder final : public IREmitter { } bool FinishOp(uint64_t NextRIP, bool LastOp) { + ++RegCache.Index; + // If we are switching to a new block and this current block has yet to set a RIP // Then we need to insert an unconditional jump from the current block to the one we are going to // This happens most frequently when an instruction jumps backwards to another location @@ -488,6 +493,7 @@ class OpDispatchBuilder final : public IREmitter { void SGDTOp(OpcodeArgs); void SIDTOp(OpcodeArgs); void SMSWOp(OpcodeArgs); + void SLDTOp(OpcodeArgs); enum class VectorOpType { MMX, @@ -755,6 +761,7 @@ class OpDispatchBuilder final : public IREmitter { void X87LDENV(OpcodeArgs); void X87ModifySTP(OpcodeArgs, bool Inc); void X87OpHelper(OpcodeArgs, FEXCore::IR::IROps IROp, bool ZeroC2); + void X87NOP(OpcodeArgs); enum class FCOMIFlags { FLAGS_X87, @@ -828,6 +835,7 @@ class OpDispatchBuilder final : public IREmitter { void LoadFenceOrXRSTOR(OpcodeArgs); void MemFenceOrXSAVEOPT(OpcodeArgs); void StoreFenceOrCLFlush(OpcodeArgs); + void SerializeOp(OpcodeArgs); void UMonitorOrCLRSSBSY(OpcodeArgs); void UMWaitOp(OpcodeArgs); void CLZeroOp(OpcodeArgs); @@ -894,7 +902,8 @@ class OpDispatchBuilder final : public IREmitter { void Extrq(OpcodeArgs); void Insertq(OpcodeArgs); - void BreakOp(OpcodeArgs, FEXCore::IR::BreakDefinition BreakDefinition); + void BreakOp(OpcodeArgs, FEXCore::IR::BreakDefinition BreakDefinition, Ref RelocatedPC = nullptr); + void BreakpointOp(OpcodeArgs, uint32_t BP); void UnimplementedOp(OpcodeArgs); void PermissionRestrictedOp(OpcodeArgs); @@ -1084,13 +1093,19 @@ class OpDispatchBuilder final : public IREmitter { void AVX128_VFMAScalarImpl(OpcodeArgs, IROps IROp, uint8_t Src1Idx, uint8_t Src2Idx, uint8_t AddendIdx); void AVX128_VFMAddSubImpl(OpcodeArgs, bool AddSub, uint8_t Src1Idx, uint8_t Src2Idx, uint8_t AddendIdx); - RefPair AVX128_VPGatherQPSImpl(OpcodeArgs, Ref Dest, Ref Mask, RefVSIB VSIB); - RefPair AVX128_VPGatherImpl(OpcodeArgs, OpSize Size, OpSize ElementLoadSize, OpSize AddrElementSize, RefPair Dest, RefPair Mask, RefVSIB VSIB); + RefPair AVX128_VPGatherQPSImpl(OpcodeArgs, Ref Dest, Ref Mask, RefVSIB VSIB, bool MaskAllOnes); + RefPair AVX128_VPGatherImpl(OpcodeArgs, OpSize Size, OpSize ElementLoadSize, OpSize AddrElementSize, RefPair Dest, RefPair Mask, + RefVSIB VSIB, bool MaskAllOnesLow = false, bool MaskAllOnesHigh = false); void AVX128_VPGATHER(OpcodeArgs, OpSize AddrElementSize); void AVX128_VCVTPH2PS(OpcodeArgs); void AVX128_VCVTPS2PH(OpcodeArgs); + void AVX128_VBCSTNEBF162PS(OpcodeArgs); + void AVX128_VBCSTNESH2PS(OpcodeArgs); + void AVX128_VCVTNEEBF162PS(OpcodeArgs, bool Even); + void AVX128_VCVTNEEPH2PS(OpcodeArgs, bool Even); + void AVX128_VCVTNEPS2BF16(OpcodeArgs); // End of AVX 128-bit implementation @@ -1125,10 +1140,16 @@ class OpDispatchBuilder final : public IREmitter { void AVXVectorUnaryOp(OpcodeArgs, IROps IROp, IR::OpSize ElementSize); void AVXVectorVariableBlend(OpcodeArgs, IR::OpSize ElementSize); + void AVXVBCSTNEBF162PS(OpcodeArgs); + void AVXVBCSTNESH2PS(OpcodeArgs); + void AVXVCVTNEEBF162PS(OpcodeArgs, bool Even); + void AVXVCVTNEEPH2PS(OpcodeArgs, bool Even); + void AVXVCVTNEPS2BF16(OpcodeArgs); + // End of AVX 256-bit implementation void InvalidOp(OpcodeArgs); - void NoExecOp(OpcodeArgs); + void NoExecOrPartialOp(OpcodeArgs); void SetPackedRFLAG(bool Lower8, Ref Src); Ref GetPackedRFLAG(uint32_t FlagsMask = ~0U); @@ -1178,6 +1199,21 @@ class OpDispatchBuilder final : public IREmitter { // At block boundaries, fix up the carry flag. if (!SRAOnly) { RectifyCarryInvert(CFInvertedABI); + + // Also we can't trust the LastDef or PrevDef arrays accross block boundaries, so clear them as well. + for (auto& Def : RegCache.LastDef) { + Def = nullptr; + } + for (auto& Def : RegCache.PrevDef) { + Def = nullptr; + } + for (auto& DefIndex : RegCache.LastDefIndex) { + DefIndex = 0; + } + for (auto& DefIndex : RegCache.PrevDefIndex) { + DefIndex = 0; + } + RegCache.Index = 0; } if (!MMXOnly) { @@ -1294,7 +1330,7 @@ class OpDispatchBuilder final : public IREmitter { /* On ASIMD platforms, the emulation happens to preserve NZCV, unlike the * more optimal SVE implementation that clobbers. */ - if (!CTX->HostFeatures.SupportsSVE128 && !CTX->HostFeatures.SupportsSVE256) { + if (!CTX->HostFeatures.SupportsSVE()) { return; } @@ -1315,6 +1351,7 @@ class OpDispatchBuilder final : public IREmitter { private: FEX_CONFIG_OPT(ReducedPrecisionMode, X87REDUCEDPRECISION); + FEX_CONFIG_OPT(UndefinedFlagAcidTest, UNDEFINEDFLAGACIDTEST); struct JumpTargetInfo { Ref BlockEntry; @@ -1497,7 +1534,7 @@ class OpDispatchBuilder final : public IREmitter { void SaveAVXState(Ref MemBase); void XRstorOpImpl(OpcodeArgs); - void RestoreX87State(Ref MemBase); + void RestoreX87State(OpcodeArgs, Ref MemBase); void RestoreSSEState(Ref MemBase); void RestoreMXCSRState(Ref MXCSR); void RestoreAVXState(Ref MemBase); @@ -1640,7 +1677,7 @@ class OpDispatchBuilder final : public IREmitter { } constexpr OpSize GetGuestVectorLength() const { - return (CTX->HostFeatures.SupportsSVE256 && CTX->HostFeatures.SupportsAVX) ? OpSize::i256Bit : OpSize::i128Bit; + return (CTX->HostFeatures.SupportsSVE256() && CTX->HostFeatures.SupportsAVX()) ? OpSize::i256Bit : OpSize::i128Bit; } [[nodiscard]] @@ -1898,6 +1935,55 @@ class OpDispatchBuilder final : public IREmitter { InvalidateReg(Core::CPUState::AF_AS_GREG); } + // Sets the desired flags to zero when acid test is enabled. + // Not meant to be fast, just meant to produce consistent results. + void AcidTestFlags(unsigned BitOffset = 0, unsigned BitOffset2 = 0, unsigned BitOffset3 = 0, unsigned BitOffset4 = 0, + unsigned BitOffset5 = 0, unsigned BitOffset6 = 0) { + if (!UndefinedFlagAcidTest) [[likely]] { + return; + } + + unsigned BitFlags {}; + if (BitOffset) { + BitFlags |= 1U << BitOffset; + } + if (BitOffset2) { + BitFlags |= 1U << BitOffset2; + } + if (BitOffset3) { + BitFlags |= 1U << BitOffset3; + } + if (BitOffset4) { + BitFlags |= 1U << BitOffset4; + } + if (BitOffset5) { + BitFlags |= 1U << BitOffset5; + } + if (BitOffset6) { + BitFlags |= 1U << BitOffset6; + } + + auto Flag = Constant(0); + if (BitFlags & (1U << X86State::RFLAG_SF_RAW_LOC)) { + SetRFLAG(Flag, FEXCore::X86State::RFLAG_SF_RAW_LOC); + } + if (BitFlags & (1U << X86State::RFLAG_ZF_RAW_LOC)) { + SetRFLAG(Flag, FEXCore::X86State::RFLAG_ZF_RAW_LOC); + } + if (BitFlags & (1U << X86State::RFLAG_CF_RAW_LOC)) { + SetRFLAG(Flag, FEXCore::X86State::RFLAG_CF_RAW_LOC); + } + if (BitFlags & (1U << X86State::RFLAG_OF_RAW_LOC)) { + SetRFLAG(Flag, FEXCore::X86State::RFLAG_OF_RAW_LOC); + } + if (BitFlags & (1U << X86State::RFLAG_AF_RAW_LOC)) { + SetRFLAG(Flag, FEXCore::X86State::RFLAG_AF_RAW_LOC); + } + if (BitFlags & (1U << X86State::RFLAG_AF_RAW_LOC)) { + SetRFLAG(Flag, FEXCore::X86State::RFLAG_AF_RAW_LOC); + } + } + [[nodiscard]] static CondClass CondForNZCVBit(unsigned BitOffset, bool Invert) { switch (BitOffset) { @@ -1963,12 +2049,25 @@ class OpDispatchBuilder final : public IREmitter { uint64_t Partial; Ref Value[64]; + + // Keep track of where each register was last written to within the current block, + // for use in peephole optimizations. LastDefIndex is a parallel structure, + // which tracks the index of each Op in LastDef. + Ref LastDef[64]; + uint32_t LastDefIndex[64]; + // Similar to LastDef, but tracks the write before LastDef. Think of it as LastDef^2. + Ref PrevDef[64]; + uint32_t PrevDefIndex[64]; + + // The index of the current instruction in the current block. + uint32_t Index; } RegCache {}; void InvalidateReg(uint8_t Index) { uint64_t Bit = (1ull << (uint64_t)Index); RegCache.Cached &= ~Bit; RegCache.Written &= ~Bit; + RegCache.LastDef[Index] = nullptr; } Ref LoadRegCache(uint64_t Offset, uint8_t Index, RegClass Class, IR::OpSize Size) { @@ -2084,6 +2183,10 @@ class OpDispatchBuilder final : public IREmitter { RegCache.Value[Index] = Value; RegCache.Cached |= Bit; RegCache.Written |= Bit; + RegCache.PrevDef[Index] = RegCache.LastDef[Index]; + RegCache.PrevDefIndex[Index] = RegCache.LastDefIndex[Index]; + RegCache.LastDef[Index] = Value; + RegCache.LastDefIndex[Index] = RegCache.Index; } void InvalidateHighAVXRegisters() { @@ -2195,8 +2298,7 @@ class OpDispatchBuilder final : public IREmitter { Ref V_inv = GetRFLAG(FEXCore::X86State::RFLAG_OF_RAW_LOC, true); SetRFLAG(V_inv); - // Intel: OF, SF, and AF set to zero - // AMD: no mention of OF, SF and AF but actual hardware seems to always zero + // Both Intel and AMD manual state that OF, SF, and AF are set to zero. // // Zero AF. Note that the comparison sets the raw PF to 0/1 above, so // PF[4] is 0 so the XOR with PF will have no effect, so setting the AF @@ -2427,6 +2529,12 @@ class OpDispatchBuilder final : public IREmitter { void SetX87FTW(Ref FTW); Ref GetX87FTW_Helper(); void SetX87Top(Ref Value); + void StoreX87FIP(FEXCore::X86Tables::DecodedOp Op) { + if (CTX->Config.JITFeatures & FEXCore::Config::JITFeatures::ENABLEX87FIP) { + // Only store FIP if the feature is enabled. + _StoreContextGPR(OpSize::i64Bit, GetRelocatedPC(Op, -Op->InstSize), offsetof(FEXCore::Core::CPUState, FIP)); + } + } void ChgStateX87_MMX() override { LOGMAN_THROW_A_FMT(MMXState == MMXState_X87, "Expected state to be x87"); diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/AVX_128.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/AVX_128.cpp index 59466b9768..f978115009 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/AVX_128.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/AVX_128.cpp @@ -2052,7 +2052,8 @@ void OpDispatchBuilder::AVX128_VFMAddSubImpl(OpcodeArgs, bool AddSub, uint8_t Sr } OpDispatchBuilder::RefPair OpDispatchBuilder::AVX128_VPGatherImpl(OpcodeArgs, OpSize Size, OpSize ElementLoadSize, OpSize AddrElementSize, - RefPair Dest, RefPair Mask, RefVSIB VSIB) { + RefPair Dest, RefPair Mask, RefVSIB VSIB, bool MaskAllOnesLow, + bool MaskAllOnesHigh) { LOGMAN_THROW_A_FMT(AddrElementSize == OpSize::i32Bit || AddrElementSize == OpSize::i64Bit, "Unknown address element size"); const auto Is128Bit = Size == OpSize::i128Bit; @@ -2066,7 +2067,7 @@ OpDispatchBuilder::RefPair OpDispatchBuilder::AVX128_VPGatherImpl(OpcodeArgs, Op BaseAddr = Invalid(); } - if (CTX->HostFeatures.SupportsSVE128) { + if (CTX->HostFeatures.SupportsSVE128()) { if (ElementLoadSize == OpSize::i64Bit && AddrElementSize == OpSize::i32Bit) { // In the case that FEX is loading double the amount of data than the number of address bits then we can optimize this case. // For 256-bits of data we need to sign extend all four 32-bit address elements to be 64-bit. @@ -2102,7 +2103,7 @@ OpDispatchBuilder::RefPair OpDispatchBuilder::AVX128_VPGatherImpl(OpcodeArgs, Op RefPair Result {}; ///< Calculate the low-half. Result.Low = _VLoadVectorGatherMasked(OpSize::i128Bit, ElementLoadSize, Dest.Low, Mask.Low, BaseAddr, VSIB.Low, VSIB.High, - AddrElementSize, VSIB.Scale, 0, 0, AddrSize); + AddrElementSize, VSIB.Scale, 0, 0, AddrSize, MaskAllOnesLow); if (Is128Bit) { Result.High = LoadZeroVector(OpSize::i128Bit); @@ -2117,6 +2118,7 @@ OpDispatchBuilder::RefPair OpDispatchBuilder::AVX128_VPGatherImpl(OpcodeArgs, Op Ref DestReg = Dest.High; Ref MaskReg = Mask.High; + bool MaskAllOnes = MaskAllOnesHigh; uint8_t IndexElementOffset {}; uint8_t DataElementOffset {}; if (AddrElementSize == ElementLoadSize) { @@ -2133,13 +2135,15 @@ OpDispatchBuilder::RefPair OpDispatchBuilder::AVX128_VPGatherImpl(OpcodeArgs, Op AddrAddressing.High = Invalid(); DestReg = Result.Low; ///< Start mixing with the low register. MaskReg = Mask.Low; ///< Mask starts with the low mask here. + MaskAllOnes = MaskAllOnesLow; IndexElementOffset = 0; DataElementOffset = IR::NumElements(OpSize::i128Bit, ElementLoadSize) / 2; } ///< Calculate the high-half. - auto ResultHigh = _VLoadVectorGatherMasked(OpSize::i128Bit, ElementLoadSize, DestReg, MaskReg, BaseAddr, AddrAddressing.Low, - AddrAddressing.High, AddrElementSize, VSIB.Scale, DataElementOffset, IndexElementOffset, AddrSize); + auto ResultHigh = + _VLoadVectorGatherMasked(OpSize::i128Bit, ElementLoadSize, DestReg, MaskReg, BaseAddr, AddrAddressing.Low, AddrAddressing.High, + AddrElementSize, VSIB.Scale, DataElementOffset, IndexElementOffset, AddrSize, MaskAllOnes); if (AddrElementSize == OpSize::i64Bit && ElementLoadSize == OpSize::i32Bit) { // If we only fetched 128-bits worth of data then the upper-result is all zero. @@ -2152,7 +2156,7 @@ OpDispatchBuilder::RefPair OpDispatchBuilder::AVX128_VPGatherImpl(OpcodeArgs, Op return Result; } -OpDispatchBuilder::RefPair OpDispatchBuilder::AVX128_VPGatherQPSImpl(OpcodeArgs, Ref Dest, Ref Mask, RefVSIB VSIB) { +OpDispatchBuilder::RefPair OpDispatchBuilder::AVX128_VPGatherQPSImpl(OpcodeArgs, Ref Dest, Ref Mask, RefVSIB VSIB, bool MaskAllOnes) { ///< BaseAddr doesn't need to exist, calculate that here. Ref BaseAddr = VSIB.BaseAddr; @@ -2166,7 +2170,7 @@ OpDispatchBuilder::RefPair OpDispatchBuilder::AVX128_VPGatherQPSImpl(OpcodeArgs, bool NeedsSVEScale = (VSIB.Scale == 2 || VSIB.Scale == 8) || (BaseAddr == Invalid() && VSIB.Scale != 1); - if (CTX->HostFeatures.SupportsSVE128 && NeedsSVEScale) { + if (CTX->HostFeatures.SupportsSVE128() && NeedsSVEScale) { // SVE gather instructions don't support scaling their vector elements by anything other than 1 or the address element size. // Pre-scale 64-bit addresses in the case that scale doesn't match in-order to hit SVE code paths more frequently. // Only hit this path if the host supports SVE. Otherwise it's a degradation for the ASIMD codepath. @@ -2184,7 +2188,8 @@ OpDispatchBuilder::RefPair OpDispatchBuilder::AVX128_VPGatherQPSImpl(OpcodeArgs, auto AddrSize = (Op->Flags & X86Tables::DecodeFlags::FLAG_ADDRESS_SIZE) != 0 ? (GPRSize >> 1) : GPRSize; ///< Calculate the low-half. - Result.Low = _VLoadVectorGatherMaskedQPS(OpSize::i128Bit, OpSize::i32Bit, Dest, Mask, BaseAddr, VSIB.Low, VSIB.High, VSIB.Scale, AddrSize); + Result.Low = + _VLoadVectorGatherMaskedQPS(OpSize::i128Bit, OpSize::i32Bit, Dest, Mask, BaseAddr, VSIB.Low, VSIB.High, VSIB.Scale, AddrSize, MaskAllOnes); Result.High = LoadZeroVector(OpSize::i128Bit); if (VSIB.High == Invalid()) { // Special case for only loading two floats. @@ -2213,10 +2218,25 @@ void OpDispatchBuilder::AVX128_VPGATHER(OpcodeArgs, OpSize AddrElementSize) { auto VSIB = AVX128_LoadVSIB(Op, Op->Src[0], Op->Flags, NeedsHighAddrBytes); auto Mask = AVX128_LoadSource_WithOpSize(Op, Op->Src[1], Op->Flags, !Is128Bit); + // Check if the mask was computed from a self comparison, which indicates an all-ones mask. + // This is a compiler idiom for an unmasked gather. In this case, we can apply a peephole and skip + // all mask checks in the codegen, reducing codesize substantially. + bool MaskAllOnesLow = false; + bool MaskAllOnesHigh = false; + if (Op->Src[1].IsGPR()) { + const auto MaskXMM = Op->Src[1].Data.GPR.GPR - X86State::REG_XMM_0; + + const Ref LowDef = RegCache.LastDef[FPR0Index + MaskXMM]; + const Ref HighDef = RegCache.LastDef[AVXHigh0Index + MaskXMM]; + + MaskAllOnesLow = LowDef && IsValueVectorAllOnes(WrapNode(LowDef)); + MaskAllOnesHigh = !Is128Bit && HighDef && IsValueVectorAllOnes(WrapNode(HighDef)); + } + bool NeedsSVEScale = (VSIB.Scale == 2 || VSIB.Scale == 8) || (VSIB.BaseAddr == Invalid() && VSIB.Scale != 1); const bool NeedsExplicitSVEPath = - CTX->HostFeatures.SupportsSVE128 && AddrElementSize == OpSize::i32Bit && ElementLoadSize == OpSize::i32Bit && NeedsSVEScale; + CTX->HostFeatures.SupportsSVE128() && AddrElementSize == OpSize::i32Bit && ElementLoadSize == OpSize::i32Bit && NeedsSVEScale; RefPair Result {}; if (NeedsExplicitSVEPath) { @@ -2243,15 +2263,15 @@ void OpDispatchBuilder::AVX128_VPGATHER(OpcodeArgs, OpSize AddrElementSize) { } ///< AddressElementSize is now OpSize::i64Bit - Result = AVX128_VPGatherQPSImpl(Op, Dest.Low, Mask.Low, VSIBLow); + Result = AVX128_VPGatherQPSImpl(Op, Dest.Low, Mask.Low, VSIBLow, MaskAllOnesLow); if (NeedsHighAddrBytes) { - auto Res = AVX128_VPGatherQPSImpl(Op, Dest.High, Mask.High, VSIBHigh); + auto Res = AVX128_VPGatherQPSImpl(Op, Dest.High, Mask.High, VSIBHigh, MaskAllOnesHigh); Result.High = Res.Low; } } else if (AddrElementSize == OpSize::i64Bit && ElementLoadSize == OpSize::i32Bit) { - Result = AVX128_VPGatherQPSImpl(Op, Dest.Low, Mask.Low, VSIB); + Result = AVX128_VPGatherQPSImpl(Op, Dest.Low, Mask.Low, VSIB, MaskAllOnesLow); } else { - Result = AVX128_VPGatherImpl(Op, Size, ElementLoadSize, AddrElementSize, Dest, Mask, VSIB); + Result = AVX128_VPGatherImpl(Op, Size, ElementLoadSize, AddrElementSize, Dest, Mask, VSIB, MaskAllOnesLow, MaskAllOnesHigh); } AVX128_StoreResult_WithOpSize(Op, Op->Dest, Result); @@ -2335,4 +2355,124 @@ void OpDispatchBuilder::AVX128_VCVTPS2PH(OpcodeArgs) { } } +void OpDispatchBuilder::AVX128_VBCSTNEBF162PS(OpcodeArgs) { + const auto DstSize = GetDstSize(Op); + const auto Is128Bit = DstSize == Core::CPUState::XMM_SSE_REG_SIZE; + + auto Src1 = LoadSourceFPR_WithOpSize(Op, Op->Src[0], OpSize::i16Bit, Op->Flags); + + // bfloat16 is converted to fp32 and broadcast through the vector. + // bfloat16->float32 is left-shift by 16. + Src1 = _VShlI(OpSize::i128Bit, OpSize::i32Bit, Src1, 16); + Src1 = _VDupElement(OpSize::i128Bit, OpSize::i32Bit, Src1, 0); + + RefPair Result {}; + Result.Low = Src1; + + if (Is128Bit) { + Result.High = LoadZeroVector(OpSize::i128Bit); + } else { + Result.High = Result.Low; + } + AVX128_StoreResult_WithOpSize(Op, Op->Dest, Result); +} + +void OpDispatchBuilder::AVX128_VBCSTNESH2PS(OpcodeArgs) { + const auto DstSize = GetDstSize(Op); + const auto Is128Bit = DstSize == Core::CPUState::XMM_SSE_REG_SIZE; + + auto Src1 = LoadSourceFPR_WithOpSize(Op, Op->Src[0], OpSize::i16Bit, Op->Flags); + + // float16 is converted to fp32 and broadcast through the vector. + Src1 = _Float_FToF(OpSize::i32Bit, OpSize::i16Bit, Src1); + Src1 = _VDupElement(OpSize::i128Bit, OpSize::i32Bit, Src1, 0); + + RefPair Result {}; + Result.Low = Src1; + + if (Is128Bit) { + Result.High = LoadZeroVector(OpSize::i128Bit); + } else { + Result.High = Result.Low; + } + AVX128_StoreResult_WithOpSize(Op, Op->Dest, Result); +} + +void OpDispatchBuilder::AVX128_VCVTNEEBF162PS(OpcodeArgs, bool Even) { + const auto DstSize = GetDstSize(Op); + const auto Is128Bit = DstSize == Core::CPUState::XMM_SSE_REG_SIZE; + + auto Src = AVX128_LoadSource_WithOpSize(Op, Op->Src[0], Op->Flags, !Is128Bit); + + RefPair Result {}; + + auto Convert = [&](auto Src, bool Even) -> Ref { + // Even or odd elements of each 128-bit register is converted from bfloat16 to float32. + // For even, just left shift the elements. + if (Even) { + return _VShlI(OpSize::i128Bit, OpSize::i32Bit, Src, 16); + } + + // For Odds, we just need to mask off the lower 16-bits of each 32-bit element. + // Easiest way to do this is with a right then left shift. + auto Tmp = _VUShrI(OpSize::i128Bit, OpSize::i32Bit, Src, 16); + return _VShlI(OpSize::i128Bit, OpSize::i32Bit, Tmp, 16); + }; + + Result.Low = Convert(Src.Low, Even); + + if (Is128Bit) { + Result.High = LoadZeroVector(OpSize::i128Bit); + } else { + Result.High = Convert(Src.High, Even); + } + AVX128_StoreResult_WithOpSize(Op, Op->Dest, Result); +} + +void OpDispatchBuilder::AVX128_VCVTNEEPH2PS(OpcodeArgs, bool Even) { + const auto DstSize = GetDstSize(Op); + const auto Is128Bit = DstSize == Core::CPUState::XMM_SSE_REG_SIZE; + + auto Src = AVX128_LoadSource_WithOpSize(Op, Op->Src[0], Op->Flags, !Is128Bit); + + RefPair Result {}; + + auto Convert = [&](auto Src, bool Even) -> Ref { + // Transpose even or odd elements and then fcvtl. + if (Even) { + Src = _VUnZip(OpSize::i128Bit, OpSize::i16Bit, Src, Src); + } else { + Src = _VUnZip2(OpSize::i128Bit, OpSize::i16Bit, Src, Src); + } + return _Vector_FToF(OpSize::i128Bit, OpSize::i32Bit, Src, OpSize::i16Bit); + }; + + Result.Low = Convert(Src.Low, Even); + + if (Is128Bit) { + Result.High = LoadZeroVector(OpSize::i128Bit); + } else { + Result.High = Convert(Src.High, Even); + } + AVX128_StoreResult_WithOpSize(Op, Op->Dest, Result); +} + +void OpDispatchBuilder::AVX128_VCVTNEPS2BF16(OpcodeArgs) { + const auto SrcSize = OpSizeFromSrc(Op); + const auto Is128BitSrc = SrcSize == OpSize::i128Bit; + auto Src = AVX128_LoadSource_WithOpSize(Op, Op->Src[0], Op->Flags, !Is128BitSrc); + + // Convert 4 or 8 32-bits floats in to bfloat16. + // This instruction only operates with rounding mode set to `Rounds to Nearest (even)`. + + RefPair Result {}; + Result.Low = _VBFCVTN(OpSize::i128Bit, Src.Low); + if (!Is128BitSrc) { + Result.Low = _VBFCVTN2(OpSize::i128Bit, Result.Low, Src.High); + } + + Result.High = LoadZeroVector(OpSize::i128Bit); + AVX128_StoreResult_WithOpSize(Op, Op->Dest, Result); +} + } // namespace FEXCore::IR diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Crypto.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Crypto.cpp index a7bc09cdd9..43477fe4cf 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Crypto.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Crypto.cpp @@ -27,7 +27,7 @@ void OpDispatchBuilder::SHA1NEXTEOp(OpcodeArgs) { Ref Src = LoadSourceFPR(Op, Op->Src[0], Op->Flags); Ref Result {}; - if (CTX->HostFeatures.SupportsSVE128) { + if (CTX->HostFeatures.SupportsSVE128()) { auto ZeroVec = LoadZeroVector(OpSize::i128Bit); auto Tmp = _VInsElement(OpSize::i128Bit, OpSize::i32Bit, 3, 3, ZeroVec, Dest); auto Xar = _VXar(OpSize::i128Bit, OpSize::i32Bit, ZeroVec, Tmp, 2); @@ -158,11 +158,6 @@ void OpDispatchBuilder::SHA256RNDS2Op(OpcodeArgs) { UnimplementedOp(Op); return; } - Ref Dest = LoadSourceFPR(Op, Op->Dest, Op->Flags); - Ref Src = LoadSourceFPR(Op, Op->Src[0], Op->Flags); - // Hardcoded to XMM0 - auto XMM0 = LoadXMMRegister(0); - auto shuffle_abcd = [this](Ref Src1, Ref Src2) -> Ref { // Generates a suitable SHA256 `abcd` configuration from x86 format. auto Tmp = _VZip2(OpSize::i128Bit, OpSize::i64Bit, Src2, Src1); @@ -175,14 +170,99 @@ void OpDispatchBuilder::SHA256RNDS2Op(OpcodeArgs) { return _VRev64(OpSize::i128Bit, OpSize::i32Bit, Tmp); }; + // Peephole: Attempt to identify this pattern: + // sha256rnds2 xmm1, xmm2 + // pshufd xmm0, xmm0, 0xe (or psrldq xmm0, 8) + // sha256rnds2 xmm2, xmm1 + // This is an idiom used by various crypto libraries (OpenSSL etc). + // Since the ARM64 SHA256 instructions compute all four rounds, + // we can elide the second SHA256RNDS2 and the key shuffle. + // Since this matching is done on IR nodes, this is somewhat fragile, + // since changes to the translation of the constitiuent instructions + // would break the pattern. + // + // NB: xmm1 and xmm2 are used here as examples, but note that + // xmm0 is hardcoded as the key register in SHA256RNDS2. + + if (Op->Dest.IsGPR() && Op->Src[0].IsGPR()) { + // xmm1 in our example above. + const auto X = Op->Src[0].Data.GPR.GPR - X86State::REG_XMM_0; + // xmm2 in our example above. + const auto Y = Op->Dest.Data.GPR.GPR - X86State::REG_XMM_0; + + const int KeyIndex = FPR0Index; + const int XIndex = FPR0Index + X; + const int YIndex = FPR0Index + Y; + + // It is helpful to remember that the current Op + // is the "second" SHA256RNDS2 in the example, so we are looking + // backwards to find the rest of the pattern. + const Ref XLastWritten = RegCache.LastDef[XIndex]; + const auto XLastWrittenIndex = RegCache.LastDefIndex[XIndex]; + const Ref KeyLastWritten = RegCache.LastDef[KeyIndex]; + // xmm0 and X must have been written to in in this block. + if (!XLastWritten || !KeyLastWritten) { + goto no_peephole; + } + + // True if no instruction wrote Y after the first SHA256RNDS2. + const bool YUnchanged = !RegCache.LastDef[YIndex] || RegCache.LastDefIndex[YIndex] < XLastWrittenIndex; + // True if the key shift is after the first SHA256RNDS2, and no instruction wrote XMM0 afterwards. + const bool KeyUnchanged = RegCache.LastDefIndex[KeyIndex] > XLastWrittenIndex && + (!RegCache.PrevDef[KeyIndex] || RegCache.PrevDefIndex[KeyIndex] < XLastWrittenIndex); + if (!YUnchanged || !KeyUnchanged) { + goto no_peephole; + } + + // Now make sure that the op that wrote the key is what we expect. + // This should match the translation of a `pshufd xmm0, xmm0, 0xe` or `psrldq xmm0, 8` instruction. + const auto KeyShift = GetOpHeader(WrapNode(KeyLastWritten)); + const bool IsVExtr = KeyShift->Op == OP_VEXTR && KeyShift->Size == OpSize::i128Bit; + if (!IsVExtr) { + goto no_peephole; + } + + // Compute shift in bytes, since pshufd and psrldq use different element sizes. + const auto ShiftInBytes = KeyShift->C()->Index * IR::OpSizeToSize(KeyShift->ElementSize); + const bool IsKeyShift = ShiftInBytes == 8 && IsValueLoadRegister(KeyShift->C()->VectorUpper, RegClass::FPR, 0); + if (!IsKeyShift) { + goto no_peephole; + } + + // Now check that the rest of the OPs match the pattern. + const Ref FirstZip = GetArgIfOp(XLastWritten, OP_VREV64, 0); + // A and B are the SHA256H and SHA256H2 output of the first SHA256RNDS2 instruction + const Ref A = GetArgIfOp(FirstZip, OP_VZIP2, 1); + const Ref B = GetArgIfOp(FirstZip, OP_VZIP2, 0); + // Figure out based on A what the source of the first SHA256RNDS2 was. + const Ref FirstSrc = GetArgIfOp(GetArgIfOp(GetArgIfOp(A, OP_VSHA256H, 0), OP_VREV64, 0), OP_VZIP2, 0); + // True if X holds the result of the first SHA256RNDS2, and its source register was Y. + const bool IsFirstResult = FirstSrc && IsValueLoadRegister(WrapNode(FirstSrc), RegClass::FPR, Y); + if (!IsFirstResult) { + goto no_peephole; + } + + // The pattern matched, so we can elide the second SHA256RNDS2, + // and instead use the result of the first pair of SHA256H and SHA256H2 instructions + // to populate the final result. + StoreResult_WithAVXInsert(VectorOpType::SSE, RegClass::FPR, Op, shuffle_efgh(A, B)); + return; + } + +no_peephole: + Ref Dest = LoadSourceFPR(Op, Op->Dest, Op->Flags); + Ref Src = LoadSourceFPR(Op, Op->Src[0], Op->Flags); + // Hardcoded to XMM0 + auto XMM0 = LoadXMMRegister(0); + auto ABCD = shuffle_abcd(Dest, Src); auto EFGH = shuffle_efgh(Dest, Src); - // x86 uses only the bottom 64-bits of the key, so duplicate to match ARM64 semantics. - auto Key = _VDupElement(OpSize::i128Bit, OpSize::i64Bit, XMM0, 0); - - auto A = _VSha256H(ABCD, EFGH, Key); - auto B = _VSha256H2(EFGH, ABCD, Key); + // x86 uses only the lower 64 bits of the key for two rounds. + // ARM64 does four rounds, so in order to support the peephole optimization, + // we use the full key always. + auto A = _VSha256H(ABCD, EFGH, XMM0); + auto B = _VSha256H2(EFGH, ABCD, XMM0); auto Result = shuffle_abcd(A, B); StoreResult_WithAVXInsert(VectorOpType::SSE, RegClass::FPR, Op, Result); diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryGroupTables.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryGroupTables.h index 2e8ad544ae..ac26b3af6f 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryGroupTables.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryGroupTables.h @@ -10,6 +10,11 @@ constexpr uint16_t PF_66 = 2; constexpr uint16_t PF_F2 = 3; constexpr DispatchTableEntry OpDispatch_SecondaryGroupTables[] = { // GROUP 6 + {OPD(FEXCore::X86Tables::TYPE_GROUP_6, PF_NONE, 0), 1, &OpDispatchBuilder::SLDTOp}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_6, PF_F3, 0), 1, &OpDispatchBuilder::SLDTOp}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_6, PF_66, 0), 1, &OpDispatchBuilder::SLDTOp}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_6, PF_F2, 0), 1, &OpDispatchBuilder::SLDTOp}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_6, PF_NONE, 3), 1, &OpDispatchBuilder::PermissionRestrictedOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_6, PF_F3, 3), 1, &OpDispatchBuilder::PermissionRestrictedOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_6, PF_66, 3), 1, &OpDispatchBuilder::PermissionRestrictedOp}, @@ -36,6 +41,8 @@ constexpr DispatchTableEntry OpDispatch_SecondaryGroupTables[] = { {OPD(FEXCore::X86Tables::TYPE_GROUP_7, PF_66, 4), 1, &OpDispatchBuilder::SMSWOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_7, PF_F2, 4), 1, &OpDispatchBuilder::SMSWOp}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_7, PF_NONE, 5), 1, &OpDispatchBuilder::SerializeOp}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_7, PF_NONE, 6), 1, &OpDispatchBuilder::PermissionRestrictedOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_7, PF_F3, 6), 1, &OpDispatchBuilder::PermissionRestrictedOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_7, PF_66, 6), 1, &OpDispatchBuilder::PermissionRestrictedOp}, diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryModRMTables.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryModRMTables.h index 7386847691..87146d746e 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryModRMTables.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryModRMTables.h @@ -10,12 +10,12 @@ constexpr DispatchTableEntry OpDispatch_SecondaryModRMTables[] = { // REG /2 {((1 << 3) | 0), 1, &OpDispatchBuilder::XGetBVOp}, + {((1 << 3) | 1), 1, &OpDispatchBuilder::PermissionRestrictedOp}, // REG /3 {((2 << 3) | 7), 1, &OpDispatchBuilder::PermissionRestrictedOp}, // REG /7 - {((3 << 3) | 0), 1, &OpDispatchBuilder::PermissionRestrictedOp}, {((3 << 3) | 1), 1, &OpDispatchBuilder::RDTSCPOp}, {((3 << 3) | 4), 1, &OpDispatchBuilder::CLZeroOp}, }; diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp index 37de3a0870..08b53ef5d9 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp @@ -3025,7 +3025,7 @@ void OpDispatchBuilder::XSaveOpImpl(OpcodeArgs) { StoreIfFlagSet(1, [this, Op] { SaveSSEState(XSaveBase(Op)); }); } // AVX - if (CTX->HostFeatures.SupportsAVX) { + if (CTX->HostFeatures.SupportsAVX()) { StoreIfFlagSet(2, [this, Op] { std::invoke(SaveAVXStateFunc, this, XSaveBase(Op)); }); } @@ -3072,6 +3072,12 @@ void OpDispatchBuilder::SaveX87State(OpcodeArgs, Ref MemBase) { { _StoreMemGPR(OpSize::i16Bit, ReconstructFSW_Helper(), MemBase, Constant(2), OpSize::i16Bit, MemOffsetType::SXTX, 1); } + { + auto FIPSize = Op->Flags & X86Tables::DecodeFlags::FLAG_REX_WIDENING ? OpSize::i64Bit : OpSize::i32Bit; + auto FIP = _LoadContextGPR(OpSize::i64Bit, offsetof(FEXCore::Core::CPUState, FIP)); + _StoreMemGPR(FIPSize, FIP, MemBase, Constant(8), FIPSize, MemOffsetType::SXTX, 1); + } + { // Abridged FTW auto FTW = _LoadContextGPR(OpSize::i8Bit, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); @@ -3173,7 +3179,7 @@ Ref OpDispatchBuilder::GetMXCSR() { void OpDispatchBuilder::FXRStoreOp(OpcodeArgs) { Ref Mem = MakeSegmentAddress(Op, Op->Src[0]); - RestoreX87State(Mem); + RestoreX87State(Op, Mem); RestoreSSEState(Mem); Ref MXCSR = _LoadMemGPR(OpSize::i32Bit, Mem, Constant(24), OpSize::i32Bit, MemOffsetType::SXTX, 1); @@ -3219,14 +3225,14 @@ void OpDispatchBuilder::XRstorOpImpl(OpcodeArgs) { // x87 { - RestoreIfFlagSetOrDefault(0, [this, Op] { RestoreX87State(XSaveBase(Op)); }, [this, Op] { DefaultX87State(Op); }); + RestoreIfFlagSetOrDefault(0, [this, Op] { RestoreX87State(Op, XSaveBase(Op)); }, [this, Op] { DefaultX87State(Op); }); } // SSE { RestoreIfFlagSetOrDefault(1, [this, Op] { RestoreSSEState(XSaveBase(Op)); }, [this] { DefaultSSEState(); }); } // AVX - if (CTX->HostFeatures.SupportsAVX) { + if (CTX->HostFeatures.SupportsAVX()) { RestoreIfFlagSetOrDefault( 2, [this, Op] { std::invoke(RestoreAVXStateFunc, this, XSaveBase(Op)); }, [this] { std::invoke(DefaultAVXStateFunc, this); }); } @@ -3244,7 +3250,7 @@ void OpDispatchBuilder::XRstorOpImpl(OpcodeArgs) { } } -void OpDispatchBuilder::RestoreX87State(Ref MemBase) { +void OpDispatchBuilder::RestoreX87State(OpcodeArgs, Ref MemBase) { _StackForceSlow(); auto NewFCW = _LoadMemGPR(OpSize::i16Bit, MemBase, OpSize::i16Bit); @@ -3256,6 +3262,12 @@ void OpDispatchBuilder::RestoreX87State(Ref MemBase) { Top = ReconstructX87StateFromFSW_Helper(NewFSW); } + { + auto FIPSize = Op->Flags & X86Tables::DecodeFlags::FLAG_REX_WIDENING ? OpSize::i64Bit : OpSize::i32Bit; + auto FIP = _LoadMemGPR(FIPSize, MemBase, Constant(8), FIPSize, MemOffsetType::SXTX, 1); + _StoreContextGPR(OpSize::i64Bit, FIP, offsetof(FEXCore::Core::CPUState, FIP)); + } + { // Abridged FTW auto NewFTW = _LoadMemGPR(OpSize::i8Bit, MemBase, Constant(4), OpSize::i8Bit, MemOffsetType::SXTX, 1); @@ -6056,4 +6068,86 @@ void OpDispatchBuilder::Insertq(OpcodeArgs) { StoreResult_WithAVXInsert(VectorOpType::SSE, RegClass::FPR, Op, Result); } +void OpDispatchBuilder::AVXVBCSTNEBF162PS(OpcodeArgs) { + const auto DstSize = OpSizeFromDst(Op); + + auto Src = LoadSourceFPR(Op, Op->Src[0], Op->Flags); + + // bfloat16 is converted to fp32 and broadcast through the vector. + // bfloat16->float32 is left-shift by 16. + Src = _VShlI(DstSize, OpSize::i32Bit, Src, 16); + Src = _VDupElement(DstSize, OpSize::i32Bit, Src, 0); + + StoreResultFPR(Op, Src); +} + +void OpDispatchBuilder::AVXVBCSTNESH2PS(OpcodeArgs) { + const auto DstSize = OpSizeFromDst(Op); + + auto Src = LoadSourceFPR(Op, Op->Src[0], Op->Flags); + + // float16 is converted to fp32 and broadcast through the vector. + Src = _Float_FToF(OpSize::i32Bit, OpSize::i16Bit, Src); + Src = _VDupElement(DstSize, OpSize::i32Bit, Src, 0); + + StoreResultFPR(Op, Src); +} + +void OpDispatchBuilder::AVXVCVTNEEPH2PS(OpcodeArgs, bool Even) { + const auto DstSize = OpSizeFromDst(Op); + + auto Src = LoadSourceFPR(Op, Op->Src[0], Op->Flags); + + // float16 is converted to fp32 and broadcast through the vector. + if (Even) { + Src = _VUnZip(DstSize, OpSize::i16Bit, Src, Src); + } else { + Src = _VUnZip2(DstSize, OpSize::i16Bit, Src, Src); + } + Src = _Vector_FToF(DstSize, OpSize::i32Bit, Src, OpSize::i16Bit); + + StoreResultFPR(Op, Src); +} + +void OpDispatchBuilder::AVXVCVTNEEBF162PS(OpcodeArgs, bool Even) { + const auto DstSize = OpSizeFromDst(Op); + auto Src = LoadSourceFPR(Op, Op->Src[0], Op->Flags); + + auto Convert = [&](auto Src, bool Even) -> Ref { + // Even or odd elements of each 128-bit register is converted from bfloat16 to float32. + // For even, just left shift the elements. + if (Even) { + return _VShlI(DstSize, OpSize::i32Bit, Src, 16); + } + + // For Odds, we just need to mask off the lower 16-bits of each 32-bit element. + // Can't do the same movi+vbsl instruction as ASIMD. Just use shifts instead. + auto Tmp = _VUShrI(DstSize, OpSize::i32Bit, Src, 16); + return _VShlI(DstSize, OpSize::i32Bit, Tmp, 16); + }; + StoreResultFPR(Op, Convert(Src, Even)); +} + +void OpDispatchBuilder::AVXVCVTNEPS2BF16(OpcodeArgs) { + const auto DstSize = OpSizeFromDst(Op); + const auto Is128Bit = DstSize == OpSize::i128Bit; + + auto Src = LoadSourceFPR(Op, Op->Src[0], Op->Flags); + + // Convert 4 or 8 32-bits floats in to bfloat16. + // This instruction only operates with rounding mode set to `Rounds to Nearest (even)`. + Ref Result {}; + if (Is128Bit) { + // Just do the operation in the lower half of the register. + Result = _VBFCVTN(OpSize::i128Bit, Src); + } else { + // Split the operation in to two and recombine. + Ref UpperLane = _VDupElement(OpSize::i256Bit, OpSize::i128Bit, Src, 1); + auto ResultLow = _VBFCVTN(OpSize::i128Bit, Src); + Result = _VBFCVTN2(OpSize::i128Bit, ResultLow, UpperLane); + } + + StoreResultFPR(Op, Result); +} + } // namespace FEXCore::IR diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp index 1c3d690036..7cb516d00d 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp @@ -67,11 +67,13 @@ void OpDispatchBuilder::FLD(OpcodeArgs, IR::OpSize Width) { ConvertedData = _F80CVTTo(Data, Width); } _PushStack(ConvertedData, Data, Width); + StoreX87FIP(Op); } // Float LoaD operation with memory operand void OpDispatchBuilder::FLDFromStack(OpcodeArgs) { _CopyPushStack(Op->OP & 7); + StoreX87FIP(Op); } void OpDispatchBuilder::FBLD(OpcodeArgs) { @@ -79,18 +81,21 @@ void OpDispatchBuilder::FBLD(OpcodeArgs) { Ref Data = LoadSourceFPR_WithOpSize(Op, Op->Src[0], OpSize::f80Bit, Op->Flags); Ref ConvertedData = _F80BCDLoad(Data); _PushStack(ConvertedData, Invalid(), OpSize::iInvalid); + StoreX87FIP(Op); } void OpDispatchBuilder::FBSTP(OpcodeArgs) { Ref converted = _F80BCDStore(_ReadStackValue(0)); StoreResultFPR_WithOpSize(Op, Op->Dest, converted, OpSize::f80Bit, OpSize::i8Bit); _PopStackDestroy(); + StoreX87FIP(Op); } void OpDispatchBuilder::FLD_Const(OpcodeArgs, NamedVectorConstant K) { // Update TOP Ref Data = LoadAndCacheNamedVectorConstant(OpSize::i128Bit, K); _PushStack(Data, Data, OpSize::f80Bit); + StoreX87FIP(Op); } void OpDispatchBuilder::FILD(OpcodeArgs) { @@ -122,6 +127,7 @@ void OpDispatchBuilder::FILD(OpcodeArgs) { Ref ConvertedData = _VLoadTwoGPRs(shifted, upper); _PushStack(ConvertedData, Invalid(), OpSize::iInvalid); + StoreX87FIP(Op); } void OpDispatchBuilder::FST(OpcodeArgs, IR::OpSize Width) { @@ -135,6 +141,7 @@ void OpDispatchBuilder::FST(OpcodeArgs, IR::OpSize Width) { if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); } void OpDispatchBuilder::FSTToStack(OpcodeArgs) { @@ -144,6 +151,7 @@ void OpDispatchBuilder::FSTToStack(OpcodeArgs) { if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); } // Store integer to memory (possibly with truncation) @@ -183,6 +191,7 @@ void OpDispatchBuilder::FIST(OpcodeArgs, bool Truncate) { if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { _PopStackDestroy(); } + StoreX87FIP(Op); } void OpDispatchBuilder::FADD(OpcodeArgs, IR::OpSize Width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { @@ -197,6 +206,7 @@ void OpDispatchBuilder::FADD(OpcodeArgs, IR::OpSize Width, bool Integer, OpDispa if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); return; } @@ -213,6 +223,7 @@ void OpDispatchBuilder::FADD(OpcodeArgs, IR::OpSize Width, bool Integer, OpDispa // top of stack is at offset zero _F80AddValue(0, Arg); + StoreX87FIP(Op); } void OpDispatchBuilder::FMUL(OpcodeArgs, IR::OpSize Width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { @@ -227,6 +238,7 @@ void OpDispatchBuilder::FMUL(OpcodeArgs, IR::OpSize Width, bool Integer, OpDispa if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); return; } @@ -247,6 +259,7 @@ void OpDispatchBuilder::FMUL(OpcodeArgs, IR::OpSize Width, bool Integer, OpDispa if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); } void OpDispatchBuilder::FDIV(OpcodeArgs, IR::OpSize Width, bool Integer, bool Reverse, OpDispatchBuilder::OpResult ResInST0) { @@ -264,6 +277,7 @@ void OpDispatchBuilder::FDIV(OpcodeArgs, IR::OpSize Width, bool Integer, bool Re if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); return; } @@ -288,6 +302,7 @@ void OpDispatchBuilder::FDIV(OpcodeArgs, IR::OpSize Width, bool Integer, bool Re if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); } void OpDispatchBuilder::FSUB(OpcodeArgs, IR::OpSize Width, bool Integer, bool Reverse, OpDispatchBuilder::OpResult ResInST0) { @@ -305,6 +320,7 @@ void OpDispatchBuilder::FSUB(OpcodeArgs, IR::OpSize Width, bool Integer, bool Re if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); return; } @@ -329,6 +345,7 @@ void OpDispatchBuilder::FSUB(OpcodeArgs, IR::OpSize Width, bool Integer, bool Re if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); } Ref OpDispatchBuilder::GetX87FTW_Helper() { @@ -398,7 +415,8 @@ void OpDispatchBuilder::X87FNSTENV(OpcodeArgs) { { // Instruction Offset - _StoreMemGPR(Size, ZeroConst, Mem, Constant(IR::OpSizeToSize(Size) * 3), Size, MemOffsetType::SXTX, 1); + auto FIP = _LoadContextGPR(OpSize::i64Bit, offsetof(FEXCore::Core::CPUState, FIP)); + _StoreMemGPR(Size, FIP, Mem, Constant(IR::OpSizeToSize(Size) * 3), Size, MemOffsetType::SXTX, 1); } { @@ -496,7 +514,8 @@ void OpDispatchBuilder::X87FNSAVE(OpcodeArgs) { { // Instruction Offset - _StoreMemGPR(Size, ZeroConst, Mem, Constant(IR::OpSizeToSize(Size) * 3), Size, MemOffsetType::SXTX, 1); + auto FIP = _LoadContextGPR(OpSize::i64Bit, offsetof(FEXCore::Core::CPUState, FIP)); + _StoreMemGPR(Size, FIP, Mem, Constant(IR::OpSizeToSize(Size) * 3), Size, MemOffsetType::SXTX, 1); } { @@ -566,6 +585,12 @@ void OpDispatchBuilder::X87FRSTOR(OpcodeArgs) { SetX87FTW(_LoadMemGPR(Size, Mem, Constant(IR::OpSizeToSize(Size) * 2), Size, MemOffsetType::SXTX, 1)); } + { + // FIP + auto FIP = _LoadMemGPR(Size, Mem, Constant(IR::OpSizeToSize(Size) * 3), Size, MemOffsetType::SXTX, 1); + _StoreContextGPR(OpSize::i64Bit, FIP, offsetof(FEXCore::Core::CPUState, FIP)); + } + auto SevenConst = Constant(7); auto low = Constant(~0ULL); auto high = Constant(0xFFFF); @@ -619,6 +644,7 @@ void OpDispatchBuilder::FXCH(OpcodeArgs) { _F80StackXchange(Offset); } SetRFLAG(Constant(0)); + StoreX87FIP(Op); } void OpDispatchBuilder::X87FYL2X(OpcodeArgs, bool IsFYL2XP1) { @@ -627,6 +653,7 @@ void OpDispatchBuilder::X87FYL2X(OpcodeArgs, bool IsFYL2XP1) { } else { _F80FYL2XStack(); } + StoreX87FIP(Op); } void OpDispatchBuilder::FCOMI(OpcodeArgs, IR::OpSize Width, bool Integer, OpDispatchBuilder::FCOMIFlags WhichFlags, bool PopTwice) { @@ -691,6 +718,7 @@ void OpDispatchBuilder::FCOMI(OpcodeArgs, IR::OpSize Width, bool Integer, OpDisp } else if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { _PopStackDestroy(); } + StoreX87FIP(Op); } void OpDispatchBuilder::FTST(OpcodeArgs) { @@ -710,6 +738,7 @@ void OpDispatchBuilder::FTST(OpcodeArgs) { // Set Invalid Operation flag when unordered (NaN comparison) // The x87 exception flags are sticky. Preserve earlier result SetRFLAG(_Or(OpSize::i32Bit, GetRFLAG(FEXCore::X86State::X87FLAG_IE_LOC), HostFlag_Unordered)); + StoreX87FIP(Op); } void OpDispatchBuilder::X87OpHelper(OpcodeArgs, FEXCore::IR::IROps IROp, bool ZeroC2) { @@ -717,6 +746,7 @@ void OpDispatchBuilder::X87OpHelper(OpcodeArgs, FEXCore::IR::IROps IROp, bool Ze if (ZeroC2) { SetRFLAG(Constant(0)); } + StoreX87FIP(Op); } void OpDispatchBuilder::X87ModifySTP(OpcodeArgs, bool Inc) { @@ -728,6 +758,7 @@ void OpDispatchBuilder::X87ModifySTP(OpcodeArgs, bool Inc) { // C1 set to 0 SetRFLAG(Constant(0)); + StoreX87FIP(Op); } // Operations dealing with loading and storing environment pieces @@ -809,15 +840,20 @@ void OpDispatchBuilder::FNINIT(OpcodeArgs) { SetRFLAG(Zero); SetRFLAG(Zero); SetRFLAG(Zero); + + // fninit resets the FIP. + _StoreContextGPR(OpSize::i64Bit, _Constant(0), offsetof(FEXCore::Core::CPUState, FIP)); } void OpDispatchBuilder::X87FFREE(OpcodeArgs) { _InvalidateStack(Op->OP & 7); + StoreX87FIP(Op); } void OpDispatchBuilder::X87EMMS(OpcodeArgs) { // Tags all get set to 0b11 _InvalidateStack(0xff); + StoreX87FIP(Op); } void OpDispatchBuilder::X87FCMOV(OpcodeArgs) { @@ -856,6 +892,7 @@ void OpDispatchBuilder::X87FCMOV(OpcodeArgs) { Ref VecCond = _VDupFromGPR(OpSize::i128Bit, OpSize::i64Bit, SelectCC0All1(CC)); _F80VBSLStack(OpSize::i128Bit, VecCond, Op->OP & 7, 0); + StoreX87FIP(Op); } void OpDispatchBuilder::X87FXAM(OpcodeArgs) { @@ -960,6 +997,7 @@ void OpDispatchBuilder::X87FXAM(OpcodeArgs) { SetRFLAG(C0); SetRFLAG(C2); SetRFLAG(C3); + StoreX87FIP(Op); } void OpDispatchBuilder::X87FXTRACT(OpcodeArgs) { @@ -970,6 +1008,11 @@ void OpDispatchBuilder::X87FXTRACT(OpcodeArgs) { auto Sig = _F80XTRACT_SIG(Top); _PushStack(Exp, Invalid(), OpSize::iInvalid); _PushStack(Sig, Invalid(), OpSize::iInvalid); + StoreX87FIP(Op); +} + +void OpDispatchBuilder::X87NOP(OpcodeArgs) { + StoreX87FIP(Op); } } // namespace FEXCore::IR diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp index 33fba69015..28c06146c6 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp @@ -68,6 +68,7 @@ void OpDispatchBuilder::FLDF64(OpcodeArgs, IR::OpSize Width) { ConvertedData = _F80CVT(OpSize::i64Bit, Data); } _PushStack(ConvertedData, Data, Width); + StoreX87FIP(Op); } void OpDispatchBuilder::FBLDF64(OpcodeArgs) { @@ -76,6 +77,7 @@ void OpDispatchBuilder::FBLDF64(OpcodeArgs) { Ref ConvertedData = _F80BCDLoad(Data); ConvertedData = _F80CVT(OpSize::i64Bit, ConvertedData); _PushStack(ConvertedData, Invalid(), OpSize::iInvalid); + StoreX87FIP(Op); } void OpDispatchBuilder::FBSTPF64(OpcodeArgs) { @@ -83,11 +85,13 @@ void OpDispatchBuilder::FBSTPF64(OpcodeArgs) { converted = _F80BCDStore(converted); StoreResultFPR_WithOpSize(Op, Op->Dest, converted, OpSize::f80Bit, OpSize::i8Bit); _PopStackDestroy(); + StoreX87FIP(Op); } void OpDispatchBuilder::FLDF64_Const(OpcodeArgs, uint64_t Num) { auto Data = _VCastFromGPR(OpSize::i64Bit, OpSize::i64Bit, Constant(Num)); _PushStack(Data, Data, OpSize::i64Bit); + StoreX87FIP(Op); } void OpDispatchBuilder::FILDF64(OpcodeArgs) { @@ -100,6 +104,7 @@ void OpDispatchBuilder::FILDF64(OpcodeArgs) { } auto ConvertedData = _Float_FromGPR_S(OpSize::i64Bit, ReadWidth == OpSize::i32Bit ? OpSize::i32Bit : OpSize::i64Bit, Data); _PushStack(ConvertedData, Invalid(), OpSize::iInvalid); + StoreX87FIP(Op); } void OpDispatchBuilder::FISTF64(OpcodeArgs, bool Truncate) { @@ -128,6 +133,7 @@ void OpDispatchBuilder::FISTF64(OpcodeArgs, bool Truncate) { if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { _PopStackDestroy(); } + StoreX87FIP(Op); } void OpDispatchBuilder::FADDF64(OpcodeArgs, IR::OpSize Width, bool Integer, OpDispatchBuilder::OpResult ResInST0) { @@ -142,6 +148,7 @@ void OpDispatchBuilder::FADDF64(OpcodeArgs, IR::OpSize Width, bool Integer, OpDi if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); return; } @@ -165,6 +172,7 @@ void OpDispatchBuilder::FADDF64(OpcodeArgs, IR::OpSize Width, bool Integer, OpDi // top of stack is at offset zero _F80AddValue(0, arg); + StoreX87FIP(Op); } // FIXME: following is very similar to FADDF64 @@ -180,6 +188,7 @@ void OpDispatchBuilder::FMULF64(OpcodeArgs, IR::OpSize Width, bool Integer, OpDi if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); return; } @@ -207,6 +216,7 @@ void OpDispatchBuilder::FMULF64(OpcodeArgs, IR::OpSize Width, bool Integer, OpDi if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); } void OpDispatchBuilder::FDIVF64(OpcodeArgs, IR::OpSize Width, bool Integer, bool Reverse, OpDispatchBuilder::OpResult ResInST0) { @@ -231,6 +241,7 @@ void OpDispatchBuilder::FDIVF64(OpcodeArgs, IR::OpSize Width, bool Integer, bool if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); return; } @@ -264,6 +275,7 @@ void OpDispatchBuilder::FDIVF64(OpcodeArgs, IR::OpSize Width, bool Integer, bool if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); } void OpDispatchBuilder::FSUBF64(OpcodeArgs, IR::OpSize Width, bool Integer, bool Reverse, OpDispatchBuilder::OpResult ResInST0) { @@ -288,6 +300,8 @@ void OpDispatchBuilder::FSUBF64(OpcodeArgs, IR::OpSize Width, bool Integer, bool if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); + return; } @@ -321,6 +335,7 @@ void OpDispatchBuilder::FSUBF64(OpcodeArgs, IR::OpSize Width, bool Integer, bool if (Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) { _PopStackDestroy(); } + StoreX87FIP(Op); } void OpDispatchBuilder::FTSTF64(OpcodeArgs) { @@ -330,6 +345,7 @@ void OpDispatchBuilder::FTSTF64(OpcodeArgs) { // Now we do our comparison. _F80StackTest(0); ConvertNZCVToX87(); + StoreX87FIP(Op); } void OpDispatchBuilder::FCOMIF64(OpcodeArgs, IR::OpSize Width, bool Integer, OpDispatchBuilder::FCOMIFlags WhichFlags, bool PopTwice) { @@ -376,6 +392,7 @@ void OpDispatchBuilder::FCOMIF64(OpcodeArgs, IR::OpSize Width, bool Integer, OpD } else if ((Op->TableInfo->Flags & X86Tables::InstFlags::FLAGS_POP) != 0) { _PopStackDestroy(); } + StoreX87FIP(Op); } void OpDispatchBuilder::X87FXTRACTF64(OpcodeArgs) { @@ -429,5 +446,6 @@ void OpDispatchBuilder::X87FXTRACTF64(OpcodeArgs) { _PopStackDestroy(); _PushStack(Exp, Invalid(), OpSize::iInvalid); _PushStack(Sig, Invalid(), OpSize::iInvalid); + StoreX87FIP(Op); } } // namespace FEXCore::IR diff --git a/FEXCore/Source/Interface/Core/X86Tables/SecondaryGroupTables.cpp b/FEXCore/Source/Interface/Core/X86Tables/SecondaryGroupTables.cpp index fdfaf50de7..66096d5c83 100644 --- a/FEXCore/Source/Interface/Core/X86Tables/SecondaryGroupTables.cpp +++ b/FEXCore/Source/Interface/Core/X86Tables/SecondaryGroupTables.cpp @@ -61,7 +61,7 @@ constexpr std::array SecondInstGr // Pulls from other MODRM table // GROUP 6 - {OPD(TYPE_GROUP_6, PF_NONE, 0), 1, X86InstInfo{"SLDT", TYPE_UNDEC, FLAGS_MODRM | FLAGS_SF_MOD_DST, 0}}, + {OPD(TYPE_GROUP_6, PF_NONE, 0), 1, X86InstInfo{"SLDT", TYPE_INST, FLAGS_MODRM | FLAGS_SF_MOD_DST, 0}}, {OPD(TYPE_GROUP_6, PF_NONE, 1), 1, X86InstInfo{"STR", TYPE_PRIV, FLAGS_MODRM | FLAGS_SF_MOD_DST, 0}}, {OPD(TYPE_GROUP_6, PF_NONE, 2), 1, X86InstInfo{"LLDT", TYPE_PRIV, FLAGS_NONE, 0}}, {OPD(TYPE_GROUP_6, PF_NONE, 3), 1, X86InstInfo{"LTR", TYPE_INST, FLAGS_NONE, 0}}, @@ -70,7 +70,7 @@ constexpr std::array SecondInstGr {OPD(TYPE_GROUP_6, PF_NONE, 6), 1, X86InstInfo{"", TYPE_INVALID, FLAGS_NONE, 0}}, {OPD(TYPE_GROUP_6, PF_NONE, 7), 1, X86InstInfo{"", TYPE_INVALID, FLAGS_NONE, 0}}, - {OPD(TYPE_GROUP_6, PF_F3, 0), 1, X86InstInfo{"SLDT", TYPE_UNDEC, FLAGS_MODRM | FLAGS_SF_MOD_DST, 0}}, + {OPD(TYPE_GROUP_6, PF_F3, 0), 1, X86InstInfo{"SLDT", TYPE_INST, FLAGS_MODRM | FLAGS_SF_MOD_DST, 0}}, {OPD(TYPE_GROUP_6, PF_F3, 1), 1, X86InstInfo{"STR", TYPE_PRIV, FLAGS_MODRM | FLAGS_SF_MOD_DST, 0}}, {OPD(TYPE_GROUP_6, PF_F3, 2), 1, X86InstInfo{"LLDT", TYPE_PRIV, FLAGS_NONE, 0}}, {OPD(TYPE_GROUP_6, PF_F3, 3), 1, X86InstInfo{"LTR", TYPE_INST, FLAGS_NONE, 0}}, @@ -79,7 +79,7 @@ constexpr std::array SecondInstGr {OPD(TYPE_GROUP_6, PF_F3, 6), 1, X86InstInfo{"", TYPE_INVALID, FLAGS_NONE, 0}}, {OPD(TYPE_GROUP_6, PF_F3, 7), 1, X86InstInfo{"", TYPE_INVALID, FLAGS_NONE, 0}}, - {OPD(TYPE_GROUP_6, PF_66, 0), 1, X86InstInfo{"SLDT", TYPE_UNDEC, FLAGS_MODRM | FLAGS_SF_MOD_DST, 0}}, + {OPD(TYPE_GROUP_6, PF_66, 0), 1, X86InstInfo{"SLDT", TYPE_INST, FLAGS_MODRM | FLAGS_SF_MOD_DST, 0}}, {OPD(TYPE_GROUP_6, PF_66, 1), 1, X86InstInfo{"STR", TYPE_PRIV, FLAGS_MODRM | FLAGS_SF_MOD_DST, 0}}, {OPD(TYPE_GROUP_6, PF_66, 2), 1, X86InstInfo{"LLDT", TYPE_PRIV, FLAGS_NONE, 0}}, {OPD(TYPE_GROUP_6, PF_66, 3), 1, X86InstInfo{"LTR", TYPE_INST, FLAGS_NONE, 0}}, @@ -88,7 +88,7 @@ constexpr std::array SecondInstGr {OPD(TYPE_GROUP_6, PF_66, 6), 1, X86InstInfo{"", TYPE_INVALID, FLAGS_NONE, 0}}, {OPD(TYPE_GROUP_6, PF_66, 7), 1, X86InstInfo{"", TYPE_INVALID, FLAGS_NONE, 0}}, - {OPD(TYPE_GROUP_6, PF_F2, 0), 1, X86InstInfo{"SLDT", TYPE_UNDEC, FLAGS_MODRM | FLAGS_SF_MOD_DST, 0}}, + {OPD(TYPE_GROUP_6, PF_F2, 0), 1, X86InstInfo{"SLDT", TYPE_INST, FLAGS_MODRM | FLAGS_SF_MOD_DST, 0}}, {OPD(TYPE_GROUP_6, PF_F2, 1), 1, X86InstInfo{"STR", TYPE_PRIV, FLAGS_MODRM | FLAGS_SF_MOD_DST, 0}}, {OPD(TYPE_GROUP_6, PF_F2, 2), 1, X86InstInfo{"LLDT", TYPE_PRIV, FLAGS_NONE, 0}}, {OPD(TYPE_GROUP_6, PF_F2, 3), 1, X86InstInfo{"LTR", TYPE_INST, FLAGS_NONE, 0}}, @@ -103,7 +103,7 @@ constexpr std::array SecondInstGr {OPD(TYPE_GROUP_7, PF_NONE, 2), 1, X86InstInfo{"", TYPE_SECOND_GROUP_MODRM, FLAGS_NONE, 0}}, {OPD(TYPE_GROUP_7, PF_NONE, 3), 1, X86InstInfo{"", TYPE_SECOND_GROUP_MODRM, FLAGS_NONE, 0}}, {OPD(TYPE_GROUP_7, PF_NONE, 4), 1, X86InstInfo{"SMSW", TYPE_INST, FLAGS_MODRM | FLAGS_SF_MOD_DST, 0}}, - {OPD(TYPE_GROUP_7, PF_NONE, 5), 1, X86InstInfo{"", TYPE_INVALID, FLAGS_NONE, 0}}, + {OPD(TYPE_GROUP_7, PF_NONE, 5), 1, X86InstInfo{"SERIALIZE", TYPE_INST, FLAGS_NONE, 0}}, {OPD(TYPE_GROUP_7, PF_NONE, 6), 1, X86InstInfo{"LMSW", TYPE_INST, FLAGS_MODRM, 0}}, {OPD(TYPE_GROUP_7, PF_NONE, 7), 1, X86InstInfo{"INVLPG", TYPE_SECOND_GROUP_MODRM, FLAGS_MODRM | FLAGS_SF_MOD_DST, 0}}, diff --git a/FEXCore/Source/Interface/Core/X86Tables/SecondaryModRMTables.cpp b/FEXCore/Source/Interface/Core/X86Tables/SecondaryModRMTables.cpp index 48417f9ffb..15e1f672e5 100644 --- a/FEXCore/Source/Interface/Core/X86Tables/SecondaryModRMTables.cpp +++ b/FEXCore/Source/Interface/Core/X86Tables/SecondaryModRMTables.cpp @@ -12,6 +12,19 @@ tags: frontend|x86-tables namespace FEXCore::X86Tables { using namespace InstFlags; +enum ModRM_LUT { + ENTRY_3_0, + ENTRY_MAX, +}; + +constexpr std::array ModRM_ArchSelect_LUT = {{ + // ENTRY_3_0 + { + {"SWAPGS", TYPE_INST, FLAGS_NONE, 0, { .OpDispatch = &IR::OpDispatchBuilder::UnimplementedOp }}, + {"SWAPGS", TYPE_INST, FLAGS_NONE, 0, { .OpDispatch = &IR::OpDispatchBuilder::PermissionRestrictedOp }}, + }, +}}; + constexpr std::array SecondModRMTableOps = []() consteval { std::array Table{}; constexpr U8U8InfoStruct SecondaryModRMExtensionOpTable[] = { @@ -27,7 +40,7 @@ constexpr std::array SecondModRMTableO // REG /2 {((1 << 3) | 0), 1, X86InstInfo{"XGETBV", TYPE_INST, FLAGS_NONE, 0}}, - {((1 << 3) | 1), 1, X86InstInfo{"XSETBV", TYPE_PRIV, FLAGS_NONE, 0}}, + {((1 << 3) | 1), 1, X86InstInfo{"XSETBV", TYPE_INST, FLAGS_NONE, 0}}, {((1 << 3) | 2), 1, X86InstInfo{"", TYPE_INVALID, FLAGS_NONE, 0}}, {((1 << 3) | 3), 1, X86InstInfo{"", TYPE_INVALID, FLAGS_NONE, 0}}, {((1 << 3) | 4), 1, X86InstInfo{"", TYPE_INVALID, FLAGS_NONE, 0}}, @@ -46,7 +59,7 @@ constexpr std::array SecondModRMTableO {((2 << 3) | 7), 1, X86InstInfo{"INVLPGA", TYPE_INST, FLAGS_NONE, 0}}, // REG /7 - {((3 << 3) | 0), 1, X86InstInfo{"SWAPGS", TYPE_INST, FLAGS_NONE, 0}}, + {((3 << 3) | 0), 1, X86InstInfo{"", TYPE_ARCH_DISPATCHER, FLAGS_NONE, 0, { .Indirect = ModRM_ArchSelect_LUT[ENTRY_3_0] }}}, {((3 << 3) | 1), 1, X86InstInfo{"RDTSCP", TYPE_INST, FLAGS_NONE, 0}}, {((3 << 3) | 2), 1, X86InstInfo{"MONITORX", TYPE_PRIV, FLAGS_NONE, 0}}, {((3 << 3) | 3), 1, X86InstInfo{"MWAITX", TYPE_PRIV, FLAGS_NONE, 0}}, diff --git a/FEXCore/Source/Interface/Core/X86Tables/SecondaryTables.cpp b/FEXCore/Source/Interface/Core/X86Tables/SecondaryTables.cpp index a08c243c23..db61420cb8 100644 --- a/FEXCore/Source/Interface/Core/X86Tables/SecondaryTables.cpp +++ b/FEXCore/Source/Interface/Core/X86Tables/SecondaryTables.cpp @@ -204,7 +204,7 @@ constexpr std::array SecondBaseOps = []() co {0xA0, 1, X86InstInfo{"", TYPE_ARCH_DISPATCHER, FLAGS_DEBUG_MEM_ACCESS | FLAGS_NO_OVERLAY, 0, { .Indirect = Secondary_ArchSelect_LUT[ENTRY_A0] }}}, {0xA1, 1, X86InstInfo{"", TYPE_ARCH_DISPATCHER, FLAGS_DEBUG_MEM_ACCESS | FLAGS_NO_OVERLAY, 0, { .Indirect = Secondary_ArchSelect_LUT[ENTRY_A1] }}}, - {0xA2, 1, X86InstInfo{"CPUID", TYPE_INST, FLAGS_NO_OVERLAY, 0}}, + {0xA2, 1, X86InstInfo{"CPUID", TYPE_INST, FLAGS_NO_OVERLAY | FLAGS_BLOCK_END, 0}}, {0xA3, 1, X86InstInfo{"BT", TYPE_INST, FLAGS_DEBUG_MEM_ACCESS | FLAGS_MODRM | FLAGS_SF_MOD_DST | FLAGS_NO_OVERLAY | FLAGS_SUPPORTS_LOCK, 0}}, {0xA4, 1, X86InstInfo{"SHLD", TYPE_INST, FLAGS_MODRM | FLAGS_SF_MOD_DST | FLAGS_NO_OVERLAY, 1}}, {0xA5, 1, X86InstInfo{"SHLD", TYPE_INST, FLAGS_MODRM | FLAGS_SF_MOD_DST | FLAGS_NO_OVERLAY, 0}}, @@ -226,12 +226,12 @@ constexpr std::array SecondBaseOps = []() co {0xB5, 1, X86InstInfo{"LGS", TYPE_INVALID, FLAGS_NO_OVERLAY, 0}}, {0xB6, 1, X86InstInfo{"MOVZX", TYPE_INST, GenFlagsSrcSize(SIZE_8BIT) | FLAGS_MODRM | FLAGS_NO_OVERLAY, 0}}, {0xB7, 1, X86InstInfo{"MOVZX", TYPE_INST, GenFlagsSrcSize(SIZE_16BIT) | FLAGS_MODRM | FLAGS_NO_OVERLAY, 0}}, - {0xB8, 1, X86InstInfo{"", TYPE_INVALID, FLAGS_NONE, 0}}, + {0xB8, 1, X86InstInfo{"", TYPE_INVALID, FLAGS_NO_PREFIX_ORDER, 0}}, {0xB9, 1, X86InstInfo{"", TYPE_GROUP_10, FLAGS_NO_OVERLAY, 0}}, {0xBA, 1, X86InstInfo{"", TYPE_GROUP_8, FLAGS_NO_OVERLAY, 0}}, {0xBB, 1, X86InstInfo{"BTC", TYPE_INST, FLAGS_DEBUG_MEM_ACCESS | FLAGS_MODRM | FLAGS_SF_MOD_DST | FLAGS_NO_OVERLAY | FLAGS_SUPPORTS_LOCK, 0}}, - {0xBC, 1, X86InstInfo{"BSF", TYPE_INST, FLAGS_MODRM | FLAGS_NO_OVERLAY66, 0}}, - {0xBD, 1, X86InstInfo{"BSR", TYPE_INST, FLAGS_MODRM | FLAGS_NO_OVERLAY66, 0}}, + {0xBC, 1, X86InstInfo{"BSF", TYPE_INST, FLAGS_MODRM | FLAGS_NO_PREFIX_ORDER | FLAGS_NO_OVERLAY66, 0}}, + {0xBD, 1, X86InstInfo{"BSR", TYPE_INST, FLAGS_MODRM | FLAGS_NO_PREFIX_ORDER | FLAGS_NO_OVERLAY66, 0}}, {0xBE, 1, X86InstInfo{"MOVSX", TYPE_INST, GenFlagsSrcSize(SIZE_8BIT) | FLAGS_MODRM | FLAGS_NO_OVERLAY, 0}}, {0xBF, 1, X86InstInfo{"MOVSX", TYPE_INST, GenFlagsSrcSize(SIZE_16BIT) | FLAGS_MODRM | FLAGS_NO_OVERLAY, 0}}, diff --git a/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp b/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp index 4aa60b4406..3b645fe265 100644 --- a/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp +++ b/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp @@ -321,6 +321,7 @@ namespace AVX128 { {OPD(2, 0b01, 0x59), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::AVX128_VBROADCAST, OpSize::i64Bit>}, {OPD(2, 0b01, 0x5A), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::AVX128_VBROADCAST, OpSize::i128Bit>}, + {OPD(2, 0b10, 0x72), 1, &OpDispatchBuilder::AVX128_VCVTNEPS2BF16}, {OPD(2, 0b01, 0x78), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::AVX128_VBROADCAST, OpSize::i8Bit>}, {OPD(2, 0b01, 0x79), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::AVX128_VBROADCAST, OpSize::i16Bit>}, @@ -365,6 +366,13 @@ namespace AVX128 { {OPD(2, 0b01, 0xA6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::AVX128_VFMAddSubImpl, true, 2, 1, 3>}, // VFMADDSUB {OPD(2, 0b01, 0xA7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::AVX128_VFMAddSubImpl, false, 2, 1, 3>}, // VFMSUBADD + {OPD(2, 0b00, 0xB0), 1, &OpDispatchBuilder::Bind<&IR::OpDispatchBuilder::AVX128_VCVTNEEPH2PS, false>}, + {OPD(2, 0b01, 0xB0), 1, &OpDispatchBuilder::Bind<&IR::OpDispatchBuilder::AVX128_VCVTNEEPH2PS, true>}, + {OPD(2, 0b10, 0xB0), 1, &OpDispatchBuilder::Bind<&IR::OpDispatchBuilder::AVX128_VCVTNEEBF162PS, true>}, + {OPD(2, 0b11, 0xB0), 1, &OpDispatchBuilder::Bind<&IR::OpDispatchBuilder::AVX128_VCVTNEEBF162PS, false>}, + {OPD(2, 0b01, 0xB1), 1, &IR::OpDispatchBuilder::AVX128_VBCSTNESH2PS}, + {OPD(2, 0b10, 0xB1), 1, &IR::OpDispatchBuilder::AVX128_VBCSTNEBF162PS}, + {OPD(2, 0b01, 0xB6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::AVX128_VFMAddSubImpl, true, 2, 3, 1>}, // VFMADDSUB {OPD(2, 0b01, 0xB7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::AVX128_VFMAddSubImpl, false, 2, 3, 1>}, // VFMSUBADD @@ -771,6 +779,7 @@ namespace AVX256 { {OPD(2, 0b01, 0x59), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VBROADCASTOp, OpSize::i64Bit>}, {OPD(2, 0b01, 0x5A), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VBROADCASTOp, OpSize::i128Bit>}, + {OPD(2, 0b10, 0x72), 1, &OpDispatchBuilder::AVXVCVTNEPS2BF16}, {OPD(2, 0b01, 0x78), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VBROADCASTOp, OpSize::i8Bit>}, {OPD(2, 0b01, 0x79), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VBROADCASTOp, OpSize::i16Bit>}, @@ -815,6 +824,13 @@ namespace AVX256 { {OPD(2, 0b01, 0xA6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VFMAddSubImpl, true, 2, 1, 3>}, // VFMADDSUB {OPD(2, 0b01, 0xA7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VFMAddSubImpl, false, 2, 1, 3>}, // VFMSUBADD + {OPD(2, 0b00, 0xB0), 1, &OpDispatchBuilder::Bind<&IR::OpDispatchBuilder::AVXVCVTNEEPH2PS, false>}, + {OPD(2, 0b01, 0xB0), 1, &OpDispatchBuilder::Bind<&IR::OpDispatchBuilder::AVXVCVTNEEPH2PS, true>}, + {OPD(2, 0b10, 0xB0), 1, &OpDispatchBuilder::Bind<&IR::OpDispatchBuilder::AVXVCVTNEEBF162PS, true>}, + {OPD(2, 0b11, 0xB0), 1, &OpDispatchBuilder::Bind<&IR::OpDispatchBuilder::AVXVCVTNEEBF162PS, false>}, + {OPD(2, 0b01, 0xB1), 1, &IR::OpDispatchBuilder::AVXVBCSTNESH2PS}, + {OPD(2, 0b10, 0xB1), 1, &IR::OpDispatchBuilder::AVXVBCSTNEBF162PS}, + {OPD(2, 0b01, 0xB6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VFMAddSubImpl, true, 2, 3, 1>}, // VFMADDSUB {OPD(2, 0b01, 0xB7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::VFMAddSubImpl, false, 2, 3, 1>}, // VFMSUBADD @@ -1226,6 +1242,7 @@ auto BaseTableLambda = [](const auto RuntimeTable) consteval { {OPD(2, 0b01, 0x59), 1, X86InstInfo{"VPBROADCASTQ", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_REX_W_0 | FLAGS_XMM_FLAGS, 0}}, {OPD(2, 0b01, 0x5A), 1, X86InstInfo{"VBROADCASTI128", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_L_1 | FLAGS_SF_MOD_MEM_ONLY | FLAGS_REX_W_0 | FLAGS_XMM_FLAGS, 0}}, + {OPD(2, 0b10, 0x72), 1, X86InstInfo{"VCVTNEPS2BF16", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0}}, {OPD(2, 0b01, 0x78), 1, X86InstInfo{"VPBROADCASTB", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_REX_W_0 | FLAGS_XMM_FLAGS, 0}}, {OPD(2, 0b01, 0x79), 1, X86InstInfo{"VPBROADCASTW", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_REX_W_0 | FLAGS_XMM_FLAGS, 0}}, @@ -1270,6 +1287,13 @@ auto BaseTableLambda = [](const auto RuntimeTable) consteval { {OPD(2, 0b01, 0xA6), 1, X86InstInfo{"VFMADDSUB213", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0}}, {OPD(2, 0b01, 0xA7), 1, X86InstInfo{"VFMSUBADD213", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0}}, + {OPD(2, 0b00, 0xB0), 1, X86InstInfo{"VCVTNEOPH2PS", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0}}, + {OPD(2, 0b01, 0xB0), 1, X86InstInfo{"VCVTNEEPH2PS", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0}}, + {OPD(2, 0b10, 0xB0), 1, X86InstInfo{"VCVTNEEBF162PS", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0}}, + {OPD(2, 0b11, 0xB0), 1, X86InstInfo{"VCVTNEOBF162PS", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0}}, + {OPD(2, 0b01, 0xB1), 1, X86InstInfo{"VBCSTNESH2PS", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0}}, + {OPD(2, 0b10, 0xB1), 1, X86InstInfo{"VBCSTNEBF162PS", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_XMM_FLAGS, 0}}, + {OPD(2, 0b01, 0xB6), 1, X86InstInfo{"VFMADDSUB231", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0}}, {OPD(2, 0b01, 0xB7), 1, X86InstInfo{"VFMSUBADD231", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0}}, diff --git a/FEXCore/Source/Interface/Core/X86Tables/X86Tables.h b/FEXCore/Source/Interface/Core/X86Tables/X86Tables.h index 3010516f61..a00f46d93f 100644 --- a/FEXCore/Source/Interface/Core/X86Tables/X86Tables.h +++ b/FEXCore/Source/Interface/Core/X86Tables/X86Tables.h @@ -407,7 +407,9 @@ namespace InstFlags { constexpr InstFlagType FLAGS_CALL = (1ULL << 30); constexpr InstFlagType FLAGS_SUPPORTS_LOCK = (1ULL << 31); constexpr InstFlagType FLAGS_LITERAL_PATCHABLE = (1ULL << 32); - // Flags [57..33]: Undefined + constexpr InstFlagType FLAGS_NO_PREFIX_ORDER = (1ULL << 33); + + // Flags [57..34]: Undefined // Flags [60..58]: Dst size constexpr InstFlagType FLAGS_SIZE_DST_OFF = 58; // Flags [63..61]: Src size diff --git a/FEXCore/Source/Interface/Core/X86Tables/X87Tables.cpp b/FEXCore/Source/Interface/Core/X86Tables/X87Tables.cpp index 5d2dff353e..1f52c6ffae 100644 --- a/FEXCore/Source/Interface/Core/X86Tables/X87Tables.cpp +++ b/FEXCore/Source/Interface/Core/X86Tables/X87Tables.cpp @@ -69,7 +69,7 @@ constexpr std::array X87F64OpTable = {{ {OPD(0xD9, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDFromStack>}, {OPD(0xD9, 0xC8), 8, &OpDispatchBuilder::FXCH}, - {OPD(0xD9, 0xD0), 1, &OpDispatchBuilder::NOPOp}, // FNOP + {OPD(0xD9, 0xD0), 1, &OpDispatchBuilder::X87NOP}, // FNOP // D1 = Invalid // D8 = Invalid {OPD(0xD9, 0xE0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80STACKCHANGESIGN, false>}, @@ -341,7 +341,7 @@ constexpr std::array X87F80OpTable = {{ {OPD(0xD9, 0xC0), 8, &OpDispatchBuilder::Bind<&OpDispatchBuilder::FLDFromStack>}, {OPD(0xD9, 0xC8), 8, &OpDispatchBuilder::FXCH}, - {OPD(0xD9, 0xD0), 1, &OpDispatchBuilder::NOPOp}, // FNOP + {OPD(0xD9, 0xD0), 1, &OpDispatchBuilder::X87NOP}, // FNOP // D1 = Invalid // D8 = Invalid {OPD(0xD9, 0xE0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::X87OpHelper, OP_F80STACKCHANGESIGN, false>}, diff --git a/FEXCore/Source/Interface/IR/IR.json b/FEXCore/Source/Interface/IR/IR.json index 172d62dd7a..6c1a345fe6 100644 --- a/FEXCore/Source/Interface/IR/IR.json +++ b/FEXCore/Source/Interface/IR/IR.json @@ -321,7 +321,7 @@ "DestSize": "Size", "RAOverride": "2" }, - "Break BreakDefinition:$Reason": { + "Break BreakDefinition:$Reason, GPR:$FaultAddress": { "HasSideEffects": true }, "CallbackReturn": { @@ -337,9 +337,8 @@ "HasSideEffects": true }, - "GPR:$EAX, GPR:$EBX, GPR:$ECX, GPR:$EDX = CPUID GPR:$Function, GPR:$Leaf": { + "CPUID i8:$InstSize": { "Desc": ["Calls in to the CPUID handler function to return emulated CPUID"], - "DestSize": "OpSize::i32Bit", "HasSideEffects": true }, "GPR:$EAX, GPR:$EDX = XGetBV GPR:$Function": { @@ -530,6 +529,7 @@ }, "SSA = LoadMem RegisterClass:$Class, OpSize:#Size, GPR:$Addr, GPR:$Offset, OpSize:$Align, MemOffsetType:$OffsetType, u8:$OffsetScale": { + "HasSideEffects": true, "Inline": ["", "Mem"], "DestSize": "Size" }, @@ -575,6 +575,7 @@ }, "SSA = LoadMemTSO RegisterClass:$Class, OpSize:#Size, GPR:$Addr, GPR:$Offset, OpSize:$Align, MemOffsetType:$OffsetType, u8:$OffsetScale": { + "HasSideEffects": true, "Desc": ["Does a x86 TSO compatible load from memory. Offset must be Invalid()." ], "Inline": ["", "Memtso"], @@ -590,6 +591,7 @@ }, "FPR = VLoadVectorMasked OpSize:#RegisterSize, OpSize:#ElementSize, FPR:$Mask, GPR:$Addr, GPR:$Offset, MemOffsetType:$OffsetType, u8:$OffsetScale": { + "HasSideEffects": true, "Desc": ["Does a masked load similar to VPMASKMOV/VMASKMOV where the upper bit of each element", "determines whether or not that element will be loaded from memory"], "ImplicitFlagClobber": true, @@ -604,11 +606,13 @@ "DestSize": "RegisterSize", "ElementSize": "ElementSize" }, - "FPR = VLoadVectorGatherMasked OpSize:#RegisterSize, OpSize:#ElementSize, FPR:$Incoming, FPR:$Mask, GPR:$AddrBase, FPR:$VectorIndexLow, FPR:$VectorIndexHigh, OpSize:$VectorIndexElementSize, u8:$OffsetScale, u8:$DataElementOffsetStart, u8:$IndexElementOffsetStart, OpSize:$AddrSize": { + "FPR = VLoadVectorGatherMasked OpSize:#RegisterSize, OpSize:#ElementSize, FPR:$Incoming, FPR:$Mask, GPR:$AddrBase, FPR:$VectorIndexLow, FPR:$VectorIndexHigh, OpSize:$VectorIndexElementSize, u8:$OffsetScale, u8:$DataElementOffsetStart, u8:$IndexElementOffsetStart, OpSize:$AddrSize, i1:$MaskAllOnes{false}": { + "HasSideEffects": true, "Desc": [ "Does a masked load similar to VPGATHERD* where the upper bit of each element", "determines whether or not that element will be loaded from memory.", - "Most of VSIB encoding is passed directly through to the IR operation." + "Most of VSIB encoding is passed directly through to the IR operation.", + "MaskAllOnes is set when every mask element is provably all ones." ], "TiedSource": 0, "ImplicitFlagClobber": true, @@ -618,12 +622,14 @@ "$VectorIndexElementSize == OpSize::i32Bit || $VectorIndexElementSize == OpSize::i64Bit" ] }, - "FPR = VLoadVectorGatherMaskedQPS OpSize:#RegisterSize, OpSize:#ElementSize, FPR:$Incoming, FPR:$MaskReg, GPR:$AddrBase, FPR:$VectorIndexLow, FPR:$VectorIndexHigh, u8:$OffsetScale, OpSize:$AddrSize": { + "FPR = VLoadVectorGatherMaskedQPS OpSize:#RegisterSize, OpSize:#ElementSize, FPR:$Incoming, FPR:$MaskReg, GPR:$AddrBase, FPR:$VectorIndexLow, FPR:$VectorIndexHigh, u8:$OffsetScale, OpSize:$AddrSize, i1:$MaskAllOnes{false}": { + "HasSideEffects": true, "Desc": [ "Does a masked load similar to VPGATHERQPS where the upper bit of each element", "determines whether or not that element will be loaded from memory.", "Most of VSIB encoding is passed directly through to the IR operation.", - "Only supports the case of 32-bit data element sizes from 64-bit addresses" + "Only supports the case of 32-bit data element sizes from 64-bit addresses", + "MaskAllOnes is set when every mask element is provably all ones." ], "TiedSource": 0, "ImplicitFlagClobber": true, @@ -635,6 +641,7 @@ ] }, "FPR = VLoadVectorElement OpSize:#RegisterSize, OpSize:#ElementSize, FPR:$DstSrc, u8:$Index, GPR:$Addr": { + "HasSideEffects": true, "Desc": ["Does a memory load to a single element of a vector.", "Leaves the rest of the vector's data intact.", "Matches arm64 ld1 semantics"], @@ -774,6 +781,7 @@ ] }, "FPR = VLoadNonTemporal OpSize:#RegisterSize, GPR:$Addr, i8:$Offset": { + "HasSideEffects": true, "Desc": ["Does a non-temporal memory load of a vector.", "Matches arm64 SVE ldnt1b semantics.", "Specifically weak-memory model ordered to match x86 non-temporal stores." @@ -1861,7 +1869,7 @@ "DestSize": "RegisterSize" }, - "FPR = VectorImm OpSize:#RegisterSize, OpSize:#ElementSize, u8:$Immediate, u8:$ShiftAmount{0}": { + "FPR = VectorImm OpSize:#RegisterSize, OpSize:#ElementSize, u8:$Immediate, u8:$ShiftAmount{0}, i1:$Do64BitExpansion{false}": { "Desc": ["Generates a vector with each element containg the immediate zexted" ], "DestSize": "RegisterSize", @@ -2759,6 +2767,28 @@ "RegisterSize != FEXCore::IR::OpSize::i256Bit && \"What does 256-bit mean in this context?\"" ] }, + "FPR = VBFCVTN OpSize:#RegisterSize, FPR:$Vector": { + "Desc": [ + "Converts fp32 to bf16." + ], + "DestSize": "RegisterSize", + "ElementSize": "FEXCore::IR::OpSize::i16Bit", + "EmitValidation": [ + "RegisterSize != FEXCore::IR::OpSize::i256Bit && \"What does 256-bit mean in this context?\"" + ] + }, + "FPR = VBFCVTN2 OpSize:#RegisterSize, FPR:$VectorLower, FPR:$VectorUpper": { + "TiedSource": 0, + "Desc": [ + "Converts fp32 to bf16 and inserting in to the high bits.", + "Bottom half is untouched" + ], + "DestSize": "RegisterSize", + "ElementSize": "FEXCore::IR::OpSize::i16Bit", + "EmitValidation": [ + "RegisterSize != FEXCore::IR::OpSize::i256Bit && \"What does 256-bit mean in this context?\"" + ] + }, "FPR = Vector_FToI OpSize:#RegisterSize, OpSize:#ElementSize, FPR:$Vector, RoundType:$Round": { "Desc": ["Vector op: Rounds float to integral", "Rounding mode determined by argument" diff --git a/FEXCore/Source/Interface/IR/IREmitter.cpp b/FEXCore/Source/Interface/IR/IREmitter.cpp index f305ad3e88..6c8ed5d11b 100644 --- a/FEXCore/Source/Interface/IR/IREmitter.cpp +++ b/FEXCore/Source/Interface/IR/IREmitter.cpp @@ -21,6 +21,7 @@ static bool IsFragmentExit(FEXCore::IR::IROps Op) { switch (Op) { case OP_THREADREMOVECODEENTRY: case OP_SYSCALL: + case OP_CPUID: case OP_EXITFUNCTION: case OP_BREAK: return true; default: return false; diff --git a/FEXCore/Source/Interface/IR/IREmitter.h b/FEXCore/Source/Interface/IR/IREmitter.h index 4c4c9bae80..711ab54f93 100644 --- a/FEXCore/Source/Interface/IR/IREmitter.h +++ b/FEXCore/Source/Interface/IR/IREmitter.h @@ -341,6 +341,27 @@ class IREmitter { return false; } + // Returns true if every bit of the vector value is set. + // Currently this only recognizes the self compare equal idiom. + // TODO: Should this recognize other patterns? + bool IsValueVectorAllOnes(OrderedNodeWrapper ssa) const { + auto RealNode = ssa.GetNode(DualListData.ListBegin()); + const auto* IROp = RealNode->Op(DualListData.DataBegin()); + return IROp->Op == OP_VCMPEQ && IROp->Args[0].ID() == IROp->Args[1].ID(); + } + + // Returns true if the value is a load of register Reg of class Class. + bool IsValueLoadRegister(OrderedNodeWrapper ssa, RegClass Class, uint32_t Reg) const { + auto RealNode = ssa.GetNode(DualListData.ListBegin()); + const auto* IROp = RealNode->Op(DualListData.DataBegin()); + if (IROp->Op != OP_LOADREGISTER) { + return false; + } + + auto Op = IROp->C(); + return Op->Class == Class && Op->Reg == Reg; + } + FEXCore::IR::IROp_Header* GetOpHeader(OrderedNodeWrapper ssa) { Ref RealNode = ssa.GetNode(DualListData.ListBegin()); return RealNode->Op(DualListData.DataBegin()); @@ -354,6 +375,15 @@ class IREmitter { return node->Wrapped(DualListData.ListBegin()); } + // Returns argument Index of Node if the op of Node is Op. Else returns nullptr. + Ref GetArgIfOp(Ref Node, IROps Op, unsigned Index) { + if (!Node || GetOpHeader(WrapNode(Node))->Op != Op) { + return nullptr; + } + + return UnwrapNode(GetOpHeader(WrapNode(Node))->Args[Index]); + } + NodeIterator GetIterator(OrderedNodeWrapper wrapper) { return NodeIterator(DualListData.ListBegin(), DualListData.DataBegin(), wrapper); } diff --git a/FEXCore/Source/Interface/IR/Passes/RegisterAllocationPass.cpp b/FEXCore/Source/Interface/IR/Passes/RegisterAllocationPass.cpp index c47998aec8..0f0a9c8edf 100644 --- a/FEXCore/Source/Interface/IR/Passes/RegisterAllocationPass.cpp +++ b/FEXCore/Source/Interface/IR/Passes/RegisterAllocationPass.cpp @@ -527,27 +527,6 @@ bool ConstrainedRAPass::TryPostRAMerge(Ref LastNode, Ref CodeNode, IROp_Header* IREmit->RemovePostRA(CodeNode); return false; } - } else if (IROp->Op == OP_CPUID && PhysicalRegister(IROp->Args[0]) == PhysicalRegister(LastNode) && LastOp->Op == OP_CONSTANT) { - // Try to constant fold. As a limitation of merging only 2 instructions, we - // can only handle constant functions, not constant leafs. This could be - // lifted if we generalized at a (significant) complexity cost. - uint64_t ConstantFunction = LastOp->C()->Constant; - auto Op = IROp->CW(); - - const auto SupportsConstant = CPUID->DoesFunctionReportConstantData(ConstantFunction); - if (SupportsConstant.SupportsConstantFunction == CPUIDEmu::SupportsConstant::CONSTANT && - SupportsConstant.NeedsLeaf != CPUIDEmu::NeedsLeafConstant::NEEDSLEAFCONSTANT) { - const auto Result = CPUID->RunFunction(ConstantFunction, 0 /* leaf */); - - IREmit->SetWriteCursorBefore(CodeNode); - IREmit->_Fence(IR::FenceType::Inst); - IREmit->_Constant(Result.eax).Node->Reg = PhysicalRegister(Op->OutEAX).Raw; - IREmit->_Constant(Result.ebx).Node->Reg = PhysicalRegister(Op->OutEBX).Raw; - IREmit->_Constant(Result.ecx).Node->Reg = PhysicalRegister(Op->OutECX).Raw; - IREmit->_Constant(Result.edx).Node->Reg = PhysicalRegister(Op->OutEDX).Raw; - IREmit->RemovePostRA(CodeNode); - return false; - } } // Merge moves that are immediately consumed. diff --git a/FEXCore/Source/Utils/Allocator.cpp b/FEXCore/Source/Utils/Allocator.cpp index 18495ce6e0..519622326e 100644 --- a/FEXCore/Source/Utils/Allocator.cpp +++ b/FEXCore/Source/Utils/Allocator.cpp @@ -23,7 +23,9 @@ #include #ifndef _WIN32 #include +#include #include +#include #endif namespace fextl::pmr { @@ -214,6 +216,52 @@ fextl::vector CollectMemoryGaps(uintptr_t Begin, uintptr_t End, in FEX_UNREACHABLE; } +// Tracks the region below the main thread stack, which is reserved for stack growth, +// as well as the guard region directly below the stack window. +static uintptr_t MainThreadStackReserveBegin {}; +static uintptr_t MainThreadStackWindowBegin {}; +static uintptr_t MainThreadStackWindowEnd {}; +static size_t MainThreadStackGuardSize {}; +static uintptr_t MainThreadStackGuardBegin {}; + +// Currently, guest signal handlers leak space on the main stack +// if they exit via longjmp instead of sigreturn. Because of this memory leak +// we must allow the main thread stack to grow without bound. This technically +// violates RLIMIT_STACK, but until we fix the leak, we don't have much choice. +// TODO: Once the leak is fixed, remove this function entirely. +bool TryGrowMainThreadStack(uintptr_t FaultAddress) { + // Only grow the stack when the fault is in the guard region. + if (FaultAddress < MainThreadStackGuardBegin || FaultAddress >= MainThreadStackWindowBegin) { + return false; + } + + // Compute the required size of the stack region. + // Double the current stack, up to 1GB, then just add 1GB at a time. + constexpr size_t OneGB = 1ULL << 30; + const size_t RequiredSize = MainThreadStackWindowEnd - FaultAddress; + size_t NewSize = MainThreadStackWindowEnd - MainThreadStackWindowBegin; + + while (NewSize < RequiredSize) { + if (NewSize < OneGB) { + NewSize = std::min(NewSize * 2, OneGB); + } else { + NewSize += OneGB; + } + } + + // Don't grow past the bottom of the reserved region, + // which is where the first dynamically loaded libraries live. + const uintptr_t NewWindowBegin = std::max(MainThreadStackWindowEnd - NewSize, MainThreadStackReserveBegin); + if (mprotect(reinterpret_cast(NewWindowBegin), MainThreadStackWindowBegin - NewWindowBegin, PROT_READ | PROT_WRITE) != 0) { + return false; + } + + // Move the window and the guard region below it down. + MainThreadStackWindowBegin = NewWindowBegin; + MainThreadStackGuardBegin = std::max(NewWindowBegin - MainThreadStackGuardSize, MainThreadStackReserveBegin); + return true; +} + fextl::vector StealMemoryRegion(uintptr_t Begin, uintptr_t End) { const uintptr_t StackLocation_u64 = reinterpret_cast(alloca(0)); @@ -231,7 +279,7 @@ fextl::vector StealMemoryRegion(uintptr_t Begin, uintptr_t End) { // If the memory bounds include the stack, blocking all memory regions will // limit the stack size to the current value. To allow some stack growth, // we don't block the memory gap directly below the stack memory but - // instead map it as readable+writable. + // instead reserve it for the stack, see TryGrowMainThreadStack. { auto StackRegionIt = std::find_if(Regions.begin(), Regions.end(), [StackLocation_u64](auto& Region) { return reinterpret_cast(Region.Ptr) + Region.Size > StackLocation_u64; @@ -243,16 +291,40 @@ fextl::vector StealMemoryRegion(uintptr_t Begin, uintptr_t End) { if (IsStackMapping && StackRegionIt != Regions.begin() && reinterpret_cast(std::prev(StackRegionIt)->Ptr) + std::prev(StackRegionIt)->Size <= End) { - // Allocate the region under the stack as READ | WRITE so the stack can still grow --StackRegionIt; - auto Alloc = - ::mmap(StackRegionIt->Ptr, StackRegionIt->Size, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_NORESERVE | MAP_PRIVATE | MAP_FIXED, -1, 0); + // Get the page size, so we can make sure to align on page boundaries. + const auto PageSize = sysconf(_SC_PAGESIZE); + const size_t HostPageSize = PageSize > 0 ? PageSize : FEXCore::Utils::FEX_PAGE_SIZE; + + // Allocate RLIMIT_STACK worth of memory for the main thread stack, or 64MB if no limit is set. + struct rlimit StackLimit {}; + size_t Size = 1ULL << 26; + if (getrlimit(RLIMIT_STACK, &StackLimit) == 0 && StackLimit.rlim_cur != RLIM_INFINITY) { + Size = std::max(FEXCore::AlignUp(StackLimit.rlim_cur, HostPageSize), HostPageSize); + } + Size = std::min(Size, StackRegionIt->Size); + + // Reserve all of the memory between the top of the stack, and the start of the next region. + // We must map it with PROT_NONE, otherwise the MM will assume these pages are "in use" + // and charge this usage towards VmData. In practice this is multiple TBs of VA space. + auto Alloc = ::mmap(StackRegionIt->Ptr, StackRegionIt->Size, PROT_NONE, MAP_ANONYMOUS | MAP_NORESERVE | MAP_PRIVATE | MAP_FIXED, -1, 0); LogMan::Throw::AFmt(Alloc != MAP_FAILED, "StealMemoryRegion:Stack: mmap({}, {:x}) failed: {}", fmt::ptr(StackRegionIt->Ptr), StackRegionIt->Size, errno); LogMan::Throw::AFmt(Alloc == StackRegionIt->Ptr, "mmap returned {} instead of {}", Alloc, fmt::ptr(StackRegionIt->Ptr)); + // Now determine the bounds for the stack region, and its guard region, which is used by TryGrowMainThreadStack(). + MainThreadStackReserveBegin = reinterpret_cast(StackRegionIt->Ptr); + MainThreadStackWindowEnd = MainThreadStackReserveBegin + StackRegionIt->Size; + MainThreadStackWindowBegin = MainThreadStackWindowEnd - Size; + MainThreadStackGuardSize = 256 * HostPageSize; + MainThreadStackGuardBegin = std::max(MainThreadStackWindowBegin - MainThreadStackGuardSize, MainThreadStackReserveBegin); + + // Protect the stack window. + const auto Result = mprotect(reinterpret_cast(MainThreadStackWindowBegin), Size, PROT_READ | PROT_WRITE); + LogMan::Throw::AFmt(Result == 0, "StealMemoryRegion:Stack: mprotect({:x}, {:x}) failed: {}", MainThreadStackWindowBegin, Size, errno); + Regions.erase(StackRegionIt); } } diff --git a/FEXCore/Source/Utils/AllocatorHooks.cpp b/FEXCore/Source/Utils/AllocatorHooks.cpp index e85f09a091..63f84a824c 100644 --- a/FEXCore/Source/Utils/AllocatorHooks.cpp +++ b/FEXCore/Source/Utils/AllocatorHooks.cpp @@ -27,9 +27,13 @@ using vma_name_hook_type = void (*)(const char* name, const void* address, size_ #ifdef ENABLE_FEX_ALLOCATOR typedef void* (*rp_mmap_hook_type)(size_t size, size_t alignment, size_t* offset, size_t* mapped_size); typedef void (*rp_munmap_hook_type)(void* address, size_t offset, size_t mapped_size); +typedef void (*rp_mcommit_hook_type)(void* address, size_t size); +typedef void (*rp_mdecommit_hook_type)(void* address, size_t size); typedef void (*vma_name_hook_type)(const char* name, const void* address, size_t size); extern "C" rp_mmap_hook_type rp_mmap_hook; extern "C" rp_munmap_hook_type rp_munmap_hook; +extern "C" rp_mcommit_hook_type rp_mcommit_hook; +extern "C" rp_mdecommit_hook_type rp_mdecommit_hook; extern "C" vma_name_hook_type rp_name_hook; #ifndef _WIN32 @@ -112,8 +116,11 @@ static void* FEX_rp_mmap(size_t size, size_t alignment, size_t* offset, size_t* alignment = 0; } + // Protect with PROT_NONE so that the whole heap is not charged against VmData. + // In the memory commit callback, FEX_rp_memory_commit, we reprotect with + // PROT_READ | PROT_WRITE to commit memory on demand. size_t map_size = AlignUp(size + alignment, global_config.page_size); - auto ptr = fex_mmap_hook(0, map_size, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0); + auto ptr = fex_mmap_hook(0, map_size, PROT_NONE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0); if (ptr == MAP_FAILED) { ptr = nullptr; @@ -149,7 +156,9 @@ static void* FEX_rp_mmap(size_t size, size_t alignment, size_t* offset, size_t* } static void FEX_rp_memory_commit(void* address, size_t size) { - // NOP-implementation. + if (mprotect(address, size, PROT_READ | PROT_WRITE)) { + fprintf(stderr, "Failed to commit VMA region."); + } } static void FEX_rp_memory_decommit(void* address, size_t size) { @@ -160,6 +169,11 @@ static void FEX_rp_memory_decommit(void* address, size_t size) { if (madvise(address, size, MADV_DONTNEED)) { fprintf(stderr, "Failed to decommit VMA region."); } + + // Drop the protections back to PROT_NONE so the pages are no longer charged towards VmData. + if (mprotect(address, size, PROT_NONE)) { + fprintf(stderr, "Failed to decommit VMA region."); + } } static void FEX_rp_memory_unmap(void* address, size_t offset, size_t mapped_size) { @@ -190,6 +204,8 @@ void InitializeAllocator(size_t PageSize) { rpmalloc_initialize_config(&global_interface, &global_config); rp_mmap_hook = FEX_rp_mmap; rp_munmap_hook = FEX_rp_memory_unmap; + rp_mcommit_hook = FEX_rp_memory_commit; + rp_mdecommit_hook = FEX_rp_memory_decommit; rp_name_hook = LocalVirtualName; } #else diff --git a/FEXCore/include/FEXCore/Core/CoreState.h b/FEXCore/include/FEXCore/Core/CoreState.h index 80514bfdcd..21120738bc 100644 --- a/FEXCore/include/FEXCore/Core/CoreState.h +++ b/FEXCore/include/FEXCore/Core/CoreState.h @@ -71,6 +71,12 @@ static_assert(std::is_standard_layout_v>, "Needs t static_assert(std::is_trivially_copyable_v>, "needs to be trivially copyable"); static_assert(sizeof(NonAtomicRefCounter) == sizeof(uint64_t), "Needs to be correct size"); +// Flags about the core state that the JIT can query. +enum class CoreFlagsEnum : uint64_t { + CPUID_ENABLED = (1ULL << 0), +}; +FEX_DEF_NUM_OPS(CoreFlagsEnum) + struct alignas(64) CPUState { // Allows more efficient handling of the register // file in the event AVX is not supported. @@ -107,7 +113,9 @@ struct alignas(64) CPUState { uint64_t L1Pointer {}; uint64_t L1Mask {}; uint64_t callret_sp {}; - uint64_t _pad1 {}; + + // CPUID is default enabled. + CoreFlagsEnum CoreFlags {CoreFlagsEnum::CPUID_ENABLED}; // Cacheline: 1,2,3,4 // The high 128-bits of AVX registers when not being emulated by SVE256. @@ -188,10 +196,41 @@ struct alignas(64) CPUState { GDT->Limit1 = Limit >> 16; } + static bool IsInstructionBPEnabled(unsigned BPIndex, uint64_t Dr7) { + LOGMAN_THROW_A_FMT(BPIndex < NUM_DEBUG_ADDRESSES, "Too large of an index"); + + // If the GE/LE flags and Transaction type is instruction then it is enabled. + uint64_t GELEEnabledMask = 0b11ULL << (2 * BPIndex); + uint64_t TransactionTypeMask = 0b11ULL << (16 + (4 * BPIndex)); + return (Dr7 & GELEEnabledMask) && (Dr7 & TransactionTypeMask) == 0; + }; + + static size_t BreakpointSize(unsigned BPIndex, uint64_t Dr7) { + LOGMAN_THROW_A_FMT(BPIndex < NUM_DEBUG_ADDRESSES, "Too large of an index"); + + switch ((Dr7 >> (18 + (4 * BPIndex))) & 0b11) { + case 0: return 1; + case 1: return 2; + case 2: return 8; + case 3: return 4; + default: FEX_UNREACHABLE; + } + } + uint16_t FCW {0x37F}; uint8_t AbridgedFTW {}; uint8_t _pad2[5]; + uint64_t FIP {}; + + // Debug registers 0-3 are addresses. + static constexpr size_t NUM_DEBUG_ADDRESSES = 4; + uint64_t Dr[NUM_DEBUG_ADDRESSES] {}; + // Debug register 6 is a status return register. + uint64_t Dr6 {}; + // Debug register 7 is the control register. + uint64_t Dr7 {}; + // PF/AF are statically mapped as-if they were r16/r17 (which do not exist in // x86 otherwise). This allows a straightforward mapping for SRA. static constexpr uint8_t PF_AS_GREG = 16; @@ -247,7 +286,6 @@ struct alignas(64) CPUState { // Follows encoding of the TI bit in segment selector encoding. constexpr static uint32_t SEGMENT_ARRAY_INDEX_GDT = 0; constexpr static uint32_t SEGMENT_ARRAY_INDEX_LDT = 1; - Core::CPUState::gdt_segment private_gdt[32] {}; }; static_assert(std::is_trivially_copyable_v, "Needs to be trivial"); static_assert(std::is_standard_layout_v, "This needs to be standard layout"); @@ -348,13 +386,17 @@ struct JITPointers { uint64_t SyscallHandlerFunc {}; uint64_t ExitFunctionLink {}; uint64_t MonoBackpatcherWrite {}; - uint64_t LUDIV {}; - uint64_t LDIV {}; uint64_t RDRANDFallback {}; uint64_t ThunkCallbackRet {}; + /** + * @name Frontend handler pointers. + * @{ */ // Handles returning/calling ARM64EC code from the JIT, expects the target PC in TMP3 uint64_t ExitFunctionEC {}; + // Handles a synchronous exception without faulting to jump in to the handler. Frontend specific. + uint64_t SynchronousExceptionHandler {}; + /** @} */ FallbackABIInfo FallbackHandlerPointers[FallbackHandlerIndex::OPINDEX_MAX]; uint64_t NamedVectorConstantPointers[FEXCore::IR::NamedVectorConstant::NAMED_VECTOR_CONST_POOL_MAX]; @@ -372,15 +414,15 @@ struct JITPointers { uint64_t ThreadStopHandlerSpillSRA {}; uint64_t ThreadPauseHandlerSpillSRA {}; uint64_t ThreadDispatchSyscallHandler {}; + uint64_t ThreadDispatchCPUIDHandler {}; uint64_t ThreadDispatchRemoveCodeEntry {}; uint64_t GuestSignal_SIGILL {}; uint64_t GuestSignal_SIGTRAP {}; uint64_t GuestSignal_SIGSEGV {}; + uint64_t GuestSignal_SynchronousFault {}; uint64_t SignalReturnHandler {}; uint64_t SignalReturnHandlerRT {}; uint64_t L2Pointer {}; - uint64_t LUDIVHandler {}; - uint64_t LDIVHandler {}; uint64_t F64SinHandler {}; uint64_t F64CosHandler {}; uint64_t F64TanHandler {}; @@ -417,17 +459,19 @@ struct CpuStateFrame { */ uint64_t InSyscallInfo {}; - uint32_t SignalHandlerRefCounter {}; - - struct alignas(8) SynchronousFaultDataStruct { + struct SynchronousFaultDataStruct { bool FaultToTopAndGeneratedException {}; uint8_t Signal; uint8_t TrapNo; uint8_t si_code; uint16_t err_code; uint16_t _pad : 16; + // Fault address can be different from the FaultRIP so need to distinguish. + uint64_t FaultAddress; } SynchronousFaultData; + uint32_t SignalHandlerRefCounter {}; + InternalThreadState* Thread; #ifdef _WIN32 @@ -444,7 +488,7 @@ static_assert(offsetof(CpuStateFrame, Pointers) + sizeof(CpuStateFrame::Pointers "than architecture maximum 32768"); static_assert(std::is_standard_layout::value, "This needs to be standard layout"); -static_assert(sizeof(CpuStateFrame::SynchronousFaultData) == 8, "This needs to be 8 bytes"); +static_assert(sizeof(CpuStateFrame::SynchronousFaultData) == 16, "This needs to be 16 bytes"); static_assert(alignof(CpuStateFrame::SynchronousFaultDataStruct) == 8, "This needs to be 8 bytes"); static_assert(offsetof(CpuStateFrame, SynchronousFaultData) % 8 == 0, "This needs to be aligned"); } // namespace FEXCore::Core diff --git a/FEXCore/include/FEXCore/Core/HostFeatures.h b/FEXCore/include/FEXCore/Core/HostFeatures.h index 9708cd9687..0073b58492 100644 --- a/FEXCore/include/FEXCore/Core/HostFeatures.h +++ b/FEXCore/include/FEXCore/Core/HostFeatures.h @@ -14,7 +14,7 @@ namespace FEXCore { */ struct HostFeatures { // Changes code generation slightly. - enum class HostTypeEnum : uint32_t { + enum class HostTypeEnum : uint8_t { Unknown, Linux, Wow64, @@ -24,7 +24,22 @@ struct HostFeatures { // Whether or not the host supports any kind of SVE implementation. [[nodiscard]] bool SupportsSVE() const { - return SupportsSVE128 || SupportsSVE256; + return ProcessFeatures.SupportsSVE128 || ProcessFeatures.SupportsSVE256; + } + + [[nodiscard]] + bool SupportsSVE128() const { + return ProcessFeatures.SupportsSVE128; + } + + [[nodiscard]] + bool SupportsSVE256() const { + return ProcessFeatures.SupportsSVE256; + } + + [[nodiscard]] + bool SupportsAVX() const { + return ProcessFeatures.SupportsAVX; } [[nodiscard]] @@ -32,63 +47,85 @@ struct HostFeatures { return 4 << DCacheLineLog2; } + /** + * @brief This structure contains all the data required to determine hashing at the "process" level. + * Unlike the `HostFeaturesHash` below, this data changes codegen depending on if the process is Linux, Arm64EC, or Wow64. + */ + struct ProcessFeaturesHash { + HostTypeEnum HostType : 2 {}; + uint8_t SupportsFaultFreeSynchronousFaults : 1 {}; + // This only determines the starting mode a process started in. + // The process can technically long jump to-from the other modes. + uint8_t Is64BitMode : 1 {}; + + // These are technically HostFeatures, but they differ between Linux, wow64, arm64. + uint8_t SupportsAVX : 1 {}; + uint8_t SupportsSVE128 : 1 {}; + uint8_t SupportsSVE256 : 1 {}; + + uint8_t pad : 1 {}; + }; + static_assert(sizeof(ProcessFeaturesHash) == 1); + struct CacheHash { + // This hash is used to determine the "bucket" a machine goes in to. + // This should match between Linux, Arm64EC, and Wow64. uint64_t HostFeaturesHash; - HostTypeEnum HostType; + + // This hash is used to determine features that are different between process types. + ProcessFeaturesHash ProcessFeaturesHash; }; [[nodiscard]] CacheHash HashForCaching() const { - static_assert(offsetof(HostFeatures, HostType) == 8); + static_assert(offsetof(HostFeatures, ProcessFeatures) == 8); CacheHash Result {}; memcpy(&Result.HostFeaturesHash, this, sizeof(uint64_t)); - Result.HostType = HostType; + Result.ProcessFeaturesHash = ProcessFeatures; return Result; } // Affects codegen and is basically machine description. - uint32_t DCacheLineLog2 : 4 {}; - uint32_t SupportsCacheMaintenanceOps : 1 {}; - uint32_t SupportsAES : 1 {}; - uint32_t SupportsCRC : 1 {}; - uint32_t SupportsCLZERO : 1 {}; - uint32_t SupportsAtomics : 1 {}; - uint32_t SupportsRCPC : 1 {}; - uint32_t SupportsTSOImm9 : 1 {}; - uint32_t SupportsRAND : 1 {}; - uint32_t SupportsAVX : 1 {}; - uint32_t SupportsSVE128 : 1 {}; - uint32_t SupportsSVE256 : 1 {}; - uint32_t SupportsSHA : 1 {}; - uint32_t SupportsPMULL_128Bit : 1 {}; - uint32_t SupportsCSSC : 1 {}; - uint32_t SupportsFCMA : 1 {}; - uint32_t SupportsFlagM : 1 {}; - uint32_t SupportsFlagM2 : 1 {}; - uint32_t SupportsRPRES : 1 {}; - uint32_t SupportsPreserveAllABI : 1 {}; - uint32_t SupportsAES256 : 1 {}; - uint32_t SupportsSVEBitPerm : 1 {}; - uint32_t SupportsCPUIndexInTPIDRRO : 1 {}; - uint32_t SupportsFRINTTS : 1 {}; - uint32_t SupportsECV : 1 {}; - uint32_t SupportsWFXT : 1 {}; - uint32_t Supports3DNow : 1 {}; - uint32_t SupportsSSE4a : 1 {}; - uint32_t SupportsMOPS : 1 {}; - uint32_t SupportsI8MM : 1 {}; - uint32_t SupportsDotProd : 1 {}; - uint32_t PreferZVAForVZero : 1 {}; - uint32_t SupportsAFP : 1 {}; - uint32_t SupportsFloatExceptions : 1 {}; + uint32_t DCacheLineLog2 : 4 {}; // [3:0] + uint32_t SupportsCacheMaintenanceOps : 1 {}; // [4] + uint32_t SupportsAES : 1 {}; // [5] + uint32_t SupportsCRC : 1 {}; // [6] + uint32_t SupportsCLZERO : 1 {}; // [7] + uint32_t SupportsAtomics : 1 {}; // [8] + uint32_t SupportsRCPC : 1 {}; // [9] + uint32_t SupportsTSOImm9 : 1 {}; // [10] + uint32_t SupportsRAND : 1 {}; // [11] + uint32_t SupportsSHA : 1 {}; // [12] + uint32_t SupportsPMULL_128Bit : 1 {}; // [13] + uint32_t SupportsCSSC : 1 {}; // [14] + uint32_t SupportsFCMA : 1 {}; // [15] + uint32_t SupportsFlagM : 1 {}; // [16] + uint32_t SupportsFlagM2 : 1 {}; // [17] + uint32_t SupportsRPRES : 1 {}; // [18] + uint32_t SupportsPreserveAllABI : 1 {}; // [19] + uint32_t SupportsAES256 : 1 {}; // [20] + uint32_t SupportsSVEBitPerm : 1 {}; // [21] + uint32_t SupportsCPUIndexInTPIDRRO : 1 {}; // [22] + uint32_t SupportsFRINTTS : 1 {}; // [23] + uint32_t SupportsECV : 1 {}; // [24] + uint32_t SupportsWFXT : 1 {}; // [25] + uint32_t Supports3DNow : 1 {}; // [26] + uint32_t SupportsSSE4a : 1 {}; // [27] + uint32_t SupportsMOPS : 1 {}; // [28] + uint32_t SupportsI8MM : 1 {}; // [29] + uint32_t SupportsDotProd : 1 {}; // [30] + uint32_t PreferZVAForVZero : 1 {}; // [31] + uint32_t SupportsAFP : 1 {}; // [32] + uint32_t SupportsFloatExceptions : 1 {}; // [33] + uint32_t SupportsBF16 : 1 {}; // [34] // Flag if this is InstCountCI - uint32_t IsInstCountCI : 1 {}; - uint32_t pad : 26 {}; + uint32_t IsInstCountCI : 1 {}; // [38] + uint32_t pad : 28 {}; // [63:35] // This affects codegen, but it isn't machine state - HostTypeEnum HostType {}; + ProcessFeaturesHash ProcessFeatures {}; // MIDR information // Also used for determining number of CPU cores for CPUID diff --git a/FEXCore/include/FEXCore/Utils/Allocator.h b/FEXCore/include/FEXCore/Utils/Allocator.h index adcfcdda37..50dbaac3cf 100644 --- a/FEXCore/include/FEXCore/Utils/Allocator.h +++ b/FEXCore/include/FEXCore/Utils/Allocator.h @@ -79,5 +79,6 @@ FEX_DEFAULT_VISIBILITY fextl::vector Setup48BitAllocatorIfExists(s #ifndef _WIN32 FEX_DEFAULT_VISIBILITY void RegisterTLSData(FEXCore::Core::InternalThreadState* Thread); FEX_DEFAULT_VISIBILITY void UninstallTLSData(FEXCore::Core::InternalThreadState* Thread); +FEX_DEFAULT_VISIBILITY bool TryGrowMainThreadStack(uintptr_t FaultAddress); #endif } // namespace FEXCore::Allocator diff --git a/FEXCore/include/FEXCore/Utils/PrctlUtils.h b/FEXCore/include/FEXCore/Utils/PrctlUtils.h index f0211fc4c6..a819e1aded 100644 --- a/FEXCore/include/FEXCore/Utils/PrctlUtils.h +++ b/FEXCore/include/FEXCore/Utils/PrctlUtils.h @@ -53,4 +53,8 @@ #define PR_GET_MDWE 66 #endif +#ifndef PR_GET_TPIDRRO_CPU +#define PR_GET_TPIDRRO_CPU 0x7F1DBB0 +#endif + #endif // ifndef _WIN32 diff --git a/FEXCore/unittests/APITests/CMakeLists.txt b/FEXCore/unittests/APITests/CMakeLists.txt index 983d10d5fd..06a5d07361 100644 --- a/FEXCore/unittests/APITests/CMakeLists.txt +++ b/FEXCore/unittests/APITests/CMakeLists.txt @@ -4,9 +4,11 @@ set(LIBS fmt::fmt vixl::vixl Catch2::Catch2WithMain FEXCore_Base JemallocLibs) foreach(TEST ${TESTS}) get_filename_component(TEST_NAME ${TEST} NAME_WLE) add_executable(FEXCore_Tests_${TEST_NAME} ${TEST}) + target_link_libraries(FEXCore_Tests_${TEST_NAME} PRIVATE ${LIBS}) target_include_directories(FEXCore_Tests_${TEST_NAME} PUBLIC "${CMAKE_CURRENT_SOURCE_DIR}/../../Source/") target_compile_options(FEXCore_Tests_${TEST_NAME} PRIVATE ${FEX_TUNE_COMPILE_FLAGS}) + set_target_properties(FEXCore_Tests_${TEST_NAME} PROPERTIES RUNTIME_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/FEXCore_Tests") catch_discover_tests(FEXCore_Tests_${TEST_NAME} TEST_SUFFIX ".${TEST_NAME}.FEXCore_Tests") endforeach() diff --git a/FEXCore/unittests/Emitter/ASIMD_Tests.cpp b/FEXCore/unittests/Emitter/ASIMD_Tests.cpp index be08a1f792..48681234d2 100644 --- a/FEXCore/unittests/Emitter/ASIMD_Tests.cpp +++ b/FEXCore/unittests/Emitter/ASIMD_Tests.cpp @@ -644,6 +644,9 @@ TEST_CASE_METHOD(TestDisassembler, "Emitter: ASIMD: Advanced SIMD two-register m TEST_SINGLE(frecpe(SubRegSize::i32Bit, DReg::d30, DReg::d29), "frecpe v30.2s, v29.2s"); // TEST_SINGLE(frecpe(SubRegSize::i64Bit, DReg::d30, DReg::d29), "frecpe v30.1d, v29.1d"); + TEST_SINGLE(bfcvtn(QReg::q30, QReg::q29), "bfcvtn v30.4h, v29.4s"); + TEST_SINGLE(bfcvtn2(QReg::q30, QReg::q29), "bfcvtn2 v30.8h, v29.4s"); + TEST_SINGLE(rev32(SubRegSize::i8Bit, QReg::q30, QReg::q29), "rev32 v30.16b, v29.16b"); TEST_SINGLE(rev32(SubRegSize::i16Bit, QReg::q30, QReg::q29), "rev32 v30.8h, v29.8h"); // TEST_SINGLE(rev32(SubRegSize::i32Bit, QReg::q30, QReg::q29), "rev32 v30.4s, v29.4s"); diff --git a/Scripts/InstallFEX.py b/Scripts/InstallFEX.py index 38f09fa298..3b2637ff19 100755 --- a/Scripts/InstallFEX.py +++ b/Scripts/InstallFEX.py @@ -86,7 +86,7 @@ def IsSupportedDistro(): # We only support Ubuntu if Distro[0] == "ubuntu": - return Distro[1] in {"22.04", "24.04", "24.10", "25.04", "25.10"} + return Distro[1] in {"22.04", "24.04", "24.10", "25.04", "25.10", "26.04", "26.10"} return False diff --git a/Scripts/InstructionCountParser.py b/Scripts/InstructionCountParser.py index cc0a2b7f49..c79e24662a 100755 --- a/Scripts/InstructionCountParser.py +++ b/Scripts/InstructionCountParser.py @@ -62,6 +62,8 @@ class HostFeatures(Flag) : FEATURE_MOPS = (1 << 17) FEATURE_I8MM = (1 << 18) FEATURE_DOTPROD = (1 << 19) + FEATURE_BF16 = (1 << 20) + FEATURE_TPIDRRO = (1 << 21) HostFeaturesLookup = { "SVE128" : HostFeatures.FEATURE_SVE128, @@ -84,6 +86,8 @@ class HostFeatures(Flag) : "MOPS" : HostFeatures.FEATURE_MOPS, "I8MM" : HostFeatures.FEATURE_I8MM, "DOTPROD" : HostFeatures.FEATURE_DOTPROD, + "BF16" : HostFeatures.FEATURE_BF16, + "TPIDRRO" : HostFeatures.FEATURE_TPIDRRO, } def GetHostFeatures(data): diff --git a/Scripts/guest_test_runner.py b/Scripts/guest_test_runner.py index 29891df294..5d8662b349 100644 --- a/Scripts/guest_test_runner.py +++ b/Scripts/guest_test_runner.py @@ -1,11 +1,13 @@ #!/usr/bin/python3 -import json import os import sys -import subprocess +# NB: This script is run with the "-S" flag, and therefore it can only use the Python standard library. -def DoesFEXSupportAVX(mode): +def DoesFEXSupportAVX(): # Check if FEX indicates support for AVX + + # Import this here lazily to save on startup time + import subprocess fex_interpreter_path = os.path.dirname(sys.argv[7]) + "/FEX" args = list() @@ -16,7 +18,7 @@ def DoesFEXSupportAVX(mode): process = subprocess.run(args, capture_output=True, text=True) output = process.stdout - for line in output: + for line in output.splitlines(): if 'flags' in line: flags = line.split(':')[1].strip().split(' ') return 'avx' in flags and 'avx2' in flags @@ -30,6 +32,8 @@ def TestRequiresAVXSupport(): try: with open(json_path) as json_file: try: + # Import this here lazily to save on startup time + import json json_data = json.load(json_file) if not isinstance(json_data, dict): raise TypeError('JSON data must be a dict') @@ -91,7 +95,7 @@ def LoadTestsFileResults(File): StartingFEXArgsOffset = 8 # If the test requires AVX and FEX doesn't support it, just pass the test and move on -if TestRequiresAVXSupport() and not DoesFEXSupportAVX(mode): +if mode == "guest" and TestRequiresAVXSupport() and not DoesFEXSupportAVX(): sys.exit(0) # Open test expected information files and load in to dictionaries. @@ -130,9 +134,9 @@ def LoadTestsFileResults(File): for Try in range(TryCount): # Run the test and wait for it to end to get the result print(RunnerArgs) - Process = subprocess.Popen(RunnerArgs) - Process.wait() - ResultCode = Process.returncode + Process = os.posix_spawnp(RunnerArgs[0], RunnerArgs, os.environ) + _, Status = os.waitpid(Process, 0) + ResultCode = os.waitstatus_to_exitcode(Status) # Break if the expected output is the result code if (expected_output[test_name] == ResultCode): diff --git a/Scripts/json_config_parse.py b/Scripts/json_config_parse.py index c707ef8915..1104dbc268 100644 --- a/Scripts/json_config_parse.py +++ b/Scripts/json_config_parse.py @@ -62,32 +62,38 @@ class Mode(Flag) : MODE_64 = 1 class HostFeatures(Flag) : - FEATURE_ANY = 0 - FEATURE_3DNOW = (1 << 0) - FEATURE_SSE4A = (1 << 1) - FEATURE_AVX = (1 << 2) - FEATURE_RAND = (1 << 3) - FEATURE_SHA = (1 << 4) - FEATURE_CLZERO = (1 << 5) - FEATURE_BMI1 = (1 << 6) - FEATURE_BMI2 = (1 << 7) - FEATURE_CLWB = (1 << 8) - FEATURE_LINUX = (1 << 9) - FEATURE_AES256 = (1 << 10) - FEATURE_AFP = (1 << 11) - FEATURE_SSSE3 = (1 << 12) - FEATURE_SSE4_1 = (1 << 13) - FEATURE_SSE4_2 = (1 << 14) - FEATURE_AES = (1 << 15) - FEATURE_PCLMUL = (1 << 16) - FEATURE_MOVBE = (1 << 17) - FEATURE_ADX = (1 << 18) - FEATURE_XSAVE = (1 << 19) - FEATURE_RDPID = (1 << 20) - FEATURE_CLFLOPT = (1 << 21) - FEATURE_FSGSBASE = (1 << 22) - FEATURE_EMMI = (1 << 23) - FEATURE_AVX_VNNI = (1 << 24) + FEATURE_ANY = 0 + FEATURE_3DNOW = (1 << 0) + FEATURE_SSE4A = (1 << 1) + FEATURE_AVX = (1 << 2) + FEATURE_RAND = (1 << 3) + FEATURE_SHA = (1 << 4) + FEATURE_CLZERO = (1 << 5) + FEATURE_BMI1 = (1 << 6) + FEATURE_BMI2 = (1 << 7) + FEATURE_CLWB = (1 << 8) + FEATURE_LINUX = (1 << 9) + FEATURE_AES256 = (1 << 10) + FEATURE_AFP = (1 << 11) + FEATURE_SSSE3 = (1 << 12) + FEATURE_SSE4_1 = (1 << 13) + FEATURE_SSE4_2 = (1 << 14) + FEATURE_AES = (1 << 15) + FEATURE_PCLMUL = (1 << 16) + FEATURE_MOVBE = (1 << 17) + FEATURE_ADX = (1 << 18) + FEATURE_XSAVE = (1 << 19) + FEATURE_RDPID = (1 << 20) + FEATURE_CLFLOPT = (1 << 21) + FEATURE_FSGSBASE = (1 << 22) + FEATURE_EMMI = (1 << 23) + FEATURE_AVX_VNNI = (1 << 24) + FEATURE_SERIALIZE = (1 << 25) + FEATURE_AVX_NE_CONVERT = (1 << 26) + FEATURE_AVX_VNNI_INT8 = (1 << 27) + FEATURE_AVX_VNNI_INT16 = (1 << 28) + FEATURE_AVX_IFMA = (1 << 29) + FEATURE_SHA512 = (1 << 30) RegStringLookup = { "NONE": Regs.REG_NONE, @@ -150,31 +156,37 @@ class HostFeatures(Flag) : } HostFeaturesLookup = { - "3DNOW" : HostFeatures.FEATURE_3DNOW, - "SSE4A" : HostFeatures.FEATURE_SSE4A, - "AVX" : HostFeatures.FEATURE_AVX, - "RAND" : HostFeatures.FEATURE_RAND, - "SHA" : HostFeatures.FEATURE_SHA, - "CLZERO" : HostFeatures.FEATURE_CLZERO, - "BMI1" : HostFeatures.FEATURE_BMI1, - "BMI2" : HostFeatures.FEATURE_BMI2, - "CLWB" : HostFeatures.FEATURE_CLWB, - "LINUX" : HostFeatures.FEATURE_LINUX, - "AES256" : HostFeatures.FEATURE_AES256, - "AFP" : HostFeatures.FEATURE_AFP, - "SSSE3" : HostFeatures.FEATURE_SSSE3, - "SSE4.1" : HostFeatures.FEATURE_SSE4_1, - "SSE4.2" : HostFeatures.FEATURE_SSE4_2, - "AES" : HostFeatures.FEATURE_AES, - "PCLMUL" : HostFeatures.FEATURE_PCLMUL, - "MOVBE" : HostFeatures.FEATURE_MOVBE, - "ADX" : HostFeatures.FEATURE_ADX, - "XSAVE" : HostFeatures.FEATURE_XSAVE, - "RDPID" : HostFeatures.FEATURE_RDPID, - "CLFLOPT" : HostFeatures.FEATURE_CLFLOPT, - "FSGSBASE" : HostFeatures.FEATURE_FSGSBASE, - "EMMI" : HostFeatures.FEATURE_EMMI, - "AVX_VNNI" : HostFeatures.FEATURE_AVX_VNNI, + "3DNOW" : HostFeatures.FEATURE_3DNOW, + "SSE4A" : HostFeatures.FEATURE_SSE4A, + "AVX" : HostFeatures.FEATURE_AVX, + "RAND" : HostFeatures.FEATURE_RAND, + "SHA" : HostFeatures.FEATURE_SHA, + "CLZERO" : HostFeatures.FEATURE_CLZERO, + "BMI1" : HostFeatures.FEATURE_BMI1, + "BMI2" : HostFeatures.FEATURE_BMI2, + "CLWB" : HostFeatures.FEATURE_CLWB, + "LINUX" : HostFeatures.FEATURE_LINUX, + "AES256" : HostFeatures.FEATURE_AES256, + "AFP" : HostFeatures.FEATURE_AFP, + "SSSE3" : HostFeatures.FEATURE_SSSE3, + "SSE4.1" : HostFeatures.FEATURE_SSE4_1, + "SSE4.2" : HostFeatures.FEATURE_SSE4_2, + "AES" : HostFeatures.FEATURE_AES, + "PCLMUL" : HostFeatures.FEATURE_PCLMUL, + "MOVBE" : HostFeatures.FEATURE_MOVBE, + "ADX" : HostFeatures.FEATURE_ADX, + "XSAVE" : HostFeatures.FEATURE_XSAVE, + "RDPID" : HostFeatures.FEATURE_RDPID, + "CLFLOPT" : HostFeatures.FEATURE_CLFLOPT, + "FSGSBASE" : HostFeatures.FEATURE_FSGSBASE, + "EMMI" : HostFeatures.FEATURE_EMMI, + "AVX_VNNI" : HostFeatures.FEATURE_AVX_VNNI, + "SERIALIZE" : HostFeatures.FEATURE_SERIALIZE, + "AVX_NE_CONVERT" : HostFeatures.FEATURE_AVX_NE_CONVERT, + "AVX_VNNI_INT8" : HostFeatures.FEATURE_AVX_VNNI_INT8, + "AVX_VNNI_INT16" : HostFeatures.FEATURE_AVX_VNNI_INT16, + "AVX_IFMA" : HostFeatures.FEATURE_AVX_IFMA, + "SHA512" : HostFeatures.FEATURE_SHA512, } def parse_hexstring(s): diff --git a/Scripts/testharness_runner.py b/Scripts/testharness_runner.py index ce3760b4eb..e415e7e456 100644 --- a/Scripts/testharness_runner.py +++ b/Scripts/testharness_runner.py @@ -1,8 +1,9 @@ #!/usr/bin/python3 +import os import sys -import subprocess from os import path from shutil import which +# NB: This script is run with the "-S" flag, and therefore it can only use the Python standard library. # Args: ... @@ -59,9 +60,9 @@ sys.exit(125) # Run the test and wait for it to end to get the result -Process = subprocess.Popen(RunnerArgs) -Process.wait() -ResultCode = Process.returncode +Process = os.posix_spawnp(RunnerArgs[0], RunnerArgs, os.environ) +_, Status = os.waitpid(Process, 0) +ResultCode = os.waitstatus_to_exitcode(Status) # Check for known failures - try full test name first, then partial test name is_known_failure = known_failures.get(full_test_name) or known_failures.get(current_test) diff --git a/Source/Common/FEXServerClient.cpp b/Source/Common/FEXServerClient.cpp index 6e2d084ab6..0680323785 100644 --- a/Source/Common/FEXServerClient.cpp +++ b/Source/Common/FEXServerClient.cpp @@ -235,6 +235,11 @@ int ConnectToServer(ConnectionOption ConnectionOption) { return -1; } +void UnlinkServerSocketPath() { + ::unlink(GetServerSocketPath(false).c_str()); + ::unlink(GetServerSocketPath(true).c_str()); +} + bool SetupClient(std::string_view InterpreterPath) { ServerFD = FEXServerClient::ConnectToAndStartServer(InterpreterPath); if (ServerFD == -1) { diff --git a/Source/Common/FEXServerClient.h b/Source/Common/FEXServerClient.h index 3df6a46b9c..8de60b0dee 100644 --- a/Source/Common/FEXServerClient.h +++ b/Source/Common/FEXServerClient.h @@ -65,6 +65,7 @@ fextl::string GetTempFolder(); fextl::string GetServerMountFolder(); fextl::string GetServerSocketName(); fextl::string GetServerSocketPath(bool ForceTmp); +void UnlinkServerSocketPath(); int GetServerFD(); bool SetupClient(std::string_view InterpreterPath); diff --git a/Source/Common/HostFeatures.cpp b/Source/Common/HostFeatures.cpp index 858d76d713..52322bcfa0 100644 --- a/Source/Common/HostFeatures.cpp +++ b/Source/Common/HostFeatures.cpp @@ -8,6 +8,7 @@ #include #include #include +#include #include #include @@ -353,8 +354,8 @@ static void OverrideFeatures(FEXCore::HostFeatures* Features, uint64_t ForceSVEW const bool Enable##name = (HostFeatures() & FEXCore::Config::HostFeatures::ENABLE##enum_name) != 0; \ LogMan::Throw::AFmt(!(Disable##name && Enable##name), "Disabling and Enabling CPU feature (" #name ") is mutually exclusive"); - ENABLE_DISABLE_OPTION(SupportsAVX, AVX, AVX); - ENABLE_DISABLE_OPTION(SupportsSVE128, SVE, SVE); + ENABLE_DISABLE_OPTION(ProcessFeatures.SupportsAVX, AVX, AVX); + ENABLE_DISABLE_OPTION(ProcessFeatures.SupportsSVE128, SVE, SVE); ENABLE_DISABLE_OPTION(SupportsAFP, AFP, AFP); ENABLE_DISABLE_OPTION(SupportsRCPC, LRCPC, LRCPC); ENABLE_DISABLE_OPTION(SupportsTSOImm9, LRCPC2, LRCPC2); @@ -376,6 +377,8 @@ static void OverrideFeatures(FEXCore::HostFeatures* Features, uint64_t ForceSVEW ENABLE_DISABLE_OPTION(SupportsMOPS, MOPS, MOPS); ENABLE_DISABLE_OPTION(SupportsI8MM, I8MM, I8MM); ENABLE_DISABLE_OPTION(SupportsDotProd, DOTPROD, DOTPROD); + ENABLE_DISABLE_OPTION(SupportsBF16, BF16, BF16); + ENABLE_DISABLE_OPTION(SupportsCPUIndexInTPIDRRO, TPIDRRO, TPIDRRO); GET_SINGLE_OPTION(Crypto, CRYPTO); #undef ENABLE_DISABLE_OPTION @@ -396,7 +399,7 @@ static void OverrideFeatures(FEXCore::HostFeatures* Features, uint64_t ForceSVEW } ///< Only force enable SVE256 if SVE is already enabled and ForceSVEWidth is set to >= 256. - Features->SupportsSVE256 = ForceSVEWidth && ForceSVEWidth >= 256; + Features->ProcessFeatures.SupportsSVE256 = ForceSVEWidth && ForceSVEWidth >= 256; } static void HandleErrata(FEXCore::HostFeatures* HostFeatures, uint64_t MIDR) { @@ -508,18 +511,19 @@ void FetchHostFeatures(FEX::CPUFeatures& Features, FEXCore::HostFeatures& HostFe HostFeatures.SupportsWFXT = Features.Supports(CPUFeatures::Feature::WFxt); HostFeatures.SupportsI8MM = Features.Supports(CPUFeatures::Feature::I8MM); HostFeatures.SupportsDotProd = Features.Supports(CPUFeatures::Feature::DotProd); + HostFeatures.SupportsBF16 = Features.Supports(CPUFeatures::Feature::BF16); #ifdef VIXL_SIMULATOR // Hardcode enable SVE with 256-bit wide registers. - HostFeatures.SupportsSVE128 = ForceSVEWidth() ? ForceSVEWidth() >= 128 : true; - HostFeatures.SupportsSVE256 = ForceSVEWidth() ? ForceSVEWidth() >= 256 : true; + HostFeatures.ProcessFeatures.SupportsSVE128 = ForceSVEWidth() ? ForceSVEWidth() >= 128 : true; + HostFeatures.ProcessFeatures.SupportsSVE256 = ForceSVEWidth() ? ForceSVEWidth() >= 256 : true; HostFeatures.SupportsMOPS = true; // Simulator has a hardcoded ZVA size of 64-bytes. HostFeatures.SupportsCLZERO = true; HostFeatures.SupportsAES = true; HostFeatures.SupportsCRC = true; - HostFeatures.SupportsAVX = true; + HostFeatures.ProcessFeatures.SupportsAVX = true; HostFeatures.SupportsSHA = true; HostFeatures.SupportsPMULL_128Bit = true; HostFeatures.SupportsAES256 = true; @@ -528,8 +532,8 @@ void FetchHostFeatures(FEX::CPUFeatures& Features, FEXCore::HostFeatures& HostFe HostFeatures.SupportsRPRES = false; HostFeatures.SupportsAFP = false; #else - HostFeatures.SupportsSVE128 = Features.Supports(CPUFeatures::Feature::SVE2); - HostFeatures.SupportsSVE256 = Features.Supports(CPUFeatures::Feature::SVE2) && Features.GetSVEVectorLengthInBits() >= 256; + HostFeatures.ProcessFeatures.SupportsSVE128 = Features.Supports(CPUFeatures::Feature::SVE2); + HostFeatures.ProcessFeatures.SupportsSVE256 = Features.Supports(CPUFeatures::Feature::SVE2) && Features.GetSVEVectorLengthInBits() >= 256; HostFeatures.SupportsMOPS = Features.Supports(CPUFeatures::Feature::MOPS); // Check if we can support cacheline clears @@ -542,8 +546,8 @@ void FetchHostFeatures(FEX::CPUFeatures& Features, FEXCore::HostFeatures& HostFe #endif HostFeatures.Supports3DNow = true; - HostFeatures.SupportsAVX = true; - HostFeatures.SupportsAES256 = HostFeatures.SupportsAVX && HostFeatures.SupportsAES; + HostFeatures.ProcessFeatures.SupportsAVX = true; + HostFeatures.SupportsAES256 = HostFeatures.SupportsAVX() && HostFeatures.SupportsAES; HostFeatures.SupportsPreserveAllABI = FEX_HAS_PRESERVE_ALL_ATTR; HostFeatures.PreferZVAForVZero = false; @@ -585,7 +589,7 @@ void FetchHostFeatures(FEX::CPUFeatures& Features, FEXCore::HostFeatures& HostFe HostFeatures.SupportsRAND = Feature.Feat_rand; HostFeatures.SupportsRCPC = true; HostFeatures.SupportsTSOImm9 = true; - HostFeatures.SupportsAVX = Feature.Feat_avx; + HostFeatures.ProcessFeatures.SupportsAVX = Feature.Feat_avx; HostFeatures.SupportsSHA = Feature.Feat_sha; HostFeatures.SupportsPMULL_128Bit = Feature.Feat_pclmulqdq; HostFeatures.SupportsAES256 = Feature.Feat_aes; @@ -599,7 +603,16 @@ void FetchHostFeatures(FEX::CPUFeatures& Features, FEXCore::HostFeatures& HostFe OverrideFeatures(&HostFeatures, ForceSVEWidth()); } -FEXCore::HostFeatures FetchHostFeatures() { +#ifndef _WIN32 +namespace TPIDRRO { + bool SupportsTPIDRRO_CPU() { + // 1 means supports, anything else is unsupported. + return prctl(PR_GET_TPIDRRO_CPU, 0, 0, 0, 0) == 1; + } +} // namespace TPIDRRO +#endif + +FEXCore::HostFeatures FetchHostFeatures(bool Is64BitMode) { FEX_CONFIG_OPT(CPUFeatureRegisters, CPUFEATUREREGISTERS); CPUFeatures Features {}; @@ -627,13 +640,21 @@ FEXCore::HostFeatures FetchHostFeatures() { __asm volatile("mrs %[midr], midr_el1" : [midr] "=r"(MIDR)); #endif - FEXCore::HostFeatures HostFeatures = {}; + FEXCore::HostFeatures HostFeatures = { +#ifndef _WIN32 + // Wine/Windows side sets this elsewhere. + .SupportsCPUIndexInTPIDRRO = TPIDRRO::SupportsTPIDRRO_CPU(), +#endif + .ProcessFeatures = + { + .HostType = FEXCore::HostFeatures::HostTypeEnum::Linux, + // Fault free syncronous faults unsupported on Linux for now. + .SupportsFaultFreeSynchronousFaults = false, + .Is64BitMode = Is64BitMode, + }, + .ProcessPID = static_cast(::getpid())}; FillMIDRInformationViaLinux(&HostFeatures); FetchHostFeatures(Features, HostFeatures, true, CTR, MIDR); - - HostFeatures.SupportsCPUIndexInTPIDRRO = false; - HostFeatures.HostType = FEXCore::HostFeatures::HostTypeEnum::Linux; - HostFeatures.ProcessPID = ::getpid(); return HostFeatures; } } // namespace FEX diff --git a/Source/Common/HostFeatures.h b/Source/Common/HostFeatures.h index 0fe73c9c51..667d67896f 100644 --- a/Source/Common/HostFeatures.h +++ b/Source/Common/HostFeatures.h @@ -692,6 +692,6 @@ void FillMIDRInformationViaLinux(FEXCore::HostFeatures* Features); void FetchHostFeatures(FEX::CPUFeatures& Features, FEXCore::HostFeatures& HostFeatures, bool SupportsCacheMaintenanceOps, uint64_t CTR, uint64_t MIDR); -FEXCore::HostFeatures FetchHostFeatures(); +FEXCore::HostFeatures FetchHostFeatures(bool Is64BitMode); FEX::CPUFeatures GetCPUFeaturesFromIDRegisters(); } // namespace FEX diff --git a/Source/Common/X86Features.h b/Source/Common/X86Features.h index 684c75754a..8f245d7156 100644 --- a/Source/Common/X86Features.h +++ b/Source/Common/X86Features.h @@ -1,15 +1,60 @@ #pragma once #include -#ifdef ARCHITECTURE_x86_64 +#include + +#if !defined(VIXL_SIMULATOR) && defined(ARCHITECTURE_x86_64) #include +#endif namespace FEX::X86 { class Features final { public: +#if !defined(VIXL_SIMULATOR) && defined(ARCHITECTURE_x86_64) Features() { - cpuid_data data {}; - data = cpuid(0); + GetFeatures(); + } +#else + Features(FEXCore::Context::Context* CTX) + : CTX {CTX} { + GetFeatures(); + } +#endif + + // Features. + bool Feat_3dnow {}; + bool Feat_sse4a {}; + bool Feat_bmi1 {}; + bool Feat_bmi2 {}; + bool Feat_clwb {}; + bool Feat_aes {}; + bool Feat_crc {}; + bool Feat_rand {}; + bool Feat_sha {}; + bool Feat_pclmulqdq {}; + bool Feat_vaes {}; + bool Feat_clzero {}; + bool Feat_avx {}; + bool Feat_ssse3 {}; + bool Feat_sse4_1 {}; + bool Feat_sse4_2 {}; + bool Feat_movbe {}; + bool Feat_adx {}; + bool Feat_xsave {}; + bool Feat_rdpid {}; + bool Feat_clflopt {}; + bool Feat_fsgsbase {}; + bool Feat_avx_vnni {}; + bool Feat_serialize {}; + bool Feat_avx_ne_convert {}; + bool Feat_avx_vnni_int8 {}; + bool Feat_avx_vnni_int16 {}; + bool Feat_avx_ifma {}; + bool Feat_sha512 {}; + +private: + void GetFeatures() { + auto data = cpuid(0); if (data.eax >= 1) { auto data_1 = cpuid(0x1); @@ -40,10 +85,16 @@ class Features final { Feat_vaes = data_7.ecx & (1U << 9); Feat_pclmulqdq = Feat_pclmulqdq && (data_7.ecx & (1U << 10)); Feat_rdpid = data_7.ecx & (1U << 22); + Feat_serialize = data_7.edx & (1U << 14); if (data_7.eax >= 1) { auto data_7_1 = cpuid(0x7, 0x1); + Feat_sha512 = Feat_avx && (data_7_1.eax & (1U << 0)); Feat_avx_vnni = Feat_avx && (data_7_1.eax & (1U << 4)); + Feat_avx_ifma = Feat_avx && (data_7_1.eax & (1U << 23)); + Feat_avx_vnni_int8 = Feat_avx && (data_7_1.edx & (1U << 4)); + Feat_avx_ne_convert = Feat_avx && (data_7_1.edx & (1U << 5)); + Feat_avx_vnni_int16 = Feat_avx && (data_7_1.edx & (1U << 10)); } } @@ -61,41 +112,17 @@ class Features final { } } - // Features. - bool Feat_3dnow {}; - bool Feat_sse4a {}; - bool Feat_bmi1 {}; - bool Feat_bmi2 {}; - bool Feat_clwb {}; - bool Feat_aes {}; - bool Feat_crc {}; - bool Feat_rand {}; - bool Feat_sha {}; - bool Feat_pclmulqdq {}; - bool Feat_vaes {}; - bool Feat_clzero {}; - bool Feat_avx {}; - bool Feat_ssse3 {}; - bool Feat_sse4_1 {}; - bool Feat_sse4_2 {}; - bool Feat_movbe {}; - bool Feat_adx {}; - bool Feat_xsave {}; - bool Feat_rdpid {}; - bool Feat_clflopt {}; - bool Feat_fsgsbase {}; - bool Feat_avx_vnni {}; - -private: - struct cpuid_data { - uint32_t eax, ebx, ecx, edx; - }; - - cpuid_data cpuid(uint32_t Function, uint32_t Leaf = 0) { - cpuid_data data; +#if !defined(VIXL_SIMULATOR) && defined(ARCHITECTURE_x86_64) + FEXCore::CPUID::FunctionResults cpuid(uint32_t Function, uint32_t Leaf = 0) { + FEXCore::CPUID::FunctionResults data; __cpuid_count(Function, Leaf, data.eax, data.ebx, data.ecx, data.edx); return data; } +#else + FEXCore::CPUID::FunctionResults cpuid(uint32_t Function, uint32_t Leaf = 0) { + return CTX->RunCPUIDFunction(Function, Leaf); + } + FEXCore::Context::Context* CTX {}; +#endif }; } // namespace FEX::X86 -#endif diff --git a/Source/Steam/ServerManager.cpp b/Source/Steam/ServerManager.cpp index c6a5b94b0d..c166ed757e 100644 --- a/Source/Steam/ServerManager.cpp +++ b/Source/Steam/ServerManager.cpp @@ -39,6 +39,25 @@ PipesType get_pipe() { return pipes; } +void WaitForFDEnd(int fd) { + while (true) { + char buf[4096]; + auto read_len = ::read(STDIN_FILENO, buf, sizeof(buf)); + if (read_len < 0) { + if (errno == EINTR || errno == EAGAIN) { + // Interrupted, try again. + continue; + } else { + // Error on read. + break; + } + } else if (read_len == 0) { + // EOF + break; + } + } +} + int main(int argc, const char** argv, char** const envp) { LogMan::Throw::InstallHandler(AssertHandler); LogMan::Msg::InstallHandler(MsgHandler); @@ -84,28 +103,19 @@ int main(int argc, const char** argv, char** const envp) { close(pipes.read_pipe); pipes.read_pipe = -1; - // Now that the server is started and watching our pipe, we can close the returned FD, as it'll stay open as long as the pipe is open. + // Do a blocking read, discarding any written data and wait for EOF. + WaitForFDEnd(STDIN_FILENO); + + // Terminate the write pipe to say we're shutting down. + close(pipes.write_pipe); + pipes.write_pipe = -1; + + // Wait for the server to clean-up. + WaitForFDEnd(ServerFD); close(ServerFD); ServerFD = -1; - // Do a blocking read, discarding any written data and wait for EOF. - while (true) { - char buf[4096]; - auto read_len = ::read(STDIN_FILENO, buf, sizeof(buf)); - if (read_len < 0) { - if (errno == EINTR || errno == EAGAIN) { - // Interrupted, try again. - continue; - } else { - // Error on read. - break; - } - } else if (read_len == 0) { - // EOF - break; - } - } - - // Terminating will clean-up. + // Unlink the FEXServer socket files so they don't become stale. + FEXServerClient::UnlinkServerSocketPath(); return 0; } diff --git a/Source/Tools/CodeSizeValidation/CMakeLists.txt b/Source/Tools/CodeSizeValidation/CMakeLists.txt index a63cac5747..32735ecd62 100644 --- a/Source/Tools/CodeSizeValidation/CMakeLists.txt +++ b/Source/Tools/CodeSizeValidation/CMakeLists.txt @@ -3,4 +3,4 @@ list(APPEND LIBS FEXCore Common CommonTools JemallocLibs) add_executable(CodeSizeValidation Main.cpp) target_include_directories(CodeSizeValidation PRIVATE ${CMAKE_BINARY_DIR}/generated) -target_link_libraries(CodeSizeValidation PRIVATE ${LIBS} ${PTHREAD_LIB}) +target_link_libraries(CodeSizeValidation PRIVATE ${LIBS} Threads::Threads) diff --git a/Source/Tools/CodeSizeValidation/Main.cpp b/Source/Tools/CodeSizeValidation/Main.cpp index 834691f143..d2394cc9b4 100644 --- a/Source/Tools/CodeSizeValidation/Main.cpp +++ b/Source/Tools/CodeSizeValidation/Main.cpp @@ -556,6 +556,8 @@ int main(int argc, char** argv, char** const envp) { FEATURE_MOPS = (1U << 17), FEATURE_I8MM = (1U << 18), FEATURE_DOTPROD = (1U << 19), + FEATURE_BF16 = (1U << 20), + FEATURE_TPIDRRO = (1U << 21), }; uint64_t SVEWidth = 0; @@ -615,6 +617,12 @@ int main(int argc, char** argv, char** const envp) { if (TestHeaderData->EnabledHostFeatures & FEATURE_DOTPROD) { HostFeatureControl |= static_cast(FEXCore::Config::HostFeatures::ENABLEDOTPROD); } + if (TestHeaderData->EnabledHostFeatures & FEATURE_BF16) { + HostFeatureControl |= static_cast(FEXCore::Config::HostFeatures::ENABLEBF16); + } + if (TestHeaderData->EnabledHostFeatures & FEATURE_TPIDRRO) { + HostFeatureControl |= static_cast(FEXCore::Config::HostFeatures::ENABLETPIDRRO); + } if (TestHeaderData->EnabledHostFeatures & FEATURE_TSO) { FEXCore::Config::Set(FEXCore::Config::ConfigOption::CONFIG_TSOENABLED, "1"); @@ -679,6 +687,12 @@ int main(int argc, char** argv, char** const envp) { if (TestHeaderData->DisabledHostFeatures & FEATURE_DOTPROD) { HostFeatureControl |= static_cast(FEXCore::Config::HostFeatures::DISABLEDOTPROD); } + if (TestHeaderData->DisabledHostFeatures & FEATURE_BF16) { + HostFeatureControl |= static_cast(FEXCore::Config::HostFeatures::DISABLEBF16); + } + if (TestHeaderData->DisabledHostFeatures & FEATURE_TPIDRRO) { + HostFeatureControl |= static_cast(FEXCore::Config::HostFeatures::DISABLETPIDRRO); + } if (TestHeaderData->DisabledHostFeatures & FEATURE_TSO) { FEXCore::Config::Set(FEXCore::Config::ConfigOption::CONFIG_TSOENABLED, "0"); @@ -695,7 +709,7 @@ int main(int argc, char** argv, char** const envp) { // Create FEXCore context. fextl::unique_ptr CTX; { - auto HostFeatures = FEX::FetchHostFeatures(); + auto HostFeatures = FEX::FetchHostFeatures(TestHeaderData->Bitness == 64); HostFeatures.IsInstCountCI = true; CTX = FEXCore::Context::Context::CreateNewContext(HostFeatures); } diff --git a/Source/Tools/CommonTools/HarnessHelpers.h b/Source/Tools/CommonTools/HarnessHelpers.h index 47a45d305f..233551f4be 100644 --- a/Source/Tools/CommonTools/HarnessHelpers.h +++ b/Source/Tools/CommonTools/HarnessHelpers.h @@ -322,6 +322,12 @@ class ConfigLoader final { FEATURE_FSGSBASE = (1 << 22), FEATURE_EMMI = (1 << 23), FEATURE_AVX_VNNI = (1 << 24), + FEATURE_SERIALIZE = (1 << 25), + FEATURE_AVX_NE_CONVERT = (1 << 26), + FEATURE_AVX_VNNI_INT8 = (1 << 27), + FEATURE_AVX_VNNI_INT16 = (1 << 28), + FEATURE_AVX_IFMA = (1 << 29), + FEATURE_SHA512 = (1 << 30), }; bool Requires3DNow() const { @@ -399,6 +405,24 @@ class ConfigLoader final { bool RequiresAVXVNNI() const { return BaseConfig.OptionHostFeatures & HostFeatures::FEATURE_AVX_VNNI; } + bool RequiresSerialize() const { + return BaseConfig.OptionHostFeatures & HostFeatures::FEATURE_SERIALIZE; + } + bool RequiresAVXNEConvert() const { + return BaseConfig.OptionHostFeatures & HostFeatures::FEATURE_AVX_NE_CONVERT; + } + bool RequiresAVXVNNIINT8() const { + return BaseConfig.OptionHostFeatures & HostFeatures::FEATURE_AVX_VNNI_INT8; + } + bool RequiresAVXVNNIINT16() const { + return BaseConfig.OptionHostFeatures & HostFeatures::FEATURE_AVX_VNNI_INT16; + } + bool RequiresAVXIFMA() const { + return BaseConfig.OptionHostFeatures & HostFeatures::FEATURE_AVX_IFMA; + } + bool RequiresSHA512() const { + return BaseConfig.OptionHostFeatures & HostFeatures::FEATURE_SHA512; + } private: FEX_CONFIG_OPT(ConfigDumpGPRs, DUMPGPRS); @@ -609,6 +633,24 @@ class HarnessCodeLoader final : public FEX::CodeLoader { bool RequiresAVXVNNI() const { return Config.RequiresAVXVNNI(); } + bool RequiresSerialize() const { + return Config.RequiresSerialize(); + } + bool RequiresAVXNEConvert() const { + return Config.RequiresAVXNEConvert(); + } + bool RequiresAVXVNNIINT8() const { + return Config.RequiresAVXVNNIINT8(); + } + bool RequiresAVXVNNIINT16() const { + return Config.RequiresAVXVNNIINT16(); + } + bool RequiresAVXIFMA() const { + return Config.RequiresAVXIFMA(); + } + bool RequiresSHA512() const { + return Config.RequiresSHA512(); + } private: constexpr static uint64_t STACK_OFFSET = 0xc000'0000; diff --git a/Source/Tools/FEXConfig/Main.cpp b/Source/Tools/FEXConfig/Main.cpp index 055cfbbe93..567fdc5d1e 100644 --- a/Source/Tools/FEXConfig/Main.cpp +++ b/Source/Tools/FEXConfig/Main.cpp @@ -107,7 +107,7 @@ void ConfigModel::erase(const QString& Name) { bool ConfigModel::getBool(const QString& Name, bool) const { auto ret = LoadedConfig->Get(NameToConfigLookup.at(Name.toStdString())); if (!ret || !*ret) { - throw std::runtime_error("Could not find setting"); + ERROR_AND_DIE_FMT("Could not find setting"); } return **ret == "1"; } @@ -139,7 +139,7 @@ void ConfigModel::setInt(const QString& Name, int Value) { QString ConfigModel::getString(const QString& Name, bool) const { auto ret = LoadedConfig->Get(NameToConfigLookup.at(Name.toStdString())); if (!ret || !*ret) { - throw std::runtime_error("Could not find setting"); + ERROR_AND_DIE_FMT("Could not find setting"); } return QString::fromUtf8((*ret)->c_str()); } @@ -159,12 +159,12 @@ QStringList ConfigModel::getStringList(const QString& Name, bool) const { int ConfigModel::getInt(const QString& Name, bool) const { auto ret = LoadedConfig->Get(NameToConfigLookup.at(Name.toStdString())); if (!ret || !*ret) { - throw std::runtime_error("Could not find setting"); + ERROR_AND_DIE_FMT("Could not find setting"); } int value; auto res = std::from_chars(&*(*ret)->begin(), &*(*ret)->end(), value); if (res.ptr != &*(*ret)->end()) { - throw std::runtime_error("Could not parse integer"); + ERROR_AND_DIE_FMT("Could not parse integer"); } return value; } diff --git a/Source/Tools/FEXInterpreter/CMakeLists.txt b/Source/Tools/FEXInterpreter/CMakeLists.txt index c2af587a54..9e15947ae1 100644 --- a/Source/Tools/FEXInterpreter/CMakeLists.txt +++ b/Source/Tools/FEXInterpreter/CMakeLists.txt @@ -1,5 +1,5 @@ list(APPEND LIBS FEXCore Common JemallocLibs LinuxEmulation - CommonTools ${PTHREAD_LIB} fmt::fmt) + CommonTools Threads::Threads fmt::fmt) set(DEFINES) if (ENABLE_VIXL_SIMULATOR) diff --git a/Source/Tools/FEXInterpreter/FEXInterpreter.cpp b/Source/Tools/FEXInterpreter/FEXInterpreter.cpp index 52bdba1e69..73b0bb9220 100644 --- a/Source/Tools/FEXInterpreter/FEXInterpreter.cpp +++ b/Source/Tools/FEXInterpreter/FEXInterpreter.cpp @@ -550,10 +550,10 @@ int main(int argc, char** argv, char** const envp) { bool SupportsSVE256 {}; fextl::unique_ptr CTX; { - auto HostFeatures = FEX::FetchHostFeatures(); + auto HostFeatures = FEX::FetchHostFeatures(Loader.Is64BitMode()); CTX = FEXCore::Context::Context::CreateNewContext(HostFeatures); - SupportsAVX = HostFeatures.SupportsAVX; - SupportsSVE256 = HostFeatures.SupportsSVE256; + SupportsAVX = HostFeatures.SupportsAVX(); + SupportsSVE256 = HostFeatures.SupportsSVE256(); } FEX::Kernel::Init(Loader.Is64BitMode(), CTX.get()); diff --git a/Source/Tools/FEXOfflineCompiler/CMakeLists.txt b/Source/Tools/FEXOfflineCompiler/CMakeLists.txt index 5ce74795d7..a1c7868659 100644 --- a/Source/Tools/FEXOfflineCompiler/CMakeLists.txt +++ b/Source/Tools/FEXOfflineCompiler/CMakeLists.txt @@ -10,9 +10,11 @@ target_link_libraries(FEXOfflineCompiler PRIVATE if (MINGW) if (ARCHITECTURE_arm64ec) - set_target_properties(FEXOfflineCompiler PROPERTIES OUTPUT_NAME "FEXOfflineCompiler64") + set_target_properties(FEXOfflineCompiler PROPERTIES OUTPUT_NAME + "FEXOfflineCompiler64") else() - set_target_properties(FEXOfflineCompiler PROPERTIES OUTPUT_NAME "FEXOfflineCompiler32") + set_target_properties(FEXOfflineCompiler PROPERTIES OUTPUT_NAME + "FEXOfflineCompiler32") endif() patch_library_wine(FEXOfflineCompiler) target_include_directories(FEXOfflineCompiler PRIVATE @@ -22,7 +24,7 @@ if (MINGW) ) target_link_libraries(FEXOfflineCompiler PRIVATE CommonWindows ntdll_ex) else() - target_link_libraries(FEXOfflineCompiler PRIVATE ${PTHREAD_LIB} LinuxEmulation) + target_link_libraries(FEXOfflineCompiler PRIVATE Threads::Threads LinuxEmulation) endif() LinkerGC(FEXOfflineCompiler) diff --git a/Source/Tools/FEXOfflineCompiler/Main.cpp b/Source/Tools/FEXOfflineCompiler/Main.cpp index 484aeb8c72..e28a295d01 100644 --- a/Source/Tools/FEXOfflineCompiler/Main.cpp +++ b/Source/Tools/FEXOfflineCompiler/Main.cpp @@ -410,7 +410,7 @@ static std::optional GenerateSingleCache(FEXCore::ExecutableFileInf // Load HostFeatures #ifndef _WIN32 - auto HostFeatures = FEX::FetchHostFeatures(); + auto HostFeatures = FEX::FetchHostFeatures(Is64Bit); #else const auto NtDll = GetModuleHandleW(L"ntdll.dll"); const bool IsWine = !!GetProcAddress(NtDll, "wine_get_version"); @@ -597,7 +597,7 @@ static int GenerateCache(int argc, const char** argv) { } if (!Data.contains(ProgramName)) { - throw std::runtime_error(fmt::format("Input code map {} did not contain {} ({:016x})", CodeMapPath, ProgramName.Filename, ProgramName.FileId)); + ERROR_AND_DIE_FMT("Input code map {} did not contain {} ({:016x})", CodeMapPath, ProgramName.Filename, ProgramName.FileId); } fextl::string OutDir(Options.get("outdir")); diff --git a/Source/Tools/FEXRootFSFetcher/CMakeLists.txt b/Source/Tools/FEXRootFSFetcher/CMakeLists.txt index 156db96754..f70473bbb3 100644 --- a/Source/Tools/FEXRootFSFetcher/CMakeLists.txt +++ b/Source/Tools/FEXRootFSFetcher/CMakeLists.txt @@ -1,5 +1,5 @@ add_executable(FEXRootFSFetcher Main.cpp XXFileHash.cpp) -list(APPEND LIBS FEXCore Common JemallocDummy xxHash::xxhash ${PTHREAD_LIB}) +list(APPEND LIBS FEXCore Common JemallocDummy xxHash::xxhash Threads::Threads) LinkerGC(FEXRootFSFetcher) diff --git a/Source/Tools/FEXRootFSFetcher/Main.cpp b/Source/Tools/FEXRootFSFetcher/Main.cpp index 6928fb193c..0acf3becc8 100644 --- a/Source/Tools/FEXRootFSFetcher/Main.cpp +++ b/Source/Tools/FEXRootFSFetcher/Main.cpp @@ -2,6 +2,7 @@ #include #include #include +#include #include "Common/cpp-optparse/OptionParser.h" #include "Common/JSONPool.h" @@ -1050,6 +1051,11 @@ bool ValidateDownloadSelection(const WebFileFetcher::FileTargets& Target) { namespace ConfigSetter { void SetRootFSAsDefault(const fextl::string& RootFS) { + // Create config diectory. + if (!FHU::Filesystem::CreateDirectories(FEXCore::Config::GetConfigDirectory(false))) { + ExecWithInfo(fextl::fmt::format("Failed to create config directory: {}", FEXCore::Config::GetConfigDirectory(false))); + } + fextl::string Filename = FEXCore::Config::GetConfigFileLocation(); auto LoadedConfig = FEX::Config::CreateMainLayer(&Filename); LoadedConfig->Load(); @@ -1146,6 +1152,12 @@ int main(int argc, char** argv, char** const envp) { } FEX_CONFIG_OPT(LDPath, ROOTFS); + const fextl::string RootFSPath = FEXCore::Config::GetDataDirectory() + "RootFS/"; + + // Create the rootfs path as early as possible. + if (!FHU::Filesystem::CreateDirectories(RootFSPath)) { + ExecWithInfo(fextl::fmt::format("Failed to create RootFS directory: {}", RootFSPath)); + } std::error_code ec; fextl::string Question {}; @@ -1172,9 +1184,8 @@ int main(int argc, char** argv, char** const envp) { int32_t DistroIndex = AskForDistroSelection(Targets); if (DistroIndex != -1) { const auto& Target = Targets[DistroIndex]; - fextl::string RootFS = FEXCore::Config::GetDataDirectory() + "RootFS/"; auto filename = Target.URL.substr(Target.URL.find_last_of('/') + 1); - auto PathName = RootFS + filename; + auto PathName = RootFSPath + filename; if (!ValidateCheckExists(Target)) { // Keep going @@ -1295,7 +1306,7 @@ int main(int argc, char** argv, char** const envp) { if (UseImageAs == ArgOptions::CompressedImageOption::OPTION_EXTRACT) { auto FolderName = filename.substr(0, filename.find_last_of('.')); - if (ExtractHelper(RootFS, PathName, FolderName)) { + if (ExtractHelper(RootFSPath, PathName, FolderName)) { // Remove the image file suffix since we extracted to that. filename = std::move(FolderName); } diff --git a/Source/Tools/FEXServer/CMakeLists.txt b/Source/Tools/FEXServer/CMakeLists.txt index 1abc2a4d7c..bcb9ad067a 100644 --- a/Source/Tools/FEXServer/CMakeLists.txt +++ b/Source/Tools/FEXServer/CMakeLists.txt @@ -8,7 +8,7 @@ add_executable(FEXServer target_include_directories(FEXServer PRIVATE ${CMAKE_BINARY_DIR}/generated) -target_link_libraries(FEXServer PRIVATE FEXCore Common CommonTools JemallocDummy ${PTHREAD_LIB}) +target_link_libraries(FEXServer PRIVATE FEXCore Common CommonTools JemallocDummy Threads::Threads) LinkerGC(FEXServer) diff --git a/Source/Tools/LinuxEmulation/LinuxSyscalls/EmulatedFiles/EmulatedFiles.cpp b/Source/Tools/LinuxEmulation/LinuxSyscalls/EmulatedFiles/EmulatedFiles.cpp index 4fec3bf97e..83e90c27e9 100644 --- a/Source/Tools/LinuxEmulation/LinuxSyscalls/EmulatedFiles/EmulatedFiles.cpp +++ b/Source/Tools/LinuxEmulation/LinuxSyscalls/EmulatedFiles/EmulatedFiles.cpp @@ -359,6 +359,7 @@ static fextl::string GenerateCPUInfo(FEXCore::Context::Context* ctx, uint32_t CP add_flag_if(res_d_1.eax & (1 << 3), "xsaves"); add_flag_if(res_d_1.eax & (1 << 4), "xfd"); + add_flag_if(res_7_1.eax & (1 << 0), "sha512"); add_flag_if(res_7_1.eax & (1 << 4), "avx_vnni"); add_flag_if(res_7_1.eax & (1 << 5), "avx512_bf16"); add_flag_if(res_7_1.eax & (1 << 23), "avx_ifma"); diff --git a/Source/Tools/LinuxEmulation/LinuxSyscalls/SignalDelegator.cpp b/Source/Tools/LinuxEmulation/LinuxSyscalls/SignalDelegator.cpp index 6d6c899f7e..b4c7b24b37 100644 --- a/Source/Tools/LinuxEmulation/LinuxSyscalls/SignalDelegator.cpp +++ b/Source/Tools/LinuxEmulation/LinuxSyscalls/SignalDelegator.cpp @@ -400,6 +400,20 @@ bool SignalDelegator::HandleDispatcherGuestSignal(FEXCore::Core::InternalThreadS // Set our state register to point to our guest thread data ArchHelpers::Context::SetState(ucontext, reinterpret_cast(Frame)); + if (GuestAction->sa_flags & SA_RESETHAND) { + + { + // If SA_RESETHAND is set, then the signal handler is immediately reset to SIG_DFL. + std::lock_guard lk(GuestDelegatorMutex); + GuestAction->sigaction_handler.handler = SIG_DFL; + } + + // If this signal is not required by FEX then we can fully uninstall the host handler as well. + if (HostHandlers[Signal].Required.load(std::memory_order_relaxed) != true) { + UninstallHostHandler(Signal); + } + } + return true; } @@ -586,6 +600,11 @@ bool SignalDelegator::HandleFrontendSIGSEGV(FEXCore::Core::InternalThreadState* } #endif + // If this fault is in the main thread stack guard region, we should try to grow the main thread stack. + if (SigInfo.si_code == SEGV_ACCERR && FEXCore::Allocator::TryGrowMainThreadStack(reinterpret_cast(SigInfo.si_addr))) { + return true; + } + return false; } diff --git a/Source/Tools/LinuxEmulation/LinuxSyscalls/SignalDelegator/GuestFramesManagement.cpp b/Source/Tools/LinuxEmulation/LinuxSyscalls/SignalDelegator/GuestFramesManagement.cpp index 2401fe496d..e3abbe6226 100644 --- a/Source/Tools/LinuxEmulation/LinuxSyscalls/SignalDelegator/GuestFramesManagement.cpp +++ b/Source/Tools/LinuxEmulation/LinuxSyscalls/SignalDelegator/GuestFramesManagement.cpp @@ -438,7 +438,11 @@ uint64_t SignalDelegator::SetupFrame_x64(FEXCore::Core::InternalThreadState* Thr // Overwrite si_code and si_addr guest_siginfo->si_code = Thread->CurrentFrame->SynchronousFaultData.si_code; - guest_siginfo->si_addr = reinterpret_cast(ContextBackup->OriginalRIP); + if (Frame->SynchronousFaultData.FaultAddress) { + guest_siginfo->si_addr = reinterpret_cast(Frame->SynchronousFaultData.FaultAddress); + } else { + guest_siginfo->si_addr = reinterpret_cast(ContextBackup->OriginalRIP); + } Signal = Frame->SynchronousFaultData.Signal; } else { guest_uctx->uc_mcontext.gregs[FEXCore::x86_64::FEX_REG_TRAPNO] = ConvertSignalToTrapNo(Signal, HostSigInfo); @@ -795,7 +799,14 @@ uint64_t SignalDelegator::SetupRTFrame_ia32(FEXCore::Core::InternalThreadState* case SigInfoLayout::LAYOUT_FAULT_RIP: // Macro expansion to get the si_addr // Can't really give a real result here. Pull from the context for now - guest_uctx->info._sifields._sigfault.addr = ContextBackup->OriginalRIP; + if (ContextBackup->FaultToTopAndGeneratedException && Frame->SynchronousFaultData.FaultAddress && + Frame->SynchronousFaultData.Signal == FEXCore::Core::FAULT_SIGSEGV && + Frame->SynchronousFaultData.TrapNo == FEXCore::X86State::X86_TRAPNO_PF) { + // Edge case for a synchronous fault due to partial instruction decode. + guest_uctx->info._sifields._sigfault.addr = static_cast(Frame->SynchronousFaultData.FaultAddress); + } else { + guest_uctx->info._sifields._sigfault.addr = ContextBackup->OriginalRIP; + } break; case SigInfoLayout::LAYOUT_CHLD: guest_uctx->info._sifields._sigchld.pid = HostSigInfo->si_pid; diff --git a/Source/Tools/LinuxEmulation/LinuxSyscalls/Syscalls.h b/Source/Tools/LinuxEmulation/LinuxSyscalls/Syscalls.h index 4721fc3b20..d720866674 100644 --- a/Source/Tools/LinuxEmulation/LinuxSyscalls/Syscalls.h +++ b/Source/Tools/LinuxEmulation/LinuxSyscalls/Syscalls.h @@ -408,6 +408,10 @@ class SyscallHandler : public FEXCore::HLE::SyscallHandler, if (Result == 0) return -errno; \ return Result; \ } while (0) +#define SYSCALL_EFAULT_IF_NULL(Ptr) \ + do { \ + if ((Ptr) == nullptr) return -EFAULT; \ + } while (0) extern FEX::HLE::SyscallHandler* _SyscallHandler; diff --git a/Source/Tools/LinuxEmulation/LinuxSyscalls/Syscalls/Thread.cpp b/Source/Tools/LinuxEmulation/LinuxSyscalls/Syscalls/Thread.cpp index 0a51b98a31..4ea460aca7 100644 --- a/Source/Tools/LinuxEmulation/LinuxSyscalls/Syscalls/Thread.cpp +++ b/Source/Tools/LinuxEmulation/LinuxSyscalls/Syscalls/Thread.cpp @@ -546,11 +546,16 @@ void RegisterThread(FEX::HLE::SyscallHandler* Handler) { Result = -EINVAL; // We don't support CET, return EINVAL break; case 0x1011: // ARCH_GET_CPUID - return 1; - break; - case 0x1012: // ARCH_SET_CPUID - return -ENODEV; // Claim we don't support faulting on CPUID - break; + return (Frame->State.CoreFlags & FEXCore::Core::CoreFlagsEnum::CPUID_ENABLED) == FEXCore::Core::CoreFlagsEnum::CPUID_ENABLED ? 1 : 0; + case 0x1012: // ARCH_SET_CPUID + if (addr == 0) { + // Disable CPUID (thus enabling CPUID faulting) + Frame->State.CoreFlags = Frame->State.CoreFlags & ~FEXCore::Core::CoreFlagsEnum::CPUID_ENABLED; + } else { + // Enable CPUID (thus disabling CPUID faulting) + Frame->State.CoreFlags = Frame->State.CoreFlags | FEXCore::Core::CoreFlagsEnum::CPUID_ENABLED; + } + return 0; default: LogMan::Msg::EFmt("Unknown prctl: 0x{:x}", code); Result = -EINVAL; diff --git a/Source/Tools/LinuxEmulation/LinuxSyscalls/x32/FD.cpp b/Source/Tools/LinuxEmulation/LinuxSyscalls/x32/FD.cpp index c5dad94e5b..361bfbec16 100644 --- a/Source/Tools/LinuxEmulation/LinuxSyscalls/x32/FD.cpp +++ b/Source/Tools/LinuxEmulation/LinuxSyscalls/x32/FD.cpp @@ -315,6 +315,7 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { if (host_stat.st_nlink > std::numeric_limitsst_nlink)>::max()) { return -EOVERFLOW; } + SYSCALL_EFAULT_IF_NULL(buf); FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; @@ -332,6 +333,7 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { if (host_stat.st_nlink > std::numeric_limitsst_nlink)>::max()) { return -EOVERFLOW; } + SYSCALL_EFAULT_IF_NULL(buf); FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; @@ -349,6 +351,7 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { if (host_stat.st_nlink > std::numeric_limitsst_nlink)>::max()) { return -EOVERFLOW; } + SYSCALL_EFAULT_IF_NULL(buf); FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; @@ -360,6 +363,7 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { struct stat host_stat; uint64_t Result = FEX::HLE::_SyscallHandler->FM.Stat(pathname, &host_stat); if (Result != -1) { + SYSCALL_EFAULT_IF_NULL(buf); FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; } @@ -370,6 +374,7 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { struct stat host_stat; uint64_t Result = ::fstat(fd, &host_stat); if (Result != -1) { + SYSCALL_EFAULT_IF_NULL(buf); FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; } @@ -380,6 +385,7 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { struct stat host_stat; uint64_t Result = FEX::HLE::_SyscallHandler->FM.Lstat(path, &host_stat); if (Result != -1) { + SYSCALL_EFAULT_IF_NULL(buf); FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; } @@ -390,6 +396,7 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { struct stat host_stat; uint64_t Result = FEX::HLE::_SyscallHandler->FM.Stat(pathname, &host_stat); if (Result != -1) { + SYSCALL_EFAULT_IF_NULL(buf); FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; } @@ -401,6 +408,7 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { uint64_t Result = FEX::HLE::_SyscallHandler->FM.Lstat(path, &host_stat); if (Result != -1) { + SYSCALL_EFAULT_IF_NULL(buf); FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; } @@ -411,6 +419,7 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { struct stat64 host_stat; uint64_t Result = ::fstat64(fd, &host_stat); if (Result != -1) { + SYSCALL_EFAULT_IF_NULL(buf); FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; } @@ -421,6 +430,7 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { struct statfs host_stat; uint64_t Result = FEX::HLE::_SyscallHandler->FM.Statfs(path, &host_stat); if (Result != -1) { + SYSCALL_EFAULT_IF_NULL(buf); FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; } @@ -431,6 +441,7 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { struct statfs host_stat; uint64_t Result = ::fstatfs(fd, &host_stat); if (Result != -1) { + SYSCALL_EFAULT_IF_NULL(buf); FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; } @@ -443,6 +454,7 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { struct statfs64 host_stat; uint64_t Result = ::fstatfs64(fd, &host_stat); if (Result != -1) { + SYSCALL_EFAULT_IF_NULL(buf); FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; } @@ -455,6 +467,7 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { struct statfs host_stat; uint64_t Result = FEX::HLE::_SyscallHandler->FM.Statfs(path, &host_stat); if (Result != -1) { + SYSCALL_EFAULT_IF_NULL(buf); FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; } @@ -564,6 +577,7 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { struct stat64 host_stat; uint64_t Result = FEX::HLE::_SyscallHandler->FM.NewFSStatAt64(dirfd, pathname, &host_stat, flag); if (Result != -1) { + SYSCALL_EFAULT_IF_NULL(buf); FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; } diff --git a/Source/Tools/LinuxEmulation/LinuxSyscalls/x64/FD.cpp b/Source/Tools/LinuxEmulation/LinuxSyscalls/x64/FD.cpp index 703c875f70..91b5a103d6 100644 --- a/Source/Tools/LinuxEmulation/LinuxSyscalls/x64/FD.cpp +++ b/Source/Tools/LinuxEmulation/LinuxSyscalls/x64/FD.cpp @@ -63,32 +63,37 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { }); REGISTER_SYSCALL_IMPL_X64(stat, [](FEXCore::Core::CpuStateFrame* Frame, const char* pathname, FEX::HLE::x64::guest_stat* buf) -> uint64_t { + SYSCALL_EFAULT_IF_NULL(pathname); FaultSafeUserMemAccess::VerifyIsStringReadableMaxSize(pathname, PATH_MAX); - FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); struct stat host_stat; uint64_t Result = FEX::HLE::_SyscallHandler->FM.Stat(pathname, &host_stat); if (Result != -1) { + SYSCALL_EFAULT_IF_NULL(buf); + FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; } SYSCALL_ERRNO(); }); REGISTER_SYSCALL_IMPL_X64(fstat, [](FEXCore::Core::CpuStateFrame* Frame, int fd, FEX::HLE::x64::guest_stat* buf) -> uint64_t { - FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); struct stat host_stat; uint64_t Result = ::fstat(fd, &host_stat); if (Result != -1) { + SYSCALL_EFAULT_IF_NULL(buf); + FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; } SYSCALL_ERRNO(); }); REGISTER_SYSCALL_IMPL_X64(lstat, [](FEXCore::Core::CpuStateFrame* Frame, const char* path, FEX::HLE::x64::guest_stat* buf) -> uint64_t { + SYSCALL_EFAULT_IF_NULL(path); FaultSafeUserMemAccess::VerifyIsStringReadableMaxSize(path, PATH_MAX); - FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); struct stat host_stat; uint64_t Result = FEX::HLE::_SyscallHandler->FM.Lstat(path, &host_stat); if (Result != -1) { + SYSCALL_EFAULT_IF_NULL(buf); + FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; } SYSCALL_ERRNO(); @@ -96,11 +101,13 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { REGISTER_SYSCALL_IMPL_X64( newfstatat, [](FEXCore::Core::CpuStateFrame* Frame, int dirfd, const char* pathname, FEX::HLE::x64::guest_stat* buf, int flag) -> uint64_t { + SYSCALL_EFAULT_IF_NULL(pathname); FaultSafeUserMemAccess::VerifyIsStringReadableMaxSize(pathname, PATH_MAX); - FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); struct stat host_stat; uint64_t Result = FEX::HLE::_SyscallHandler->FM.NewFSStatAt(dirfd, pathname, &host_stat, flag); if (Result != -1) { + SYSCALL_EFAULT_IF_NULL(buf); + FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); *buf = host_stat; } SYSCALL_ERRNO(); @@ -133,8 +140,8 @@ void RegisterFD(FEX::HLE::SyscallHandler* Handler) { }); REGISTER_SYSCALL_IMPL_X64(statfs, [](FEXCore::Core::CpuStateFrame* Frame, const char* path, struct statfs* buf) -> uint64_t { + SYSCALL_EFAULT_IF_NULL(path); FaultSafeUserMemAccess::VerifyIsStringReadableMaxSize(path, PATH_MAX); - FaultSafeUserMemAccess::VerifyIsWritable(buf, sizeof(*buf)); uint64_t Result = FEX::HLE::_SyscallHandler->FM.Statfs(path, buf); SYSCALL_ERRNO(); }); diff --git a/Source/Tools/TestHarnessRunner/CMakeLists.txt b/Source/Tools/TestHarnessRunner/CMakeLists.txt index 0cdc9925dc..ed1f271dce 100644 --- a/Source/Tools/TestHarnessRunner/CMakeLists.txt +++ b/Source/Tools/TestHarnessRunner/CMakeLists.txt @@ -1,4 +1,4 @@ -list(APPEND LIBS FEXCore Common JemallocLibs ${PTHREAD_LIB}) +list(APPEND LIBS FEXCore Common JemallocLibs Threads::Threads) set(SRCS TestHarnessRunner.cpp) if (NOT MINGW) diff --git a/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp b/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp index 94742a1b13..8f8a09e2be 100644 --- a/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp +++ b/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp @@ -18,6 +18,7 @@ desc: Used to run Assembly tests #endif #include "Common/HostFeatures.h" +#include "Common/X86Features.h" #include "Common/Linux/SBRKAllocations.h" #include "HarnessHelpers.h" #include "TestHarnessRunner/HostRunner.h" @@ -44,9 +45,6 @@ desc: Used to run Assembly tests #include #include -#ifdef ARCHITECTURE_x86_64 -#include "Common/X86Features.h" -#endif void MsgHandler(LogMan::DebugLevels Level, const char* Message) { fextl::fmt::print("{} {}\n", LogMan::DebugLevelStr(Level), Message); @@ -245,11 +243,11 @@ int main(int argc, char** argv, char** const envp) { bool SupportsAVX = false; FEXCore::Core::CPUState State; - auto HostFeatures = FEX::FetchHostFeatures(); + auto HostFeatures = FEX::FetchHostFeatures(Loader.Is64BitMode()); auto CTX = FEXCore::Context::Context::CreateNewContext(HostFeatures); #ifndef _WIN32 - auto SignalDelegation = FEX::HLE::CreateSignalDelegator(CTX.get(), {}, HostFeatures.SupportsAVX, HostFeatures.SupportsSVE256); + auto SignalDelegation = FEX::HLE::CreateSignalDelegator(CTX.get(), {}, HostFeatures.SupportsAVX(), HostFeatures.SupportsSVE256()); #else // Enable exit on HLT while Wine's longjump is broken. // @@ -259,20 +257,30 @@ int main(int argc, char** argv, char** const envp) { #endif // Skip any tests that the host doesn't support features for - SupportsAVX = HostFeatures.SupportsAVX; + SupportsAVX = HostFeatures.SupportsAVX(); bool TestUnsupported = (!SupportsAVX && Loader.RequiresAVX()) || (!HostFeatures.SupportsRAND && Loader.RequiresRAND()) || (!HostFeatures.SupportsSHA && Loader.RequiresSHA()) || (!HostFeatures.SupportsCLZERO && Loader.RequiresCLZERO()) || (!HostFeatures.SupportsAES256 && Loader.RequiresAES256()) || (!HostFeatures.SupportsAFP && Loader.RequiresAFP()); - + TestUnsupported |= !HostFeatures.SupportsBF16 && Loader.RequiresAVXNEConvert(); bool IsHostRunner = false; #if !defined(VIXL_SIMULATOR) && defined(ARCHITECTURE_x86_64) IsHostRunner = true; - ///< Features that are only unsupported when running using the HostRunner and the CI machine doesn't support the feature getting tested. FEX::X86::Features Feature {}; - const bool Supports3DNow = Feature.Feat_3dnow; + const bool SupportsSSE4A = Feature.Feat_sse4a; + + // Hostrunner doesn't support EMMI while FEX does. CPUID doesn't have a query bit. + TestUnsupported |= Loader.RequiresEMMI(); +#else + FEX::X86::Features Feature {CTX.get()}; + + // Override features that FEX default disables. + const bool SupportsSSE4A = true; +#endif + + const bool Supports3DNow = Feature.Feat_3dnow; const bool SupportsBMI1 = Feature.Feat_bmi1; const bool SupportsBMI2 = Feature.Feat_bmi2; const bool SupportsCLWB = Feature.Feat_clwb; @@ -288,6 +296,12 @@ int main(int argc, char** argv, char** const envp) { const bool SupportsCLFLOPT = Feature.Feat_clflopt; const bool SupportsFSGSBase = Feature.Feat_fsgsbase; const bool SupportsAVXVNNI = Feature.Feat_avx_vnni; + const bool SupportsSerialize = Feature.Feat_serialize; + const bool SupportsAVXNEConvert = Feature.Feat_avx_ne_convert; + const bool SupportsSHA512 = Feature.Feat_sha512; + const bool SupportsAVXIFMA = Feature.Feat_avx_ifma; + const bool SupportsAVXVNNIINT8 = Feature.Feat_avx_vnni_int8; + const bool SupportsAVXVNNIINT16 = Feature.Feat_avx_vnni_int16; TestUnsupported |= (!Supports3DNow && Loader.Requires3DNow()) || (!SupportsSSE4A && Loader.RequiresSSE4A()) || (!SupportsBMI1 && Loader.RequiresBMI1()) || @@ -295,9 +309,14 @@ int main(int argc, char** argv, char** const envp) { (!SupportsSSE4_1 && Loader.RequiresSSE4_1()) || (!SupportsSSE4_2 && Loader.RequiresSSE4_2()) || (!SupportsAES && Loader.RequiresAES()) || (!SupportsPCLMUL && Loader.RequiresPCLMUL()) || (!SupportsMOVBE && Loader.RequiresMOVBE()) || (!SupportsADX && Loader.RequiresADX()) || (!SupportsXSAVE && Loader.RequiresXSAVE()) || (!SupportsRDPID && Loader.RequiresRDPID()) || - (!SupportsCLFLOPT && Loader.RequiresCLFLOPT()) || (!SupportsFSGSBase && Loader.RequiresFSGSBase()) || Loader.RequiresEMMI(); + (!SupportsCLFLOPT && Loader.RequiresCLFLOPT()) || (!SupportsFSGSBase && Loader.RequiresFSGSBase()); TestUnsupported |= !SupportsAVXVNNI && Loader.RequiresAVXVNNI(); -#endif + TestUnsupported |= !SupportsSerialize && Loader.RequiresSerialize(); + TestUnsupported |= !SupportsAVXNEConvert && Loader.RequiresAVXNEConvert(); + TestUnsupported |= !SupportsSHA512 && Loader.RequiresSHA512(); + TestUnsupported |= !SupportsAVXIFMA && Loader.RequiresAVXIFMA(); + TestUnsupported |= !SupportsAVXVNNIINT8 && Loader.RequiresAVXVNNIINT8(); + TestUnsupported |= !SupportsAVXVNNIINT16 && Loader.RequiresAVXVNNIINT16(); #ifdef _WIN32 TestUnsupported |= Loader.RequiresLinux(); diff --git a/Source/Tools/TestHarnessRunner/TestHarnessRunner/HostRunner.cpp b/Source/Tools/TestHarnessRunner/TestHarnessRunner/HostRunner.cpp index be5a1b6878..ba739afd53 100644 --- a/Source/Tools/TestHarnessRunner/TestHarnessRunner/HostRunner.cpp +++ b/Source/Tools/TestHarnessRunner/TestHarnessRunner/HostRunner.cpp @@ -221,8 +221,10 @@ class x86HostRunner final { } void Dispatch(uint64_t InitialRip) { +#if !defined(VIXL_SIMULATOR) && defined(ARCHITECTURE_x86_64) FEX::X86::Features Feature {}; Dispatcher(InitialRip, &ReturningStackLocation, CodeSegmentEntry, Feature.Feat_fsgsbase); +#endif } private: diff --git a/Source/Windows/ARM64EC/Module.S b/Source/Windows/ARM64EC/Module.S index 2489e653cc..ce36c1d688 100644 --- a/Source/Windows/ARM64EC/Module.S +++ b/Source/Windows/ARM64EC/Module.S @@ -158,9 +158,9 @@ DIRECT_SYSCALL_WRAPPER("#NtProtectVirtualMemoryNative", WineNtProtectVirtualMemo subs x16, x11, x9 b.lo end adrp x17, NtDllRedirectionLUTSize - ldr x17, [x17, #:lo12:NtDllRedirectionLUTSize] + ldr w17, [x17, #:lo12:NtDllRedirectionLUTSize] cmp x16, x17 - b.hi end + b.hs end adrp x17, NtDllRedirectionLUT ldr x17, [x17, #:lo12:NtDllRedirectionLUT] ldr w11, [x17, x16, lsl #2] diff --git a/Source/Windows/ARM64EC/Module.cpp b/Source/Windows/ARM64EC/Module.cpp index 633f252c34..167ae27770 100644 --- a/Source/Windows/ARM64EC/Module.cpp +++ b/Source/Windows/ARM64EC/Module.cpp @@ -450,6 +450,67 @@ static void LoadStateFromECContext(FEXCore::Core::InternalThreadState* Thread, C State.flags[FEXCore::X86State::X87FLAG_TOP_LOC] = (Context.FltSave.StatusWord >> 11) & 0b111; State.AbridgedFTW = Context.FltSave.TagWord; } + + // TODO: These are super incorrect for debug registers. + if constexpr (false) { + if ((Context.ContextFlags & CONTEXT_DEBUG_REGISTERS) == CONTEXT_DEBUG_REGISTERS) { + // If any of the debug register state changed then we need to invalidate. + const bool Dr0Changed = (Context.Dr0 != State.Dr[0]) || ((Context.Dr7 ^ State.Dr7) & ((0b1111 << 16) | (0b11 << 0))); + const bool Dr1Changed = (Context.Dr1 != State.Dr[1]) || ((Context.Dr7 ^ State.Dr7) & ((0b1111 << 20) | (0b11 << 2))); + const bool Dr2Changed = (Context.Dr2 != State.Dr[2]) || ((Context.Dr7 ^ State.Dr7) & ((0b1111 << 24) | (0b11 << 4))); + const bool Dr3Changed = (Context.Dr3 != State.Dr[3]) || ((Context.Dr7 ^ State.Dr7) & ((0b1111 << 28) | (0b11 << 6))); + + if (Dr0Changed || Dr1Changed || Dr2Changed || Dr3Changed) { + std::scoped_lock Lock(ThreadCreationMutex); + // Need to clear both context and state addresses if changed. + // Only if the BP type was instruction class. + if (Dr0Changed) { + if (Context.Dr0 && ((Context.Dr7 >> 16) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(Context.Dr0, 8, false); + } + + if (State.Dr[0] && ((State.Dr7 >> 16) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(State.Dr[0], 8, false); + } + } + if (Dr1Changed) { + if (Context.Dr1 && ((Context.Dr7 >> 20) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(Context.Dr1, 8, false); + } + + if (State.Dr[1] && ((State.Dr7 >> 20) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(State.Dr[1], 8, false); + } + } + if (Dr2Changed) { + if (Context.Dr2 && ((Context.Dr7 >> 24) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(Context.Dr2, 8, false); + } + + if (State.Dr[2] && ((State.Dr7 >> 24) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(State.Dr[2], 8, false); + } + } + if (Dr3Changed) { + if (Context.Dr3 && ((Context.Dr7 >> 28) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(Context.Dr3, 8, false); + } + + if (State.Dr[3] && ((State.Dr7 >> 28) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(State.Dr[3], 8, false); + } + } + } + + // Update context now that we have invalidated. + State.Dr[0] = Context.Dr0; + State.Dr[1] = Context.Dr1; + State.Dr[2] = Context.Dr2; + State.Dr[3] = Context.Dr3; + State.Dr6 = Context.Dr6; + State.Dr7 = Context.Dr7; + } + } } static void ReconstructThreadState(FEXCore::Core::InternalThreadState* Thread, ARM64_NT_CONTEXT& Context) { @@ -471,6 +532,16 @@ static void ReconstructThreadState(FEXCore::Core::InternalThreadState* Thread, A // Spill EFlags uint32_t EFlags = CTX->ReconstructCompactedEFLAGS(Thread, true, Context.X, Context.Cpsr); CTX->SetFlagsFromCompactedEFLAGS(Thread, EFlags); + + // TODO: These are super incorrect for debug registers. + if constexpr (false) { + State.Dr[0] = Context.Bvr[0]; + State.Dr[1] = Context.Bvr[1]; + State.Dr[2] = Context.Bvr[2]; + State.Dr[3] = Context.Bvr[3]; + State.Dr6 = Context.Bcr[0]; + State.Dr7 = Context.Bcr[1]; + } } // Reconstructs an x64 context from the input thread's state, packed into a regular ARM64 context following the ARM64EC register mapping @@ -539,20 +610,23 @@ static ARM64_NT_CONTEXT StoreStateToPackedECContext(FEXCore::Core::InternalThrea ECContext.Fpcr = FPCR; ECContext.Fpsr = FPSR; + // TODO: These are super incorrect for debug registers. + if constexpr (false) { + // Debug registers + ECContext.Bvr[0] = State.Dr[0]; + ECContext.Bvr[1] = State.Dr[1]; + ECContext.Bvr[2] = State.Dr[2]; + ECContext.Bvr[3] = State.Dr[3]; + ECContext.Bcr[0] = State.Dr6; + ECContext.Bcr[1] = State.Dr7; + } + return ECContext; } -static void RethrowGuestException(const EXCEPTION_RECORD& Rec, ARM64_NT_CONTEXT& Context) { - auto* Thread = GetCPUArea().ThreadState(); +static void RaiseException(FEXCore::Core::InternalThreadState* Thread, const EXCEPTION_RECORD& Rec, ARM64_NT_CONTEXT& GuestContext) { auto& Fault = Thread->CurrentFrame->SynchronousFaultData; - LogMan::Msg::DFmt("Reconstructing context"); - if (!IsDispatcherAddress(Context.Pc)) { - ReconstructThreadState(Thread, Context); - } - ARM64_NT_CONTEXT GuestContext = StoreStateToPackedECContext(Thread, Context.Fpcr, Context.Fpsr); - LogMan::Msg::DFmt("pc: {:X} rip: {:X}", Context.Pc, GuestContext.Pc); - // X64 Windows always clears TF, DF and AF when handling an exception, restoring after. // Current ARM64EC windows can only restore NZCV+SS when returning from an exception and other flags are left untouched from the handler context. // TODO: Can extend wine to support this by mapping the remaining EFlags into reserved cpsr members. @@ -572,6 +646,47 @@ static void RethrowGuestException(const EXCEPTION_RECORD& Rec, ARM64_NT_CONTEXT& NtRaiseExceptionNative(&GuestRec, &GuestContext, FirstChance); } +static void RethrowGuestException(FEXCore::Core::InternalThreadState* Thread, const EXCEPTION_RECORD& Rec, ARM64_NT_CONTEXT& HostContext) { + LogMan::Msg::DFmt("Reconstructing context"); + if (!IsDispatcherAddress(HostContext.Pc)) { + ReconstructThreadState(Thread, HostContext); + } + auto GuestContext = StoreStateToPackedECContext(Thread, HostContext.Fpcr, HostContext.Fpsr); + LogMan::Msg::DFmt("pc: {:X} rip: {:X}", HostContext.Pc, GuestContext.Pc); + + RaiseException(Thread, Rec, GuestContext); +} + +[[noreturn]] +static void SynchronousExceptionHandler(FEXCore::Context::Context* CTX, FEXCore::Core::CpuStateFrame* Frame) { + // Coming in to this function, the guest state is synchronized and the host thread is in a safe location. + auto Thread = Frame->Thread; + auto& Fault = Thread->CurrentFrame->SynchronousFaultData; + + uint64_t FPCR, FPSR; + __asm volatile("mrs %[fpcr], fpcr" : [fpcr] "=r"(FPCR)); + __asm volatile("mrs %[fpsr], fpsr" : [fpsr] "=r"(FPSR)); + + auto Context = StoreStateToPackedECContext(Thread, static_cast(FPCR), static_cast(FPSR)); + EXCEPTION_RECORD Record = {}; + + switch (Fault.Signal) { + case FEXCore::Core::FAULT_SIGILL: Record.ExceptionCode = EXCEPTION_ILLEGAL_INSTRUCTION; break; + case FEXCore::Core::FAULT_SIGTRAP: + switch (Fault.TrapNo) { + case FEXCore::X86State::X86_TRAPNO_DB: Record.ExceptionCode = EXCEPTION_SINGLE_STEP; break; + case FEXCore::X86State::X86_TRAPNO_BP: Record.ExceptionCode = EXCEPTION_BREAKPOINT; break; + default: LogMan::Msg::EFmt("Unknown SIGTRAP trap: {}", Fault.TrapNo); break; + } + break; + case FEXCore::Core::FAULT_SIGSEGV: Record.ExceptionCode = EXCEPTION_ACCESS_VIOLATION; break; + default: ERROR_AND_DIE_FMT("Unknown fault signal"); break; + } + + RaiseException(Thread, Record, Context); + ERROR_AND_DIE_FMT("This should always noreturn"); +} + class ECSyscallHandler : public FEXCore::HLE::SyscallHandler, public FEXCore::Allocator::FEXAllocOperators { public: ECSyscallHandler() = default; @@ -788,6 +903,11 @@ bool ResetToConsistentStateImpl(const ThreadCPUArea CPUArea, EXCEPTION_RECORD* E return true; } + if (NativeContext->Pc == reinterpret_cast(&FEXCore::Assert::ForcedAssert)) { + LogMan::Msg::DFmt("FEX: Forced assert"); + NtTerminateProcess(NtCurrentProcess(), 0x42); + } + if (!IsJIT && !IsDispatcherAddress(NativeContext->Pc)) { LogMan::Msg::DFmt("Passing through exception"); return false; @@ -805,7 +925,7 @@ bool ResetToConsistentStateImpl(const ThreadCPUArea CPUArea, EXCEPTION_RECORD* E } if (IsEmulatorStackAddress(CPUArea, reinterpret_cast(__builtin_frame_address(0)))) { - Exception::RethrowGuestException(*Exception, *NativeContext); + Exception::RethrowGuestException(Thread, *Exception, *NativeContext); LogMan::Msg::DFmt("Rethrowing onto guest stack: {:X}", NativeContext->Sp); return true; } else { @@ -844,6 +964,70 @@ NTSTATUS ResetToConsistentState(EXCEPTION_RECORD* Exception, CONTEXT* GuestConte NtContinueNative(NativeContext, false); } + // TODO: These are super incorrect for debug registers. + if constexpr (false) { + auto Thread = CPUArea.ThreadState(); + auto& State = Thread->CurrentFrame->State; + + if ((GuestContext->ContextFlags & CONTEXT_DEBUG_REGISTERS) == CONTEXT_DEBUG_REGISTERS) { + // If any of the debug register state changed then we need to invalidate. + const bool Dr0Changed = (GuestContext->Dr0 != State.Dr[0]) || ((GuestContext->Dr7 ^ State.Dr7) & ((0b1111 << 16) | (0b11 << 0))); + const bool Dr1Changed = (GuestContext->Dr1 != State.Dr[1]) || ((GuestContext->Dr7 ^ State.Dr7) & ((0b1111 << 20) | (0b11 << 2))); + const bool Dr2Changed = (GuestContext->Dr2 != State.Dr[2]) || ((GuestContext->Dr7 ^ State.Dr7) & ((0b1111 << 24) | (0b11 << 4))); + const bool Dr3Changed = (GuestContext->Dr3 != State.Dr[3]) || ((GuestContext->Dr7 ^ State.Dr7) & ((0b1111 << 28) | (0b11 << 6))); + + if (Dr0Changed || Dr1Changed || Dr2Changed || Dr3Changed) { + std::scoped_lock Lock(ThreadCreationMutex); + // Need to clear both context and state addresses if changed. + // Only if the BP type was instruction class. + if (Dr0Changed) { + if (GuestContext->Dr0 && ((GuestContext->Dr7 >> 16) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(GuestContext->Dr0, 8, false); + } + + if (State.Dr[0] && ((State.Dr7 >> 16) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(State.Dr[0], 8, false); + } + } + if (Dr1Changed) { + if (GuestContext->Dr1 && ((GuestContext->Dr7 >> 20) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(GuestContext->Dr1, 8, false); + } + + if (State.Dr[1] && ((State.Dr7 >> 20) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(State.Dr[1], 8, false); + } + } + if (Dr2Changed) { + if (GuestContext->Dr2 && ((GuestContext->Dr7 >> 24) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(GuestContext->Dr2, 8, false); + } + + if (State.Dr[2] && ((State.Dr7 >> 24) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(State.Dr[2], 8, false); + } + } + if (Dr3Changed) { + if (GuestContext->Dr3 && ((GuestContext->Dr7 >> 28) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(GuestContext->Dr3, 8, false); + } + + if (State.Dr[3] && ((State.Dr7 >> 28) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(State.Dr[3], 8, false); + } + } + } + + // Update context now that we have invalidated. + State.Dr[0] = GuestContext->Dr0; + State.Dr[1] = GuestContext->Dr1; + State.Dr[2] = GuestContext->Dr2; + State.Dr[3] = GuestContext->Dr3; + State.Dr6 = GuestContext->Dr6; + State.Dr7 = GuestContext->Dr7; + } + } + CPUArea.Area->InSimulation = false; CPUArea.Area->InSyscallCallback = false; return STATUS_SUCCESS; @@ -1038,6 +1222,7 @@ NTSTATUS ThreadInit() { FEX::Windows::CallRetStack::InitializeThread(Thread); Thread->CurrentFrame->Pointers.ExitFunctionEC = reinterpret_cast(&ExitFunctionEC); + Thread->CurrentFrame->Pointers.SynchronousExceptionHandler = reinterpret_cast(&Exception::SynchronousExceptionHandler); CPUArea.StateFrame() = Thread->CurrentFrame; uint64_t EnterEC = Thread->CurrentFrame->Pointers.DispatcherLoopTopEnterEC; @@ -1046,7 +1231,7 @@ NTSTATUS ThreadInit() { uint64_t EnterECFillSRA = Thread->CurrentFrame->Pointers.DispatcherLoopTopEnterECFillSRA; CPUArea.DispatcherLoopTopEnterECFillSRA() = EnterECFillSRA; - CPUArea.ContextAmd64() = {.ContextFlags = CONTEXT_CONTROL | CONTEXT_SEGMENTS | CONTEXT_INTEGER | CONTEXT_FLOATING_POINT, + CPUArea.ContextAmd64() = {.ContextFlags = CONTEXT_CONTROL | CONTEXT_SEGMENTS | CONTEXT_INTEGER | CONTEXT_FLOATING_POINT | CONTEXT_DEBUG_REGISTERS, .AMD64_SegCs = (FEXCore::Core::CPUState::DEFAULT_USER_CS << 3) | 3, .AMD64_SegDs = 0x2b, .AMD64_SegEs = 0x2b, diff --git a/Source/Windows/CMakeLists.txt b/Source/Windows/CMakeLists.txt index fa7ed605c1..f1e9e182a0 100644 --- a/Source/Windows/CMakeLists.txt +++ b/Source/Windows/CMakeLists.txt @@ -6,13 +6,16 @@ function(build_implib name) COMMENT "Building lib${name_ex}.a") add_library(${name_ex} SHARED IMPORTED) - set_property(TARGET ${name_ex} PROPERTY IMPORTED_IMPLIB ${CMAKE_CURRENT_BINARY_DIR}/lib${name_ex}.a) + set_property(TARGET ${name_ex} PROPERTY + IMPORTED_IMPLIB ${CMAKE_CURRENT_BINARY_DIR}/lib${name_ex}.a) add_dependencies(${name_ex} ${name_ex}lib) endfunction() function(patch_library_wine target) add_custom_command(TARGET ${target} POST_BUILD - COMMAND dd bs=32 count=1 seek=2 conv=notrunc if=${CMAKE_SOURCE_DIR}/Source/Windows/wine_builtin.bin of=$) + COMMAND dd bs=32 count=1 seek=2 conv=notrunc + if=${CMAKE_SOURCE_DIR}/Source/Windows/wine_builtin.bin + of=$) endfunction() separate_arguments(CXX_FLAGS_LIST NATIVE_COMMAND "${CMAKE_CXX_FLAGS}") diff --git a/Source/Windows/Common/CPUFeatures.cpp b/Source/Windows/Common/CPUFeatures.cpp index c033db8aff..02ae1eedac 100644 --- a/Source/Windows/Common/CPUFeatures.cpp +++ b/Source/Windows/Common/CPUFeatures.cpp @@ -9,6 +9,7 @@ #include #include "CPUFeatures.h" +#include "FEXUnixLib.h" namespace { @@ -75,21 +76,24 @@ FEXCore::HostFeatures CPUFeatures::FetchHostFeatures(bool IsWine, FEXCore::HostF RegCloseKey(Key); } - FEX::FetchHostFeatures(Features, HostFeatures, !IsWine, CTR, MIDR); + FEX::FetchHostFeatures(Features, HostFeatures, IsWine, CTR, MIDR); // Force-disable SVE until wine/windows gain support for SVE context save/restore - HostFeatures.SupportsSVE128 = false; - HostFeatures.SupportsSVE256 = false; + HostFeatures.ProcessFeatures.SupportsSVE128 = false; + HostFeatures.ProcessFeatures.SupportsSVE256 = false; - HostFeatures.SupportsCPUIndexInTPIDRRO = !IsWine; + HostFeatures.SupportsCPUIndexInTPIDRRO = !IsWine || FEX::Windows::UnixLib::SupportsTPIDRRO_CPU(); - HostFeatures.HostType = HostType; HostFeatures.ProcessPID = ProcessPID; - if (HostType == FEXCore::HostFeatures::HostTypeEnum::Wow64) { - // AVX is unsupported for WOW64 - HostFeatures.SupportsAVX = false; - } + // AVX is unsupported for WOW64 + HostFeatures.ProcessFeatures.SupportsAVX = HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec; + + HostFeatures.ProcessFeatures.HostType = HostType; + HostFeatures.ProcessFeatures.Is64BitMode = HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec; + // arm64ec supports synchronous faults without a double-fault dance. + HostFeatures.ProcessFeatures.SupportsFaultFreeSynchronousFaults = HostType == FEXCore::HostFeatures::HostTypeEnum::Arm64ec; + return HostFeatures; } diff --git a/Source/Windows/Common/CRT/CMakeLists.txt b/Source/Windows/Common/CRT/CMakeLists.txt index da998cb6c7..09412dc0b7 100644 --- a/Source/Windows/Common/CRT/CMakeLists.txt +++ b/Source/Windows/Common/CRT/CMakeLists.txt @@ -1,2 +1,3 @@ -target_sources(CommonWindowsRuntime PRIVATE Alloc.cpp IO.cpp Math.cpp String.cpp Misc.cpp CRT.cpp) +target_sources(CommonWindowsRuntime PRIVATE + Alloc.cpp IO.cpp Math.cpp String.cpp Misc.cpp CRT.cpp) add_subdirectory(Musl) diff --git a/Source/Windows/Common/CRT/Musl/CMakeLists.txt b/Source/Windows/Common/CRT/Musl/CMakeLists.txt index ce1fafd8fe..83d5879f34 100644 --- a/Source/Windows/Common/CRT/Musl/CMakeLists.txt +++ b/Source/Windows/Common/CRT/Musl/CMakeLists.txt @@ -1 +1,4 @@ -target_sources(CommonWindowsRuntime PRIVATE exp2.c log2_data.c remainder.c strtoimax.c strtoull.c exp_data.c fmod.c log2.c isnan.c remquo.c strtoll.c strtoumax.c __math_uflow.c __math_oflow.c __math_xflow.c __math_invalid.c __math_divzero.c) +target_sources(CommonWindowsRuntime PRIVATE + exp2.c log2_data.c remainder.c strtoimax.c strtoull.c exp_data.c fmod.c + log2.c isnan.c remquo.c strtoll.c strtoumax.c __math_uflow.c __math_oflow.c + __math_xflow.c __math_invalid.c __math_divzero.c) diff --git a/Source/Windows/Common/CRT/String.cpp b/Source/Windows/Common/CRT/String.cpp index 3fd981c0b5..90c2a0ad02 100644 --- a/Source/Windows/Common/CRT/String.cpp +++ b/Source/Windows/Common/CRT/String.cpp @@ -20,6 +20,7 @@ extern "C" int __cdecl vsprintf(char* __restrict__ _Dest, const char* __restrict static unsigned short CTypeData[256]; static char Locale[2] = "C"; +static wchar_t wLocale[2] = L"C"; DLLEXPORT_FUNC(char*, _strdup, (const char* Src)) { size_t Len = strlen(Src) + 1; @@ -28,6 +29,13 @@ DLLEXPORT_FUNC(char*, _strdup, (const char* Src)) { return Dst; } +DLLEXPORT_FUNC(wchar_t*, _wcsdup, (const wchar_t* Src)) { + size_t Len = wcslen(Src) + 1; + wchar_t* Dst = reinterpret_cast(malloc(Len * sizeof(*Dst))); + memcpy(Dst, Src, Len * sizeof(*Dst)); + return Dst; +} + char* strdup(const char* Src) { return _strdup(Src); } @@ -44,6 +52,10 @@ DLLEXPORT_FUNC(double, _strtod_l, (const char* __restrict__ _Str, char** __restr UNIMPLEMENTED(); } +DLLEXPORT_FUNC(float, _strtof_l, (const char* __restrict__ _Str, char** __restrict__ _EndPtr, _locale_t _Locale)) { + UNIMPLEMENTED(); +} + long long wcstoll(const wchar_t* __restrict__ nptr, wchar_t** __restrict__ endptr, int base) { UNIMPLEMENTED(); } @@ -124,6 +136,10 @@ DLLEXPORT_FUNC(char*, setlocale, (int _Category, const char* _Locale)) { return Locale; } +DLLEXPORT_FUNC(wchar_t*, _wsetlocale, (int _Category, const wchar_t* _Locale)) { + return wLocale; +} + DLLEXPORT_FUNC(int, _configthreadlocale, (int _Flag)) { return 0; } diff --git a/Source/Windows/Common/Exception.h b/Source/Windows/Common/Exception.h index 12162233cf..b41a5e64a8 100644 --- a/Source/Windows/Common/Exception.h +++ b/Source/Windows/Common/Exception.h @@ -78,7 +78,7 @@ static inline EXCEPTION_RECORD HandleGuestException(FEXCore::Core::CpuStateFrame // A page-fault raised by an explicit break in JIT code is always an execute fault Dst.NumberParameters = 2; Dst.ExceptionInformation[0] = EXCEPTION_EXECUTE_FAULT; - Dst.ExceptionInformation[1] = Rip; + Dst.ExceptionInformation[1] = Fault.FaultAddress ? Fault.FaultAddress : Rip; return Dst; default: LogMan::Msg::EFmt("Unknown SIGSEGV trap: {}", Fault.TrapNo); break; } diff --git a/Source/Windows/Common/FEXUnixLib.cpp b/Source/Windows/Common/FEXUnixLib.cpp index e37807fda1..061431ae96 100644 --- a/Source/Windows/Common/FEXUnixLib.cpp +++ b/Source/Windows/Common/FEXUnixLib.cpp @@ -210,4 +210,15 @@ uint32_t GetPID() { return GetCurrentProcessId(); } +bool SupportsTPIDRRO_CPU() { + if (Available()) { + FEXUnixLib_CheckSupportsTPIDRRO_CPU Args {}; + Call(FEXUnixLibFunctions::CheckSupportsTPIDRRO_CPU, &Args); + // 1 means supports, anything else is unsupported. + return Args.Result == 1; + } + + return false; +} + } // namespace FEX::Windows::UnixLib diff --git a/Source/Windows/Common/FEXUnixLib.h b/Source/Windows/Common/FEXUnixLib.h index c62a763a8f..22ea6b153a 100644 --- a/Source/Windows/Common/FEXUnixLib.h +++ b/Source/Windows/Common/FEXUnixLib.h @@ -53,4 +53,7 @@ void* MapFile(HANDLE FileHandle, uint64_t MapSize); // Or returns the process ID otherwise. uint32_t GetPID(); +// Returns true if the system supports CPU Index in TPIDRRO +bool SupportsTPIDRRO_CPU(); + } // namespace FEX::Windows::UnixLib diff --git a/Source/Windows/Common/ImageTracker.cpp b/Source/Windows/Common/ImageTracker.cpp index c459c446f8..dd22fe3ab4 100644 --- a/Source/Windows/Common/ImageTracker.cpp +++ b/Source/Windows/Common/ImageTracker.cpp @@ -182,20 +182,23 @@ FEXCore::ExecutableFileSectionInfo ImageTracker::HandleImageMap(std::string_view } } - uint64_t EndAddress = Address + Nt->OptionalHeader.SizeOfImage; - fextl::set VolatileInstructions {}; - FEXCore::IntervalList VolatileValidRanges {}; - LoadImageVolatileMetadata(VolatileInstructions, VolatileValidRanges, Module, Nt, Address, EndAddress); - if (auto It = ExtendedMetaData.find(ID); It != ExtendedMetaData.end()) { - FEX::VolatileMetadata::ApplyFEXExtendedVolatileMetadata(It->second, VolatileInstructions, VolatileValidRanges, Address, EndAddress); - } - if (auto It = ExtendedMetaData.find(fextl::string {ModuleName}); It != ExtendedMetaData.end()) { - FEX::VolatileMetadata::ApplyFEXExtendedVolatileMetadata(It->second, VolatileInstructions, VolatileValidRanges, Address, EndAddress); - } - if (!VolatileInstructions.empty() || !VolatileValidRanges.Empty()) { - LogMan::Msg::DFmt("Loaded volatile metadata for {:X}: {} entries", Address, VolatileInstructions.size()); - CTX.AddForceTSOInformation(VolatileValidRanges, std::move(VolatileInstructions)); + if (FEXCore::Config::Get_VOLATILEMETADATA()) { + uint64_t EndAddress = Address + Nt->OptionalHeader.SizeOfImage; + fextl::set VolatileInstructions {}; + FEXCore::IntervalList VolatileValidRanges {}; + LoadImageVolatileMetadata(VolatileInstructions, VolatileValidRanges, Module, Nt, Address, EndAddress); + if (auto It = ExtendedMetaData.find(ID); It != ExtendedMetaData.end()) { + FEX::VolatileMetadata::ApplyFEXExtendedVolatileMetadata(It->second, VolatileInstructions, VolatileValidRanges, Address, EndAddress); + } + if (auto It = ExtendedMetaData.find(fextl::string {ModuleName}); It != ExtendedMetaData.end()) { + FEX::VolatileMetadata::ApplyFEXExtendedVolatileMetadata(It->second, VolatileInstructions, VolatileValidRanges, Address, EndAddress); + } + + if (!VolatileInstructions.empty() || !VolatileValidRanges.Empty()) { + LogMan::Msg::DFmt("Loaded volatile metadata for {:X}: {} entries", Address, VolatileInstructions.size()); + CTX.AddForceTSOInformation(VolatileValidRanges, std::move(VolatileInstructions)); + } } return ImageInfo->SectionInfo; diff --git a/Source/Windows/UnixLib/FEXUnixLib.cpp b/Source/Windows/UnixLib/FEXUnixLib.cpp index 8adef59935..d1953577c0 100644 --- a/Source/Windows/UnixLib/FEXUnixLib.cpp +++ b/Source/Windows/UnixLib/FEXUnixLib.cpp @@ -45,6 +45,10 @@ constexpr NTSTATUS STATUS_INTERNAL_ERROR = 0xC00000E5; #define PR_SET_VMA_ANON_NAME 0 #endif +#ifndef PR_GET_TPIDRRO_CPU +#define PR_GET_TPIDRRO_CPU 0x7F1DBB0 +#endif + static NTSTATUS FEXUnixLib_SetHardwareTSOControlHandler(void* _Args) { auto Args = reinterpret_cast(_Args); if (Args->Enable) { @@ -181,6 +185,13 @@ static NTSTATUS FEXUnixLib_GetPIDHandler(void* _Args) { Args->Result = ::getpid(); return STATUS_SUCCESS; } + +static NTSTATUS FEXUnixLib_CheckSupportsTPIDRRO_CPUHandler(void* _Args) { + auto Args = reinterpret_cast(_Args); + Args->Result = prctl(PR_GET_TPIDRRO_CPU, 0, 0, 0, 0); + return STATUS_SUCCESS; +} + extern "C" const unixlib_entry_t __wine_unix_call_funcs[] = { FEXUnixLib_SetHardwareTSOControlHandler, FEXUnixLib_SetKernelUnalignedAtomicControlHandler, @@ -190,6 +201,7 @@ extern "C" const unixlib_entry_t __wine_unix_call_funcs[] = { FEXUnixLib_DeleteSHMStatsFileHandler, FEXUnixLib_MapFileHandler, FEXUnixLib_GetPIDHandler, + FEXUnixLib_CheckSupportsTPIDRRO_CPUHandler, }; static_assert(sizeof(__wine_unix_call_funcs) / sizeof(__wine_unix_call_funcs[0]) == ToUnderlying(FEXUnixLibFunctions::MAX)); diff --git a/Source/Windows/UnixLib/FEXUnixLib.h b/Source/Windows/UnixLib/FEXUnixLib.h index ed7f18ce63..e24502fe77 100644 --- a/Source/Windows/UnixLib/FEXUnixLib.h +++ b/Source/Windows/UnixLib/FEXUnixLib.h @@ -12,6 +12,7 @@ enum class FEXUnixLibFunctions : uint32_t { DeleteSHMStatsFile, MapFile, GetPID, + CheckSupportsTPIDRRO_CPU, MAX, }; @@ -65,3 +66,8 @@ struct FEXUnixLib_GetPID { uint32_t Result; }; static_assert(sizeof(FEXUnixLib_GetPID) == 4); + +struct FEXUnixLib_CheckSupportsTPIDRRO_CPU { + uint32_t Result; +}; +static_assert(sizeof(FEXUnixLib_CheckSupportsTPIDRRO_CPU) == 4); diff --git a/Source/Windows/WOW64/Module.cpp b/Source/Windows/WOW64/Module.cpp index 8c6b7f76e1..b998af8d6c 100644 --- a/Source/Windows/WOW64/Module.cpp +++ b/Source/Windows/WOW64/Module.cpp @@ -246,6 +246,62 @@ void LoadStateFromWowContext(FEXCore::Core::InternalThreadState* Thread) { State.flags[FEXCore::X86State::X87FLAG_C3_LOC] = (XSave->StatusWord >> 14) & 1; State.flags[FEXCore::X86State::X87FLAG_TOP_LOC] = (XSave->StatusWord >> 11) & 0b111; State.AbridgedFTW = XSave->TagWord; + + // If any of the debug register state changed then we need to invalidate. + const bool Dr0Changed = (Context->Dr0 != State.Dr[0]) || ((Context->Dr7 ^ State.Dr7) & ((0b1111 << 16) | (0b11 << 0))); + const bool Dr1Changed = (Context->Dr1 != State.Dr[1]) || ((Context->Dr7 ^ State.Dr7) & ((0b1111 << 20) | (0b11 << 2))); + const bool Dr2Changed = (Context->Dr2 != State.Dr[2]) || ((Context->Dr7 ^ State.Dr7) & ((0b1111 << 24) | (0b11 << 4))); + const bool Dr3Changed = (Context->Dr3 != State.Dr[3]) || ((Context->Dr7 ^ State.Dr7) & ((0b1111 << 28) | (0b11 << 6))); + + if (Dr0Changed || Dr1Changed || Dr2Changed || Dr3Changed) { + std::scoped_lock Lock(ThreadCreationMutex); + // Need to clear both context and state addresses if changed. + // Only if the BP type was instruction class. + if (Dr0Changed) { + if (Context->Dr0 && ((Context->Dr7 >> 16) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(Context->Dr0, 8, false); + } + + if (State.Dr[0] && ((State.Dr7 >> 16) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(State.Dr[0], 8, false); + } + } + if (Dr1Changed) { + if (Context->Dr1 && ((Context->Dr7 >> 20) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(Context->Dr1, 8, false); + } + + if (State.Dr[1] && ((State.Dr7 >> 20) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(State.Dr[1], 8, false); + } + } + if (Dr2Changed) { + if (Context->Dr2 && ((Context->Dr7 >> 24) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(Context->Dr2, 8, false); + } + + if (State.Dr[2] && ((State.Dr7 >> 24) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(State.Dr[2], 8, false); + } + } + if (Dr3Changed) { + if (Context->Dr3 && ((Context->Dr7 >> 28) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(Context->Dr3, 8, false); + } + + if (State.Dr[3] && ((State.Dr7 >> 28) & 0b11) == 0) { + InvalidationTracker->InvalidateAlignedInterval(State.Dr[3], 8, false); + } + } + } + + // Update context now that we have invalidated. + State.Dr[0] = Context->Dr0; + State.Dr[1] = Context->Dr1; + State.Dr[2] = Context->Dr2; + State.Dr[3] = Context->Dr3; + State.Dr6 = Context->Dr6; + State.Dr7 = Context->Dr7; } void StoreWowContextFromState(WOW64_CONTEXT* Context) { @@ -294,6 +350,14 @@ void StoreWowContextFromState(WOW64_CONTEXT* Context) { Context->FloatSave.DataOffset = XSave->DataOffset; Context->FloatSave.DataSelector = XSave->DataSelector; Context->FloatSave.Cr0NpxState = XSave->StatusWord | 0xffff0000; + + // Save the debug register state to the context. + Context->Dr0 = State.Dr[0]; + Context->Dr1 = State.Dr[1]; + Context->Dr2 = State.Dr[2]; + Context->Dr3 = State.Dr[3]; + Context->Dr6 = State.Dr6; + Context->Dr7 = State.Dr7; } void FlushThreadStateContext() { @@ -769,6 +833,11 @@ bool BTCpuResetToConsistentStateImpl(EXCEPTION_POINTERS* Ptrs) { } } + if (Context->Pc == reinterpret_cast(&FEXCore::Assert::ForcedAssert)) { + LogMan::Msg::DFmt("FEX: Forced assert"); + NtTerminateProcess(NtCurrentProcess(), 0x42); + } + if (!Thread || !IsAddressInJit(Context->Pc)) { return false; } diff --git a/ThunkLibs/Generator/CMakeLists.txt b/ThunkLibs/Generator/CMakeLists.txt index 3be4a68e3d..5b3c5419c8 100644 --- a/ThunkLibs/Generator/CMakeLists.txt +++ b/ThunkLibs/Generator/CMakeLists.txt @@ -13,11 +13,13 @@ endif() add_library(thunkgenlib STATIC analysis.cpp data_layout.cpp gen.cpp) target_include_directories(thunkgenlib INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}) -target_include_directories(thunkgenlib SYSTEM PUBLIC ${CLANG_INCLUDE_DIRS} ${LLVM_INCLUDE_DIRS}) +target_include_directories(thunkgenlib SYSTEM PUBLIC + ${CLANG_INCLUDE_DIRS} ${LLVM_INCLUDE_DIRS}) target_link_libraries(thunkgenlib PUBLIC clang-cpp LLVM) target_link_libraries(thunkgenlib PRIVATE OpenSSL::Crypto) target_link_libraries(thunkgenlib PRIVATE fmt::fmt) -target_compile_definitions(thunkgenlib INTERFACE -DCLANG_RESOURCE_DIR="${CLANG_RESOURCE_DIR}") +target_compile_definitions(thunkgenlib INTERFACE + -DCLANG_RESOURCE_DIR="${CLANG_RESOURCE_DIR}") # Clang's libtooling won't compile with libstdc++'s debug mode target_compile_options(thunkgenlib PUBLIC "-U_GLIBCXX_DEBUG") diff --git a/ThunkLibs/Generator/gen.cpp b/ThunkLibs/Generator/gen.cpp index ccc7cbc198..50637f007d 100644 --- a/ThunkLibs/Generator/gen.cpp +++ b/ThunkLibs/Generator/gen.cpp @@ -840,6 +840,8 @@ bool GenerateThunkLibsActionFactory::runInvocation(std::shared_ptrclearStatCache(); +#endif return Success; } diff --git a/ThunkLibs/GuestLibs/CMakeLists.txt b/ThunkLibs/GuestLibs/CMakeLists.txt index 0b3069204d..bf666d9ca4 100644 --- a/ThunkLibs/GuestLibs/CMakeLists.txt +++ b/ThunkLibs/GuestLibs/CMakeLists.txt @@ -6,8 +6,9 @@ option(ENABLE_CLANG_THUNKS "Enable building thunks with clang" FALSE) find_package(PkgConfig REQUIRED) -# Use include directories from pkg-config and fall back to global defaults if not available. -# /usr/include is dropped to avoid mixing foreign-architecture standard library headers. +# Helper to add include directories from pkg-config, falling back to +# global defaults if not available. /usr/include is dropped to avoid +# mixing foreign-architecture standard library headers. function(target_include_directories_from_pkgconfig target pkg) pkg_check_modules(PKG QUIET ${pkg}) if (PKG_FOUND) @@ -34,7 +35,8 @@ if (CCACHE_PROGRAM) endif() if (CMAKE_CURRENT_SOURCE_DIR STREQUAL CMAKE_SOURCE_DIR) - # We've been included using ExternalProject_add, so set up the actual thunk libraries to be cross-compiled + # We've been included using ExternalProject_add, so set up the + # actual thunk libraries to be cross-compiled set(CMAKE_CXX_STANDARD 20) # This gets passed in from the main cmake project @@ -48,7 +50,8 @@ if (CMAKE_CURRENT_SOURCE_DIR STREQUAL CMAKE_SOURCE_DIR) # uninstall target if(NOT TARGET uninstall) - configure_file("${FEX_PROJECT_SOURCE_DIR}/Data/CMake/cmake_uninstall.cmake.in" + configure_file( + "${FEX_PROJECT_SOURCE_DIR}/Data/CMake/cmake_uninstall.cmake.in" "${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/cmake_uninstall.cmake" IMMEDIATE @ONLY) @@ -56,7 +59,8 @@ if (CMAKE_CURRENT_SOURCE_DIR STREQUAL CMAKE_SOURCE_DIR) COMMAND ${CMAKE_COMMAND} -P ${CMAKE_CURRENT_BINARY_DIR}/CMakeFiles/cmake_uninstall.cmake) endif() else() - # We've been included using add_subdirectory, so set up targets for IDE integration using the host toolchain + # We've been included using add_subdirectory, so set up targets + # for IDE integration using the host toolchain set(GENERATOR_EXE thunkgen) set(TARGET_TYPE OBJECT) set(GENERATE_GUEST_INSTALL_TARGETS FALSE) @@ -71,11 +75,14 @@ function(generate NAME SOURCE_FILE) # Interface target for the user to add include directories add_library(${NAME}-guest-deps INTERFACE) target_include_directories(${NAME}-guest-deps INTERFACE "${CMAKE_CURRENT_SOURCE_DIR}/../include") + if (BITNESS EQUAL 32) target_compile_definitions(${NAME}-guest-deps INTERFACE IS_32BIT_THUNK) endif() + # Shorthand for the include directories added after calling this function. - # This is not evaluated directly, hence directories added after return are still picked up + # This is not evaluated directly, hence directories added after return + # are still picked up set(prop "$") set(compile_prop "$") @@ -98,7 +105,8 @@ function(generate NAME SOURCE_FILE) OUTPUT "${OUTFILE}" DEPENDS "${GENERATOR_EXE}" DEPENDS "${SOURCE_FILE}" - COMMAND "${GENERATOR_EXE}" "${SOURCE_FILE}" "${NAME}" "-guest" "${OUTFILE}" "${X86_DEV_ROOTFS}" ${BITNESS_FLAGS} -- -std=c++20 ${BITNESS_FLAGS2} + COMMAND "${GENERATOR_EXE}" "${SOURCE_FILE}" "${NAME}" + "-guest" "${OUTFILE}" "${X86_DEV_ROOTFS}" ${BITNESS_FLAGS} -- -std=c++20 ${BITNESS_FLAGS2} # Expand compile definitions to space-separated list of -D parameters "$<$:;-D$>" # Expand include directories to space-separated list of -isystem parameters @@ -118,7 +126,8 @@ function(add_guest_lib NAME SONAME) get_filename_component(SOURCE_LDS_FILE_ABS "${SOURCE_LDS_FILE}" ABSOLUTE) set(SOURCE_LDS_32_FILE ../lib${NAME}/lib${NAME}_Guest_32.lds) - get_filename_component(SOURCE_LDS_32_FILE_ABS "${SOURCE_LDS_32_FILE}" ABSOLUTE) + get_filename_component(SOURCE_LDS_32_FILE_ABS + "${SOURCE_LDS_32_FILE}" ABSOLUTE) if (NOT EXISTS "${SOURCE_FILE_ABS}") set(SOURCE_FILE ../lib${NAME}/Guest.cpp) @@ -160,26 +169,32 @@ function(add_guest_lib NAME SONAME) # We need to override the soname for the linker. # Our guest thunk libraries are named `lib-guest`. - # Once we override the loaded name, the guest is free to dlopen again by SONAME rather than filepath. - # eg: - # dlopen("libGL.so.1", RTLD_GLOBAL | RTLD_NOW); -> We override this `libGL.so.1` to `libGL-guest.so` + # Once we override the loaded name, the guest is free to dlopen again by + # SONAME rather than filepath. eg: + # dlopen("libGL.so.1", RTLD_GLOBAL | RTLD_NOW); -> + # We override this `libGL.so.1` to `libGL-guest.so` # Later on in the program, it can do: # dlopen("libGL.so.1", RTLD_GLOBAL | RTLD_NOLOAD); - # This second dlopen will only check to see if the previous load has made the library resident + # This second dlopen will only check to see if the previous + # load has made the library resident # Searching for SONAME in the process. # # Additionally, VDSO can only be opened by SONAME. - # This means it will only ever open the handle with `dlopen("linux-vdso.so.1", RTLD_GLOBAL | RTLD_NOLOAD); - # Note that this doesn't have a lib prefix, and also since it doesn't exist on the filesystem, it can never + # This means it will only ever open the handle with + # dlopen("linux-vdso.so.1", RTLD_GLOBAL | RTLD_NOLOAD); + # Note that this doesn't have a lib prefix, and also since it doesn't + # exist on the filesystem, it can never # Actually load from a path. target_link_options(${NAME}-guest PRIVATE "LINKER:-soname,${SONAME}") set_target_properties(${NAME}-guest PROPERTIES NO_SONAME ON) if (GENERATE_GUEST_INSTALL_TARGETS) if (BITNESS EQUAL 64) - install(TARGETS ${NAME}-guest DESTINATION ${DATA_DIRECTORY}/GuestThunks/) + install(TARGETS ${NAME}-guest DESTINATION + ${DATA_DIRECTORY}/GuestThunks/) else() - install(TARGETS ${NAME}-guest DESTINATION ${DATA_DIRECTORY}/GuestThunks_32/) + install(TARGETS ${NAME}-guest DESTINATION + ${DATA_DIRECTORY}/GuestThunks_32/) endif() endif() endfunction() @@ -228,8 +243,8 @@ target_link_options(VDSO-guest PRIVATE "-nostdlib" "LINKER:--no-undefined" "LINK if (BITNESS EQUAL 32) # 32-bit entrypoint points to __kernel_vsyscall and needs to exist target_link_options(VDSO-guest PRIVATE "LINKER:-e,__kernel_vsyscall") - # 32-bit VDSO needs to have PIC disabled. - # Otherwise GCC/Clang generates GOT prologues on the functions that corrupt vsyscall. + # 32-bit VDSO needs to have PIC disabled. Otherwise GCC/Clang generates + # GOT prologues on the functions that corrupt vsyscall. # Correct: # 00000350 <__kernel_vsyscall>: # 350: cd 80 int 0x80 diff --git a/ThunkLibs/HostLibs/CMakeLists.txt b/ThunkLibs/HostLibs/CMakeLists.txt index a526c72ffc..8d18d0e2cd 100644 --- a/ThunkLibs/HostLibs/CMakeLists.txt +++ b/ThunkLibs/HostLibs/CMakeLists.txt @@ -7,8 +7,9 @@ option(ENABLE_CLANG_THUNKS "Enable building thunks with clang" FALSE) find_package(PkgConfig REQUIRED) -# Helper to add include directories from pkg-config, falling back to global defaults if not available. -# /usr/include is dropped to avoid mixing foreign-architecture standard library headers. +# Helper to add include directories from pkg-config, falling back to +# global defaults if not available. /usr/include is dropped to avoid +# mixing foreign-architecture standard library headers. function(target_include_directories_from_pkgconfig target pkg) pkg_check_modules(PKG QUIET ${pkg}) if (PKG_FOUND) @@ -39,13 +40,18 @@ function(generate NAME SOURCE_FILE GUEST_BITNESS) # Interface target for the user to add include directories add_library(${NAME}-${GUEST_BITNESS}-deps INTERFACE) target_include_directories(${NAME}-${GUEST_BITNESS}-deps INTERFACE "${CMAKE_CURRENT_SOURCE_DIR}/../include") + if (GUEST_BITNESS EQUAL 32) - target_compile_definitions(${NAME}-${GUEST_BITNESS}-deps INTERFACE IS_32BIT_THUNK) + target_compile_definitions(${NAME}-${GUEST_BITNESS}-deps INTERFACE + IS_32BIT_THUNK) endif() + # Shorthand for the include directories added after calling this function. - # This is not evaluated directly, hence directories added after return are still picked up + # This is not evaluated directly, hence directories added after return + # are still picked up set(prop "$") set(compile_prop "$") + if (CMAKE_SYSTEM_PROCESSOR MATCHES "x86_64") list(APPEND compile_prop ARCHITECTURE_x86_64=1) elseif (CMAKE_SYSTEM_PROCESSOR MATCHES "aarch64") @@ -71,7 +77,8 @@ function(generate NAME SOURCE_FILE GUEST_BITNESS) OUTPUT "${OUTFILE}" DEPENDS "${SOURCE_FILE}" DEPENDS thunkgen - COMMAND thunkgen "${SOURCE_FILE}" "${NAME}" "-host" "${OUTFILE}" "${X86_DEV_ROOTFS}" ${BITNESS_FLAGS} -- -std=c++20 + COMMAND thunkgen "${SOURCE_FILE}" "${NAME}" "-host" + "${OUTFILE}" "${X86_DEV_ROOTFS}" ${BITNESS_FLAGS} -- -std=c++20 ${THUNKGEN_SYSTEM_INCLUDES} # Expand compile definitions to space-separated list of -D parameters "$<$:;-D$>" @@ -87,6 +94,7 @@ endfunction() function(add_host_lib NAME GUEST_BITNESS) set(SOURCE_FILE ../lib${NAME}/lib${NAME}_Host.cpp) get_filename_component(SOURCE_FILE_ABS "${SOURCE_FILE}" ABSOLUTE) + if (NOT EXISTS "${SOURCE_FILE_ABS}") set(SOURCE_FILE ../lib${NAME}/Host.cpp) get_filename_component(SOURCE_FILE_ABS "${SOURCE_FILE}" ABSOLUTE) @@ -96,26 +104,31 @@ function(add_host_lib NAME GUEST_BITNESS) endif() add_library(${NAME}-host-${GUEST_BITNESS} SHARED ${SOURCE_FILE} ${GEN_lib${NAME}}) - set_target_properties(${NAME}-host-${GUEST_BITNESS} PROPERTIES OUTPUT_NAME "${NAME}-host") - set_target_properties(${NAME}-host-${GUEST_BITNESS} PROPERTIES LIBRARY_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/HostLibs_${GUEST_BITNESS}") + set_target_properties(${NAME}-host-${GUEST_BITNESS} PROPERTIES + OUTPUT_NAME "${NAME}-host" + LIBRARY_OUTPUT_DIRECTORY "${CMAKE_BINARY_DIR}/HostLibs_${GUEST_BITNESS}") + target_include_directories(${NAME}-host-${GUEST_BITNESS} PRIVATE "${CMAKE_CURRENT_BINARY_DIR}/gen_${GUEST_BITNESS}/") - target_link_libraries(${NAME}-host-${GUEST_BITNESS} PRIVATE dl) - target_link_libraries(${NAME}-host-${GUEST_BITNESS} PRIVATE lib${NAME}-${GUEST_BITNESS}-deps) - target_link_libraries(${NAME}-host-${GUEST_BITNESS} PRIVATE FEX) + target_link_libraries(${NAME}-host-${GUEST_BITNESS} PRIVATE dl lib${NAME}-${GUEST_BITNESS}-deps FEX) ## Make signed overflow well defined 2's complement overflow target_compile_options(${NAME}-host-${GUEST_BITNESS} PRIVATE -fwrapv) if (NOT ENABLE_ASAN) - # generated files forward-declare functions that need to be implemented manually, so pass --no-undefined to make sure errors are detected at compile-time rather than runtime - # NOTE: ASan is not compatible with --no-undefined, see https://github.com/google/sanitizers/issues/380 for details + # generated files forward-declare functions that need to be implemented + # manually, so pass --no-undefined to make sure errors are detected at + # compile-time rather than runtime + # NOTE: ASan is not compatible with --no-undefined, + # see https://github.com/google/sanitizers/issues/380 for details target_link_options(${NAME}-host-${GUEST_BITNESS} PRIVATE "LINKER:--no-undefined") endif() if (${GUEST_BITNESS} EQUAL 32) - install(TARGETS ${NAME}-host-${GUEST_BITNESS} COMPONENT Runtime DESTINATION ${HOSTLIBS_DATA_DIRECTORY}/HostThunks_32/) + set(thunks_dir HostThunks_32) else() - install(TARGETS ${NAME}-host-${GUEST_BITNESS} COMPONENT Runtime DESTINATION ${HOSTLIBS_DATA_DIRECTORY}/HostThunks/) + set(thunks_dir HostThunks) endif() + + install(TARGETS ${NAME}-host-${GUEST_BITNESS} COMPONENT Runtime DESTINATION ${HOSTLIBS_DATA_DIRECTORY}/${thunks_dir}/) endfunction() set(BITNESS_LIST "64") @@ -143,7 +156,9 @@ endforeach() set(BITNESS_LIST "32;64") foreach(GUEST_BITNESS IN LISTS BITNESS_LIST) if (BUILD_FEX_LINUX_TESTS) - generate(libfex_thunk_test ${CMAKE_CURRENT_SOURCE_DIR}/../libfex_thunk_test/libfex_thunk_test_interface.cpp ${GUEST_BITNESS}) + generate(libfex_thunk_test + ${CMAKE_CURRENT_SOURCE_DIR}/../libfex_thunk_test/libfex_thunk_test_interface.cpp + ${GUEST_BITNESS}) add_host_lib(fex_thunk_test ${GUEST_BITNESS}) endif() diff --git a/docs/SourceOutline.md b/docs/SourceOutline.md index 50d20fdbb7..84acdb1fa6 100644 --- a/docs/SourceOutline.md +++ b/docs/SourceOutline.md @@ -1,4 +1,4 @@ -# FEX-2609 +# FEX-2611 ## FEXCore See [FEXCore/Readme.md](../FEXCore/Readme.md) for more details diff --git a/unittests/32Bit_ASM/CMakeLists.txt b/unittests/32Bit_ASM/CMakeLists.txt index 41096820cc..adc7e36bce 100644 --- a/unittests/32Bit_ASM/CMakeLists.txt +++ b/unittests/32Bit_ASM/CMakeLists.txt @@ -37,7 +37,10 @@ foreach(ASM_SRC ${ASM_SOURCES}) add_custom_command(OUTPUT ${OUTPUT_NAME} DEPENDS "${TMP_FILE}" - COMMAND "nasm" ARGS "${TMP_FILE}" "-o" "${OUTPUT_NAME}") + COMMAND "nasm" ARGS + "-i" "${CMAKE_SOURCE_DIR}/${ASM_DIR}/" + "${TMP_FILE}" + "-o" "${OUTPUT_NAME}") add_custom_command(OUTPUT ${OUTPUT_CONFIG_NAME} DEPENDS "${ASM_SRC}" @@ -80,7 +83,7 @@ foreach(ASM_SRC ${ASM_SOURCES}) set(TEST_NAME "${TEST_DESC}/Test_32Bit_${REL_TEST_ASM}") string(REPLACE " " ";" FEX_ARGS_LIST ${FEX_ARGS}) add_test(NAME ${TEST_NAME} - COMMAND "python3" "${CMAKE_SOURCE_DIR}/Scripts/testharness_runner.py" + COMMAND ${PYTHON_TEST_RUNNER} "${CMAKE_SOURCE_DIR}/Scripts/testharness_runner.py" "${CMAKE_SOURCE_DIR}/unittests/32Bit_ASM/Known_Failures" "${CMAKE_SOURCE_DIR}/unittests/32Bit_ASM/Known_Failures_${TEST_TYPE}" "${CMAKE_SOURCE_DIR}/unittests/32Bit_ASM/Disabled_Tests" diff --git a/unittests/32Bit_ASM/Disabled_Tests b/unittests/32Bit_ASM/Disabled_Tests index fa558354d1..0006a16b46 100644 --- a/unittests/32Bit_ASM/Disabled_Tests +++ b/unittests/32Bit_ASM/Disabled_Tests @@ -5,3 +5,6 @@ Test_32Bit_X87/D9_F2.asm # Relies on rounding correctness Test_32Bit_X87/D9_F8.asm + +# Relies on HostHarness behaviour which isn't quite right. +Test_32Bit_Secondary/06_XX_00.asm diff --git a/unittests/32Bit_ASM/FEX_bugs/fsave_finit_ip.asm b/unittests/32Bit_ASM/FEX_bugs/fsave_finit_ip.asm new file mode 100644 index 0000000000..6597819c01 --- /dev/null +++ b/unittests/32Bit_ASM/FEX_bugs/fsave_finit_ip.asm @@ -0,0 +1,36 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0" + }, + "Mode": "32BIT" +} +%endif + +mov eax, 0x61626364 + +; FEX-Emu had a bug where fsave+finit wouldn't zero the FIP correctly. Ensure it correctly zeroes. +; First save the x87 state. +fsave [rel .data] + +; Now set the FIP inside of the state. +; It's 32-bits by default. +mov [rel .data + 0xc], eax + +; Now load the state back. +frstor [rel .data] + +; Do an finit, which should clear out the FIP. +finit + +; Save the state again and load the FIP to ensure it stuck. +fsave [rel .data2] +mov eax, [rel .data2 + 0xc] +hlt + +align 4096 +.data: +times 256 db 0x42 + +.data2: +times 256 db 0x52 diff --git a/unittests/32Bit_ASM/FEX_bugs/fsave_rstore_ip.asm b/unittests/32Bit_ASM/FEX_bugs/fsave_rstore_ip.asm new file mode 100644 index 0000000000..c40652ec1e --- /dev/null +++ b/unittests/32Bit_ASM/FEX_bugs/fsave_rstore_ip.asm @@ -0,0 +1,35 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0x61626364" + }, + "Mode": "32BIT" +} +%endif + +mov eax, 0x61626364 + +; FEX-Emu had a bug where fsave+frstor wouldn't restore the x87 FIP. Ensure it gets saved and restored correctly. +; First save the x87 state. +fsave [rel .data] + +; Now set the FIP inside of the state. +; It's 32-bits by default. +mov [rel .data + 0xc], eax + +; Now load the state back. +frstor [rel .data] + +mov eax, 0x71727374 + +; Save the state again and load the FIP to ensure it stuck. +fsave [rel .data2] +mov eax, [rel .data2 + 0xc] +hlt + +align 4096 +.data: +times 256 db 0x42 + +.data2: +times 256 db 0x52 diff --git a/unittests/32Bit_ASM/FEX_bugs/fxsave_rstore_ip.asm b/unittests/32Bit_ASM/FEX_bugs/fxsave_rstore_ip.asm new file mode 100644 index 0000000000..5c7a118cad --- /dev/null +++ b/unittests/32Bit_ASM/FEX_bugs/fxsave_rstore_ip.asm @@ -0,0 +1,43 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0x61626364" + }, + "Mode": "32BIT" +} +%endif + +mov eax, 0x61626364 + +; Similar to the fsave_rstore_ip test. By specification fxsave doesn't save x87 pointer registers unless the exception-summary (ES) +; bit is set. This only occurs when unmasked x87 exceptions occur. +; We can test this by using fxsave to save, but then load the data back with frstor. +; AMD documentation claims: +; > FXRSTOR does not restore the x87 error pointers (last instruction pointer, last data pointer, and last +; > Opcode), except when FXRSTOR sets FSW.ES=1 after recomputing it from the error mask bits in +; > FCW and error status bits in FSW. +; This is untrue as fxrstor restores the FIP regardless. This can be seen with an fxsave+fxrstor+fsave dance we do below. + +; First save all the state. +fxsave [rel .data] + +; Now set the FIP inside of the state. +; It's 32-bits by default and it lives at 0x8 with fxsave instead of 0xc like fsave! +mov [rel .data + 0x8], eax + +; Now load the state back. +fxrstor [rel .data] + +mov eax, 0x71727374 + +; Save the state again (this time with fsave!) and load the FIP to ensure it stuck. +fsave [rel .data2] +mov eax, [rel .data2 + 0xc] +hlt + +align 4096 +.data: +times 512 db 0x42 + +.data2: +times 512 db 0x52 diff --git a/unittests/32Bit_ASM/FEX_bugs/x87_FIP.asm b/unittests/32Bit_ASM/FEX_bugs/x87_FIP.asm new file mode 100644 index 0000000000..6767754477 --- /dev/null +++ b/unittests/32Bit_ASM/FEX_bugs/x87_FIP.asm @@ -0,0 +1,11 @@ +%ifdef CONFIG +{ + "RegData": { + "RDX": "0" + }, + "Env": { "FEX_JITFEATURES" : "enablex87fip", "FEX_X87REDUCEDPRECISION" : "0" }, + "Mode": "32BIT" +} +%endif + +%include "x87_FIP.mac" diff --git a/unittests/32Bit_ASM/FEX_bugs/x87_FIP.mac b/unittests/32Bit_ASM/FEX_bugs/x87_FIP.mac new file mode 100644 index 0000000000..ecc09c8f47 --- /dev/null +++ b/unittests/32Bit_ASM/FEX_bugs/x87_FIP.mac @@ -0,0 +1,459 @@ +; FEX-Emu had a bug where FIP wasn't being calculated for ALU operations. +; Not all x87 instructions update FIP, but run through the suite just in case. +; Which will catch any instructions accidentally setting FIP, but shouldn't be. +; FDP isn't calculated here, but keep it around in-case we care in the future. + +; Split/Second (SteamID 297860) had a SecuROM implementation that used this for some form of anti-tamper/cheat. + +; Follow the formula: +; - finit +; - +; - get_result , +; Or: +; - +; - basic_op + +%macro get_result 2 + mov eax, 0x41424344 + mov ebx, 0 + + fsave [rel .data] + ; Load FIP. + mov eax, [rel .data + 0xc] + ; Load FDP + ; XXX: Not validated in this test. + ; mov ebx, [rel .data + 0x14] + + mov dword [ecx + 0], eax + mov dword [ecx + 4], ebx + cmp eax, %1 + jne %%.bad_end + cmp ebx, %2 + jne %%.bad_end + + add ecx, 8 + ; Reset the state. + finit + jmp %%.good + %%.bad_end: + mov edx, 1 + ud2 + %%.good: +%endmacro + +%macro basic_op 1 + lea esi, [rel %%.local_op] + %%.local_op: + %1 + get_result esi, 0 +%endmacro + +lea ecx, [rel .data_results] +mov edx, 0 + +basic_op f2xm1 +basic_op fabs +basic_op fadd +fldz +basic_op fadd dword [rel .data_tmp] +fldz +basic_op fadd qword [rel .data_tmp] +fldz +basic_op faddp +fldz +basic_op fiadd word [rel .data_tmp] +fldz +basic_op fiadd dword [rel .data_tmp] +basic_op fbld [rel .data_tmp] +fldz +basic_op fbstp [rel .data_tmp] +fldz +basic_op fchs +fnclex +get_result 0, 0 + +fldz +fldz +basic_op fcmovb + +fldz +fldz +basic_op fcmovbe + +fldz +fldz +basic_op fcmove + +fldz +fldz +basic_op fcmovnb + +fldz +fldz +basic_op fcmovnbe + +fldz +fldz +basic_op fcmovne + +fldz +fldz +basic_op fcmovnu + +fldz +fldz +basic_op fcmovu + +fldz +fldz +basic_op fcom + +fldz +basic_op fcom dword [rel .data_tmp] + +fldz +basic_op fcom qword [rel .data_tmp] + +fldz +fldz +basic_op fcomp + +fldz +basic_op fcomp dword [rel .data_tmp] + +fldz +basic_op fcomp qword [rel .data_tmp] + +fldz +fldz +basic_op fcompp + +fldz +fldz +basic_op fcomip + +fld1 +basic_op fcos + +basic_op fdecstp + +fld1 +fld1 +basic_op fdiv + +fld1 +fst dword [rel .data_tmp] +basic_op fdiv dword [rel .data_tmp] + +fld1 +fst qword [rel .data_tmp] +basic_op fdiv qword [rel .data_tmp] + +fld1 +fld1 +basic_op fdivp + +fld1 +mov word [rel .data_tmp], 1 +basic_op fidiv word [rel .data_tmp] + +fld1 +mov dword [rel .data_tmp], 1 +basic_op fidiv dword [rel .data_tmp] + +fld1 +fld1 +basic_op fdivr + +fld1 +basic_op fst dword [rel .data_tmp] + +fld1 +fst dword [rel .data_tmp] +basic_op fdivr qword [rel .data_tmp] + +fld1 +fld1 +basic_op fdivrp + +fld1 +mov word [rel .data_tmp], 1 +basic_op fidivr word [rel .data_tmp] + +fld1 +mov dword [rel .data_tmp], 1 +basic_op fidivr dword [rel .data_tmp] + +fldz +basic_op ffree + +fldz +basic_op ffreep + +fldz +basic_op ficom word [rel .data_tmp] + +fldz +basic_op ficom dword [rel .data_tmp] + +fldz +basic_op ficomp word [rel .data_tmp] + +fldz +basic_op ficomp dword [rel .data_tmp] + +basic_op fild word [rel .data_tmp] + +basic_op fild dword [rel .data_tmp] + +basic_op fild qword [rel .data_tmp] + +fldz +basic_op fincstp + +; Sets FIP to zero, not the instruction location. +fninit +get_result 0, 0 + +fldz +basic_op fist word [rel .data_tmp] + +fldz +basic_op fist dword [rel .data_tmp] + +fldz +basic_op fistp word [rel .data_tmp] + +fldz +basic_op fistp dword [rel .data_tmp] + +fldz +basic_op fistp qword [rel .data_tmp] + +fldz +basic_op fisttp word [rel .data_tmp] + +fldz +basic_op fisttp dword [rel .data_tmp] + +fldz +basic_op fisttp qword [rel .data_tmp] + +fldz +basic_op fld + +basic_op fld dword [rel .data_tmp] + +basic_op fld qword [rel .data_tmp] + +basic_op fld tword [rel .data_tmp] + +basic_op fld1 + +; Load Control word doesn't set FIP. +mov word [rel .data_tmp], 0 +fldcw [rel .data_tmp] +get_result 0, 0 + +; LoadEnv doesn't set FIP. +mov word [rel .data_tmp], 0 +fldenv [rel .data_tmp] +get_result 0, 0 + +basic_op fldl2e + +basic_op fldl2t + +basic_op fldlg2 + +basic_op fldln2 + +basic_op fldpi + +basic_op fldz + +basic_op fmul + +fldz +fldz +basic_op fmul dword [rel .data_tmp] + +fldz +fldz +basic_op fmul qword [rel .data_tmp] + +fldz +fldz +basic_op fmulp + +fldz +basic_op fimul word [rel .data_tmp] + +fldz +basic_op fimul dword [rel .data_tmp] + +basic_op fnop + +fldz +fldz +basic_op fpatan + +fld1 +fld1 +basic_op fprem + +fld1 +fld1 +basic_op fprem1 + +fldz +basic_op fptan + +fldz +basic_op frndint + +fldz +fldz +basic_op fscale + +fldz +basic_op fsin + +fldz +basic_op fsincos + +fld1 +basic_op fsqrt + +fldz +fldz +basic_op fst + +fldz +basic_op fst dword [rel .data_tmp] + +fldz +basic_op fst qword [rel .data_tmp] + +fldz +basic_op fstp + +fldz +basic_op fstp dword [rel .data_tmp] + +fldz +basic_op fstp qword [rel .data_tmp] + +fldz +basic_op fstp tword [rel .data_tmp] + +; Storing control word doesn't set FIP +fnstcw [rel .data_tmp] +get_result 0, 0 + +; Neither does storing the environment +fnstenv [rel .data_tmp] +get_result 0, 0 + +; Nor storing the status word +fnstsw ax +get_result 0, 0 + +fnstsw [rel .data_tmp] +get_result 0, 0 + +fldz +fldz +basic_op fsub + +fldz +basic_op fsub dword [rel .data_tmp] + +fldz +basic_op fsub qword [rel .data_tmp] + +fldz +fldz +basic_op fsubp + +fldz +basic_op fisub word [rel .data_tmp] + +fldz +basic_op fisub dword [rel .data_tmp] + +fldz +fldz +basic_op fsubr + +fldz +basic_op fsubr dword [rel .data_tmp] + +fldz +basic_op fsubr qword [rel .data_tmp] + +fldz +fldz +basic_op fsubrp + +fldz +basic_op fisubr word [rel .data_tmp] + +fldz +basic_op fisubr dword [rel .data_tmp] + +fldz +fldz +basic_op ftst + +fldz +fldz +basic_op fucom + +fldz +fldz +basic_op fucomp + +fldz +fldz +basic_op fucompp + +fldz +fldz +basic_op fucomi + +; fwait doesn't set FIP +fwait +get_result 0, 0 + +fldz +basic_op fxam + +fldz +fldz +basic_op fxch + +fldz +basic_op fxtract + +fldz +fldz +basic_op fyl2x + +fldz +fldz +basic_op fyl2xp1 + +; rdx == 0 here means success. +hlt + +align 4096 +.data: +times 64 dq 0x5152535455565758 + +align 32 +.data_tmp: +times 64 dq 0 + +.data_results: +times 512 dd 0x91929394 diff --git a/unittests/32Bit_ASM/FEX_bugs/x87_FIP_reduced.asm b/unittests/32Bit_ASM/FEX_bugs/x87_FIP_reduced.asm new file mode 100644 index 0000000000..725c9ff7c5 --- /dev/null +++ b/unittests/32Bit_ASM/FEX_bugs/x87_FIP_reduced.asm @@ -0,0 +1,11 @@ +%ifdef CONFIG +{ + "RegData": { + "RDX": "0" + }, + "Env": { "FEX_JITFEATURES" : "enablex87fip", "FEX_X87REDUCEDPRECISION" : "1" }, + "Mode": "32BIT" +} +%endif + +%include "x87_FIP.mac" diff --git a/unittests/32Bit_ASM/PrimaryGroup/1_82_00.asm b/unittests/32Bit_ASM/PrimaryGroup/1_82_00.asm new file mode 100644 index 0000000000..7b153a9fa0 --- /dev/null +++ b/unittests/32Bit_ASM/PrimaryGroup/1_82_00.asm @@ -0,0 +1,26 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0xdeadbe01", + "RBX": "0xdeadbe01" + }, + "Mode": "32BIT" +} +%endif + +; 0x82 is the 32-bit only alias of the 0x80 group 1 encoding. +; NASM won't emit it, so we have to encode it by hand. +mov eax, 0xdeadbeef + +; add al, 0x12 +db 0x82, 0xc0, 0x12 + +mov edi, 0xe0000000 +mov dword [edi], 0xdeadbeef + +; lock add byte [edi], 0x12 +db 0xf0, 0x82, 0x07, 0x12 + +mov ebx, [edi] + +hlt diff --git a/unittests/32Bit_ASM/PrimaryGroup/1_82_01.asm b/unittests/32Bit_ASM/PrimaryGroup/1_82_01.asm new file mode 100644 index 0000000000..a4633fda6d --- /dev/null +++ b/unittests/32Bit_ASM/PrimaryGroup/1_82_01.asm @@ -0,0 +1,26 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0xdeadbeff", + "RBX": "0xdeadbeff" + }, + "Mode": "32BIT" +} +%endif + +; 0x82 is the 32-bit only alias of the 0x80 group 1 encoding. +; NASM won't emit it, so we have to encode it by hand. +mov eax, 0xdeadbeef + +; or al, 0x12 +db 0x82, 0xc8, 0x12 + +mov edi, 0xe0000000 +mov dword [edi], 0xdeadbeef + +; lock or byte [edi], 0x12 +db 0xf0, 0x82, 0x0f, 0x12 + +mov ebx, [edi] + +hlt diff --git a/unittests/32Bit_ASM/PrimaryGroup/1_82_02.asm b/unittests/32Bit_ASM/PrimaryGroup/1_82_02.asm new file mode 100644 index 0000000000..10cec0aeaa --- /dev/null +++ b/unittests/32Bit_ASM/PrimaryGroup/1_82_02.asm @@ -0,0 +1,28 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0xdeadbe02", + "RBX": "0xdeadbe02" + }, + "Mode": "32BIT" +} +%endif + +; 0x82 is the 32-bit only alias of the 0x80 group 1 encoding. +; NASM won't emit it, so we have to encode it by hand. +mov eax, 0xdeadbeef +stc + +; adc al, 0x12 +db 0x82, 0xd0, 0x12 + +mov edi, 0xe0000000 +mov dword [edi], 0xdeadbeef +stc + +; lock adc byte [edi], 0x12 +db 0xf0, 0x82, 0x17, 0x12 + +mov ebx, [edi] + +hlt diff --git a/unittests/32Bit_ASM/PrimaryGroup/1_82_03.asm b/unittests/32Bit_ASM/PrimaryGroup/1_82_03.asm new file mode 100644 index 0000000000..fcbfecf2f0 --- /dev/null +++ b/unittests/32Bit_ASM/PrimaryGroup/1_82_03.asm @@ -0,0 +1,28 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0xdeadbedc", + "RBX": "0xdeadbedc" + }, + "Mode": "32BIT" +} +%endif + +; 0x82 is the 32-bit only alias of the 0x80 group 1 encoding. +; NASM won't emit it, so we have to encode it by hand. +mov eax, 0xdeadbeef +stc + +; sbb al, 0x12 +db 0x82, 0xd8, 0x12 + +mov edi, 0xe0000000 +mov dword [edi], 0xdeadbeef +stc + +; lock sbb byte [edi], 0x12 +db 0xf0, 0x82, 0x1f, 0x12 + +mov ebx, [edi] + +hlt diff --git a/unittests/32Bit_ASM/PrimaryGroup/1_82_04.asm b/unittests/32Bit_ASM/PrimaryGroup/1_82_04.asm new file mode 100644 index 0000000000..d2954d24f6 --- /dev/null +++ b/unittests/32Bit_ASM/PrimaryGroup/1_82_04.asm @@ -0,0 +1,26 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0xdeadbe02", + "RBX": "0xdeadbe02" + }, + "Mode": "32BIT" +} +%endif + +; 0x82 is the 32-bit only alias of the 0x80 group 1 encoding. +; NASM won't emit it, so we have to encode it by hand. +mov eax, 0xdeadbeef + +; and al, 0x12 +db 0x82, 0xe0, 0x12 + +mov edi, 0xe0000000 +mov dword [edi], 0xdeadbeef + +; lock and byte [edi], 0x12 +db 0xf0, 0x82, 0x27, 0x12 + +mov ebx, [edi] + +hlt diff --git a/unittests/32Bit_ASM/PrimaryGroup/1_82_05.asm b/unittests/32Bit_ASM/PrimaryGroup/1_82_05.asm new file mode 100644 index 0000000000..92d05ba47e --- /dev/null +++ b/unittests/32Bit_ASM/PrimaryGroup/1_82_05.asm @@ -0,0 +1,26 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0xdeadbedd", + "RBX": "0xdeadbedd" + }, + "Mode": "32BIT" +} +%endif + +; 0x82 is the 32-bit only alias of the 0x80 group 1 encoding. +; NASM won't emit it, so we have to encode it by hand. +mov eax, 0xdeadbeef + +; sub al, 0x12 +db 0x82, 0xe8, 0x12 + +mov edi, 0xe0000000 +mov dword [edi], 0xdeadbeef + +; lock sub byte [edi], 0x12 +db 0xf0, 0x82, 0x2f, 0x12 + +mov ebx, [edi] + +hlt diff --git a/unittests/32Bit_ASM/PrimaryGroup/1_82_06.asm b/unittests/32Bit_ASM/PrimaryGroup/1_82_06.asm new file mode 100644 index 0000000000..23814504ba --- /dev/null +++ b/unittests/32Bit_ASM/PrimaryGroup/1_82_06.asm @@ -0,0 +1,26 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0xdeadbefd", + "RBX": "0xdeadbefd" + }, + "Mode": "32BIT" +} +%endif + +; 0x82 is the 32-bit only alias of the 0x80 group 1 encoding. +; NASM won't emit it, so we have to encode it by hand. +mov eax, 0xdeadbeef + +; xor al, 0x12 +db 0x82, 0xf0, 0x12 + +mov edi, 0xe0000000 +mov dword [edi], 0xdeadbeef + +; lock xor byte [edi], 0x12 +db 0xf0, 0x82, 0x37, 0x12 + +mov ebx, [edi] + +hlt diff --git a/unittests/32Bit_ASM/PrimaryGroup/1_82_07.asm b/unittests/32Bit_ASM/PrimaryGroup/1_82_07.asm new file mode 100644 index 0000000000..bb235c7160 --- /dev/null +++ b/unittests/32Bit_ASM/PrimaryGroup/1_82_07.asm @@ -0,0 +1,21 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0xdeadbeef", + "RBX": "0x1" + }, + "Mode": "32BIT" +} +%endif + +; 0x82 is the 32-bit only alias of the 0x80 group 1 encoding. +; NASM won't emit it, so we have to encode it by hand. +mov eax, 0xdeadbeef +xor ebx, ebx + +; cmp al, 0x12 +db 0x82, 0xf8, 0x12 + +seta bl + +hlt diff --git a/unittests/32Bit_ASM/Secondary/06_XX_00.asm b/unittests/32Bit_ASM/Secondary/06_XX_00.asm new file mode 100644 index 0000000000..95aaf87599 --- /dev/null +++ b/unittests/32Bit_ASM/Secondary/06_XX_00.asm @@ -0,0 +1,27 @@ +%ifdef CONFIG +{ + "RegData": { + "RBX": "0x0000000000000050", + "RCX": "0x0000000041420050", + "RDX": "0x0000000051520050" + }, + "Mode": "32BIT" +} +%endif + +; SLDT is an instruction caught by UMIP on recent CPUs. +; On 32-bit an LDT is already loaded in the test harness runner. +mov ebx, 0x41424344 +mov ecx, 0x41424344 +mov edx, 0x41424344 + +sldt ebx +sldt cx +sldt [rel .data] +mov edx, [rel .data] + +hlt + +align 4096 +.data: +dq 0x51525354 diff --git a/unittests/ASM/CMakeLists.txt b/unittests/ASM/CMakeLists.txt index 58dba80854..40d9c259b6 100644 --- a/unittests/ASM/CMakeLists.txt +++ b/unittests/ASM/CMakeLists.txt @@ -37,7 +37,10 @@ foreach(ASM_SRC ${ASM_SOURCES}) add_custom_command(OUTPUT ${OUTPUT_NAME} DEPENDS "${TMP_FILE}" - COMMAND "nasm" ARGS "-i" "${CMAKE_SOURCE_DIR}/unittests/ASM/Includes/" "${TMP_FILE}" "-o" "${OUTPUT_NAME}") + COMMAND "nasm" ARGS + "-i" "${CMAKE_SOURCE_DIR}/unittests/ASM/Includes/" + "-i" "${CMAKE_SOURCE_DIR}/${ASM_DIR}/" + "${TMP_FILE}" "-o" "${OUTPUT_NAME}") add_custom_command(OUTPUT ${OUTPUT_CONFIG_NAME} DEPENDS "${ASM_SRC}" @@ -87,7 +90,7 @@ foreach(ASM_SRC ${ASM_SOURCES}) endif() add_test(NAME ${TEST_NAME} - COMMAND "python3" "${CMAKE_SOURCE_DIR}/Scripts/testharness_runner.py" + COMMAND ${PYTHON_TEST_RUNNER} "${CMAKE_SOURCE_DIR}/Scripts/testharness_runner.py" "${CMAKE_SOURCE_DIR}/unittests/ASM/Known_Failures" "${CMAKE_SOURCE_DIR}/unittests/ASM/Known_Failures_${TEST_TYPE}" "${CMAKE_SOURCE_DIR}/unittests/ASM/Disabled_Tests" diff --git a/unittests/ASM/Disabled_Tests b/unittests/ASM/Disabled_Tests index 559d257120..a13b9022b9 100644 --- a/unittests/ASM/Disabled_Tests +++ b/unittests/ASM/Disabled_Tests @@ -11,3 +11,7 @@ Test_X87/D9_F8.asm # This is basically a benchmark. FEX_bugs/XeSS_quadratic.asm + +# Relies on UMIP behaviour returning a hardcoded value. +# FEX doesn't currently emulate this. +Test_Secondary/06_XX_00_2.asm diff --git a/unittests/ASM/FEX_bugs/two_byte_0xbx.asm b/unittests/ASM/FEX_bugs/two_byte_0xbx.asm new file mode 100644 index 0000000000..3590fb05dc --- /dev/null +++ b/unittests/ASM/FEX_bugs/two_byte_0xbx.asm @@ -0,0 +1,38 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0x4142434445464748", + "RBX": "0x5152535455560006", + "RCX": "0x6162636465660006", + "RDX": "0x5152535455560003", + "RDI": "0x6162636465660003", + "RSI": "0x5152535455560001", + "RSP": "0x6162636465660001" + } +} +%endif + +; FEX-Emu had a bug where the secondary two-byte table decoding failed to decode the 0xBX nibble correctly. +; Depending on the order of the prefix FEX chose an incorrect instruction or invalid instruction depending. +; Found in Order of the Sinking Star (SteamAppID 499170). + +mov rax, 0x4142434445464748 +mov rbx, 0x5152535455565758 +mov rcx, 0x6162636465666768 + +mov rdx, 0x5152535455565758 +mov rdi, 0x6162636465666768 + +mov rsi, 0x5152535455565758 +mov rsp, 0x6162636465666768 + +db 0x66, 0xf3, 0x0f, 0xb8, 0xd8 ; popcnt bx, ax +db 0xf3, 0x66, 0x0f, 0xb8, 0xc8 ; popcnt cx, ax + +db 0x66, 0xf3, 0x0f, 0xbc, 0xd0 ; tzcnt dx, ax +db 0xf3, 0x66, 0x0f, 0xbc, 0xf8 ; tzcnt di, ax + +db 0x66, 0xf3, 0x0f, 0xbd, 0xf0 ; lzcnt si, ax +db 0xf3, 0x66, 0x0f, 0xbd, 0xe0 ; lzcnt sp, ax + +hlt diff --git a/unittests/ASM/H0F38/sha256rnds2.asm b/unittests/ASM/H0F38/sha256rnds2.asm index 519c8d1627..8e11fe2e11 100644 --- a/unittests/ASM/H0F38/sha256rnds2.asm +++ b/unittests/ASM/H0F38/sha256rnds2.asm @@ -2,7 +2,17 @@ { "RegData": { "XMM1": ["0x97D4574EE323773D", "0xA934C32F562D8E88"], - "XMM2": ["0x6868C3F3AAED56E0", "0xF0FCE9E294E6E6DE"] + "XMM2": ["0x6868C3F3AAED56E0", "0xF0FCE9E294E6E6DE"], + "XMM3": ["0x97D4574EE323773D", "0xA934C32F562D8E88"], + "XMM4": ["0x12EC0B542095D0D2", "0x6BDF510B9C287D67"], + "XMM5": ["0x97D4574EE323773D", "0xA934C32F562D8E88"], + "XMM6": ["0x12EC0B542095D0D2", "0x6BDF510B9C287D67"], + "XMM0": ["0xBB5A9A6046F6F8D0", "0x39C210E660786A57"], + "XMM7": ["0x8013E21F99A0FC9C", "0x0F9B1B966B7CACFE"], + "XMM9": ["0x499793854A5D5652", "0xB519225A80462AB4"], + "XMM10": ["0x3E4B561875127AA5", "0x6C5ED7074C69CB40"], + "XMM12": ["0xCF74894E65DDAE89", "0xD0FE60BF24CA8913"], + "XMM13": ["0xCC23CC32EED51377", "0xE4121F2F81CEFB11"] }, "HostFeatures": ["SHA"] } @@ -16,6 +26,51 @@ movaps xmm2, [rdx + 16 * 1] sha256rnds2 xmm1, xmm2 +; Cribbed from OpenSSL, they use this idiom +; and this is the pattern we are looking for in the peephole. +movaps xmm3, [rdx + 16 * 0] +movaps xmm4, [rdx + 16 * 1] +sha256rnds2 xmm3, xmm4 +pshufd xmm0, xmm0, 0xe +sha256rnds2 xmm4, xmm3 + +; We also look for this pattern. +movaps xmm0, [rdx + 16 * 2] +movaps xmm5, [rdx + 16 * 0] +movaps xmm6, [rdx + 16 * 1] +sha256rnds2 xmm5, xmm6 +psrldq xmm0, 8 +sha256rnds2 xmm6, xmm5 + +; Now test that the peephole doesn't break anything +; if weird register aliasing is going on. +movaps xmm0, [rdx + 16 * 2] +movaps xmm10, [rdx + 16 * 0] +sha256rnds2 xmm10, xmm10 +pshufd xmm0, xmm0, 0xe +sha256rnds2 xmm10, xmm10 + +movaps xmm0, [rdx + 16 * 2] +movaps xmm11, [rdx + 16 * 0] +sha256rnds2 xmm11, xmm0 +pshufd xmm0, xmm0, 0xe +sha256rnds2 xmm0, xmm11 +movaps xmm13, xmm0 + +movaps xmm0, [rdx + 16 * 2] +movaps xmm12, [rdx + 16 * 1] +sha256rnds2 xmm0, xmm12 +pshufd xmm0, xmm0, 0xe +sha256rnds2 xmm12, xmm0 + +movaps xmm0, [rdx + 16 * 2] +movaps xmm7, [rdx + 16 * 0] +sha256rnds2 xmm7, xmm7 +movaps xmm9, [rdx + 16 * 0] +sha256rnds2 xmm9, xmm0 +movaps xmm8, [rdx + 16 * 1] +sha256rnds2 xmm0, xmm8 + hlt align 16 diff --git a/unittests/ASM/PrimaryGroup/2_C0_07_3.asm b/unittests/ASM/PrimaryGroup/2_C0_07_3.asm new file mode 100644 index 0000000000..80c23a7e99 --- /dev/null +++ b/unittests/ASM/PrimaryGroup/2_C0_07_3.asm @@ -0,0 +1,20 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0x414243444546F848" + } +} +%endif + +mov rdx, 0xe0000000 + +mov rax, 0x414243444546C348 +mov [rdx + 8 * 0], rax +mov rax, 0x5152535455565758 +mov [rdx + 8 * 1], rax + +sar byte [rdx + 8 * 0 + 1], 3 + +mov rax, [rdx + 8 * 0] + +hlt diff --git a/unittests/ASM/PrimaryGroup/2_C0_07_4.asm b/unittests/ASM/PrimaryGroup/2_C0_07_4.asm new file mode 100644 index 0000000000..edcc1e6ced --- /dev/null +++ b/unittests/ASM/PrimaryGroup/2_C0_07_4.asm @@ -0,0 +1,20 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0x414243444546FF48" + } +} +%endif + +mov rdx, 0xe0000000 + +mov rax, 0x4142434445468148 +mov [rdx + 8 * 0], rax +mov rax, 0x5152535455565758 +mov [rdx + 8 * 1], rax + +sar byte [rdx + 8 * 0 + 1], 12 + +mov rax, [rdx + 8 * 0] + +hlt diff --git a/unittests/ASM/PrimaryGroup/2_C1_07_2.asm b/unittests/ASM/PrimaryGroup/2_C1_07_2.asm new file mode 100644 index 0000000000..29cb57155b --- /dev/null +++ b/unittests/ASM/PrimaryGroup/2_C1_07_2.asm @@ -0,0 +1,20 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0x41424344FE2A4748" + } +} +%endif + +mov rdx, 0xe0000000 + +mov rax, 0x41424344C5464748 +mov [rdx + 8 * 0], rax +mov rax, 0x5152535455565758 +mov [rdx + 8 * 1], rax + +sar word [rdx + 8 * 0 + 2], 5 + +mov rax, [rdx + 8 * 0] + +hlt diff --git a/unittests/ASM/PrimaryGroup/2_D0_07_2.asm b/unittests/ASM/PrimaryGroup/2_D0_07_2.asm new file mode 100644 index 0000000000..8534d85d85 --- /dev/null +++ b/unittests/ASM/PrimaryGroup/2_D0_07_2.asm @@ -0,0 +1,20 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0x414243444546D048" + } +} +%endif + +mov rdx, 0xe0000000 + +mov rax, 0x414243444546A048 +mov [rdx + 8 * 0], rax +mov rax, 0x5152535455565758 +mov [rdx + 8 * 1], rax + +sar byte [rdx + 8 * 0 + 1], 1 + +mov rax, [rdx + 8 * 0] + +hlt diff --git a/unittests/ASM/PrimaryGroup/3_F7_06.asm b/unittests/ASM/PrimaryGroup/3_F7_06.asm index cf7de45662..9f3c1e52c1 100644 --- a/unittests/ASM/PrimaryGroup/3_F7_06.asm +++ b/unittests/ASM/PrimaryGroup/3_F7_06.asm @@ -4,8 +4,16 @@ "RAX": "0x414243442A2A0001", "RBX": "0x1C1C1C1C00000001", "RSI": "0x0000000000000001", + "RDI": "0x7FFFFFFFFFFFFFFF", + "RBP": "0x00000000FFFFFFFF", "RSP": "0x1010101010101010", - "R11": "0x8000000000000000" + "R8": "0xFFFFFFFFFFFFFFFF", + "R9": "0x123456789ABCDEF0", + "R10": "0x0000000000000002", + "R11": "0x8000000000000000", + "R12": "0x7FFFFFFF00000001", + "R13": "0x19B6BA23F42AC7CB", + "R14": "0x0000000000000001" } } %endif @@ -44,6 +52,37 @@ mov rcx, 2 div rcx mov r11, rax +; Both quotient digits estimated one too large +mov rax, 0x0 +mov rdx, 0x400000007fffffff +mov rcx, 0x80000000ffffffff +div rcx +mov rdi, rax +mov rbp, rdx + +; Both quotient digits estimated two too large +mov rax, 0xffffffffffffffff +mov rdx, 0x123456789abcdef0 +mov rcx, 0x123456789abcdef1 +div rcx +mov r8, rax +mov r9, rdx + +; Divisor is also the lower half of the dividend +mov rax, 0x80000000ffffffff +mov rdx, 0x1 +div rax +mov r10, rax +mov r12, rdx + +; Small divisor with real data in the lower half +mov rax, 0x0123456789abcdef +mov rdx, 0x1 +mov rcx, 10 +div rcx +mov r13, rax +mov r14, rdx + mov rax, [r15 + 8 * 0] mov rbx, [r15 + 8 * 1] diff --git a/unittests/ASM/PrimaryGroup/3_F7_07.asm b/unittests/ASM/PrimaryGroup/3_F7_07.asm index 8d480327cc..0fe57cb04d 100644 --- a/unittests/ASM/PrimaryGroup/3_F7_07.asm +++ b/unittests/ASM/PrimaryGroup/3_F7_07.asm @@ -14,7 +14,9 @@ "R10": "0x0000000000000001", "R11": "0x0000000000000000", "R12": "0x4000000000000000", - "R13": "0x0000000000000000" + "R13": "0x0000000000000000", + "R14": "0xDB6DB6DB6DB6DB6D", + "R15": "0x5555555555555555" } } %endif @@ -116,6 +118,20 @@ idiv rcx mov qword [r15 + 8 * 12 + 0], rax mov qword [r15 + 8 * 13 + 0], rdx +; 128bit divide of a negative dividend with real data in the lower half +mov rax, 0xfffffffffffffffb +mov rdx, 0xfffffffffffffffe +mov rcx, 7 +idiv rcx +mov qword [r15 + 8 * 14 + 0], rax + +; 128bit divide of a negative dividend with a zero lower half +mov rax, 0x0 +mov rdx, 0xffffffffffffffff +mov rcx, -3 +idiv rcx +mov qword [r15 + 8 * 15 + 0], rax + ; Positive / Positive results mov rax, [r15 + 8 * 0] mov rbx, [r15 + 8 * 1] @@ -137,6 +153,8 @@ mov r11, [r15 + 8 * 11] ; 128bit results mov r12, [r15 + 8 * 12] mov r13, [r15 + 8 * 13] +mov r14, [r15 + 8 * 14] +mov r15, [r15 + 8 * 15] hlt diff --git a/unittests/ASM/Secondary/06_XX_00.asm b/unittests/ASM/Secondary/06_XX_00.asm new file mode 100644 index 0000000000..eb80ddc630 --- /dev/null +++ b/unittests/ASM/Secondary/06_XX_00.asm @@ -0,0 +1,32 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0x0000000000000000", + "RBX": "0x4142434400000000", + "RCX": "0x4142434445460000", + "RDX": "0x5152535455560000" + } +} +%endif + +; SLDT is an instruction caught by UMIP on recent CPUs. +; The Linux kernel emulates this by returning zero typically. +; Alternatively if an LDT has been loaded, it returns an emulated number. +mov rax, 0x4142434445464748 +mov rbx, 0x4142434445464748 +mov rcx, 0x4142434445464748 +mov rdx, 0x4142434445464748 + +; Nasm for some reason doesn't give 64-bit SDLT +db 0x48, 0x0f, 0x00, 0xc0 ; sldt rax + +sldt ebx +sldt cx +sldt [rel .data] +mov rdx, [rel .data] + +hlt + +align 4096 +.data: +dq 0x5152535455565758 diff --git a/unittests/ASM/Secondary/06_XX_00_2.asm b/unittests/ASM/Secondary/06_XX_00_2.asm new file mode 100644 index 0000000000..1c39cbe5b7 --- /dev/null +++ b/unittests/ASM/Secondary/06_XX_00_2.asm @@ -0,0 +1,57 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "0x0000000000000050", + "RBX": "0x4142434400000050", + "RCX": "0x4142434445460050", + "RDX": "0x5152535455560050" + }, + "HostFeatures": ["Linux"] +} +%endif + +mov rsp, 0xe000_0080 + +; SLDT is an instruction caught by UMIP on recent CPUs. +; The Linux kernel emulates this by returning zero typically. +; Alternatively if an LDT has been loaded, it returns an emulated number. + +mov rdi, 0x11 ; func LDT_WRITE +lea rsi, [rel .local_ldt] +mov rdx, 16 ; sizeof(struct user_desc) + +lea rax, [rel .modify_ldt] +call rax + +; Install an LDT entry and see what Linux returns. +mov rax, 0x4142434445464748 +mov rbx, 0x4142434445464748 +mov rcx, 0x4142434445464748 +mov rdx, 0x4142434445464748 + +; Nasm for some reason doesn't give 64-bit SDLT +db 0x48, 0x0f, 0x00, 0xc0 ; sldt rax + +sldt ebx +sldt cx +sldt [rel .data] +mov rdx, [rel .data] + +hlt + +; Pass arguments in SysV +.modify_ldt: ; (rdi:int:func, rsi:void*:ptr, rdx:ulong:bytecount) + mov rax, 154 ; modify_ldt. + syscall + ret + +align 4096 +.data: +dq 0x5152535455565758 + +; Generate a user_desc manually. +.local_ldt: +dd 1 ; entry_number +dd 0 ; base_addr +dd -1 ; limit +dd (1 << 0) | (2 << 1) | (0 << 3) | (1 << 4) | (0 << 5) | (1 << 6) | (0 << 7) diff --git a/unittests/ASM/Secondary/07_XX_05.asm b/unittests/ASM/Secondary/07_XX_05.asm new file mode 100644 index 0000000000..67410958cc --- /dev/null +++ b/unittests/ASM/Secondary/07_XX_05.asm @@ -0,0 +1,13 @@ +%ifdef CONFIG +{ + "RegData": { + "RAX": "1" + }, + "HostFeatures": ["SERIALIZE"] +} +%endif + +; Just ensures the instruction executes +mov rax, 1 +serialize +hlt diff --git a/unittests/ASM/VEX/avx_vnni_int16.asm b/unittests/ASM/VEX/avx_vnni_int16.asm new file mode 100644 index 0000000000..48ed96b1ea --- /dev/null +++ b/unittests/ASM/VEX/avx_vnni_int16.asm @@ -0,0 +1,314 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX_VNNI_INT16"], + "RegData": { + "XMM0": ["0x201f86db048af9ab", "0x97a56e5d672e780e", "0", "0"], + "XMM1": ["0xb5d71decccf1b470", "0x06f4fce380000000", "0", "0"], + "XMM2": ["0xe7894b7478f869af", "0xebfcd9a145e4bbac", "0", "0"], + "XMM3": ["0x6962b4cc7fffffff", "0x14a8fa1d01efe6aa", "0", "0"], + "XMM4": ["0x0d5f316dfe348f77", "0x23b694fb1250e451", "0", "0"], + "XMM5": ["0xffffffffffffffff", "0xf5d15900ffffffff", "0", "0"], + "XMM6": ["0xc5796235dda688c7", "0xccc81cce70b73f0b", "0x7f1a089149679162", "0x0fa93ac4b3093e32"], + "XMM7": ["0xf762675c095f3edd", "0xa77e1b790aee5f4f", "0x92c33406cf8a07a0", "0x918f71faf3a74850"], + "XMM8": ["0x85246c59621db521", "0x31167deffff63290", "0xcf2634f79d8fc05f", "0x6983b4ec655adce7"], + "XMM9": ["0xe5a0907dfb253e1b", "0xeddcffb480000000", "0x8000000040c1979d", "0x33fa83b880000000"], + "XMM10": ["0x5a72715ccb8c0e16", "0x4da852afe78f824a", "0xf22b6abc612ec7b1", "0xca09fef49cac3db0"], + "XMM11": ["0xffffffffe492398d", "0xfce06168e6d34f6e", "0xffffffff89c7a97b", "0xef98a41cd91f80f5"], + "XMM12": ["0xe10d29c50309972a", "0x7c00c20e21622e31", "0x389bfc2463194ca2", "0xdb3fac535320bf11"], + "XMM13": ["0x52b46b393c392bfd", "0xcf862b473b8ff81f", "0x5f32097308e938d2", "0x26a4911dfcdb3a6c"] + } +} +%endif + +vmovups ymm0, [rel .random_data + (32 * 0)] +vmovups ymm1, [rel .random_data + (32 * 1)] +vmovups ymm2, [rel .random_data + (32 * 2)] +vmovups ymm3, [rel .random_data + (32 * 3)] +vmovups ymm4, [rel .random_data + (32 * 4)] +vmovups ymm5, [rel .random_data + (32 * 5)] +vmovups ymm6, [rel .random_data + (32 * 6)] +vmovups ymm7, [rel .random_data + (32 * 7)] +vmovups ymm8, [rel .random_data + (32 * 8)] +vmovups ymm9, [rel .random_data + (32 * 9)] +vmovups ymm10, [rel .random_data + (32 * 10)] +vmovups ymm11, [rel .random_data + (32 * 11)] +vmovups ymm12, [rel .random_data + (32 * 12)] +vmovups ymm13, [rel .random_data + (32 * 13)] + +; 128-bit +db 0xc4, 0xe2, 0x71, 0x52, 0xc2 ; {vex} vpdpwssd xmm0, xmm1, xmm2 +db 0xc4, 0xe2, 0x69, 0x53, 0xcb ; {vex} vpdpwssds xmm1, xmm2, xmm3 +db 0xc4, 0xe2, 0x62, 0xd2, 0xd4 ; {vex} vpdpwsud xmm2, xmm3, xmm4 +db 0xc4, 0xe2, 0x5a, 0xd3, 0xdd ; {vex} vpdpwsuds xmm3, xmm4, xmm5 +db 0xc4, 0xe2, 0x50, 0xd2, 0xe6 ; {vex} vpdpwuud xmm4, xmm5, xmm6 +db 0xc4, 0xe2, 0x48, 0xd3, 0xef ; {vex} vpdpwuuds xmm5, xmm6, xmm7 + +; 256-bit +db 0xc4, 0xc2, 0x45, 0x52, 0xf0 ; {vex} vpdpwssd ymm6, ymm7, ymm8 +db 0xc4, 0xc2, 0x3d, 0x53, 0xf9 ; {vex} vpdpwssds ymm7, ymm8, ymm9 +db 0xc4, 0x42, 0x36, 0xd2, 0xc2 ; {vex} vpdpwsud ymm8, ymm9, ymm10 +db 0xc4, 0x42, 0x2e, 0xd3, 0xcb ; {vex} vpdpwsuds ymm9, ymm10, ymm11 +db 0xc4, 0x42, 0x24, 0xd2, 0xd4 ; {vex} vpdpwuud ymm10, ymm11, ymm12 +db 0xc4, 0x42, 0x1c, 0xd3, 0xdd ; {vex} vpdpwuuds ymm11, ymm12, ymm13 + +hlt + +align 4096 +; 4096 bytes of random data. +.random_data: +db 0x5b, 0x27, 0x12, 0x29, 0xab, 0x84, 0xa2, 0x21, 0x6d, 0x27, 0xbe, 0x3d, 0x17, 0x05, 0x99, 0xb0 +db 0xf3, 0xe2, 0x19, 0xf4, 0x42, 0xbb, 0x69, 0x02, 0x67, 0x3a, 0xab, 0x86, 0x9e, 0xda, 0x9f, 0xd5 +db 0xba, 0xd4, 0x2d, 0x9d, 0x20, 0x3d, 0xf8, 0xb2, 0x29, 0xc3, 0xc3, 0x98, 0xa8, 0x30, 0x92, 0xe9 +db 0x5a, 0x75, 0x0c, 0xcb, 0x28, 0x28, 0xb4, 0x90, 0x93, 0x16, 0x45, 0x10, 0x3a, 0x5d, 0x96, 0x67 +db 0xf9, 0x31, 0xbe, 0x48, 0x78, 0xe8, 0x5a, 0xf2, 0x66, 0x29, 0xd9, 0x80, 0x50, 0x80, 0xcb, 0x07 +db 0xfe, 0xda, 0x19, 0x0f, 0x22, 0xea, 0x18, 0x5e, 0x12, 0xea, 0x3d, 0x1a, 0xbc, 0x91, 0x51, 0x15 +db 0xaa, 0x66, 0x92, 0x61, 0xb4, 0xd4, 0xce, 0x14, 0x9c, 0x86, 0x27, 0x3d, 0xd0, 0xc6, 0x51, 0x1c +db 0xa0, 0xd4, 0x0b, 0x2d, 0x25, 0x30, 0x3b, 0x46, 0x23, 0x07, 0xb5, 0x05, 0x4a, 0xaa, 0x5a, 0x0a +db 0x7b, 0x29, 0xe4, 0x52, 0x6f, 0x6f, 0xc8, 0x62, 0xb8, 0x94, 0x6a, 0x30, 0x66, 0xf1, 0x21, 0xec +db 0xd1, 0xf2, 0x68, 0xda, 0xb7, 0x7f, 0x5a, 0x26, 0x38, 0x46, 0x48, 0xda, 0x5d, 0x64, 0x8d, 0x3d +db 0x2f, 0xf6, 0xc3, 0x63, 0xb8, 0x09, 0x3a, 0xd0, 0x5b, 0xeb, 0x67, 0xd0, 0xaa, 0x63, 0x71, 0x19 +db 0x7e, 0x4e, 0x33, 0xe2, 0x15, 0xba, 0x87, 0xa7, 0x7b, 0x25, 0xe4, 0xbb, 0xb5, 0x26, 0x9a, 0xf1 +db 0xdd, 0x5a, 0x63, 0xd7, 0x16, 0xc0, 0xc3, 0xc8, 0x1b, 0xad, 0x00, 0x52, 0x63, 0x55, 0xc7, 0xe0 +db 0xd9, 0xe9, 0xf4, 0x4c, 0x53, 0xfb, 0x73, 0x57, 0xdc, 0xad, 0x0c, 0xca, 0x73, 0x44, 0x6b, 0xf3 +db 0xb7, 0x83, 0x3b, 0xfe, 0xf0, 0x15, 0xbf, 0xe5, 0x15, 0xca, 0xdf, 0x35, 0xeb, 0xe7, 0xe3, 0xa2 +db 0xbd, 0x20, 0xad, 0xff, 0x1b, 0x67, 0x0a, 0x9f, 0x60, 0x60, 0xff, 0xa7, 0xc9, 0x19, 0xde, 0xb3 +db 0x67, 0xf1, 0x4b, 0x77, 0x7f, 0x0b, 0xb1, 0x29, 0xee, 0xcb, 0xd6, 0x5d, 0x0d, 0xb9, 0x54, 0x49 +db 0x10, 0xe3, 0xbd, 0x8a, 0xa0, 0x69, 0xa3, 0x07, 0xbe, 0x8e, 0xea, 0xc6, 0x75, 0x27, 0x66, 0xae +db 0x3c, 0xde, 0xc6, 0x13, 0x1b, 0x50, 0x37, 0x56, 0x7c, 0x01, 0xab, 0x8b, 0x46, 0xdc, 0x80, 0xed +db 0xdf, 0x12, 0x6f, 0x64, 0xdf, 0xe6, 0xf9, 0xbf, 0x15, 0x95, 0xd9, 0x80, 0x19, 0x8c, 0x96, 0x33 +db 0x89, 0xbe, 0x25, 0x33, 0x34, 0x82, 0x92, 0x96, 0x05, 0x52, 0xa2, 0xcf, 0x5b, 0x3d, 0xfc, 0xd8 +db 0x43, 0x89, 0x2e, 0x16, 0x6d, 0xbd, 0x84, 0x97, 0x77, 0xb5, 0xd6, 0x2b, 0x6b, 0xb1, 0xc6, 0x38 +db 0x0a, 0xfe, 0xe1, 0xc9, 0x31, 0x32, 0x7f, 0xd5, 0xc1, 0x03, 0x4a, 0xb2, 0x86, 0x4d, 0x8d, 0x77 +db 0xd6, 0x62, 0x52, 0x75, 0xed, 0x27, 0x21, 0xe8, 0x69, 0x6f, 0x6a, 0x5b, 0x59, 0x4d, 0xd2, 0x6c +db 0x2a, 0x97, 0x09, 0x03, 0xc5, 0x29, 0x0d, 0xe1, 0x31, 0x2e, 0x62, 0x21, 0x0e, 0xc2, 0x00, 0x7c +db 0xa2, 0x4c, 0x19, 0x63, 0x24, 0xfc, 0x9b, 0x38, 0x11, 0xbf, 0x20, 0x53, 0x53, 0xac, 0x3f, 0xdb +db 0xfd, 0x2b, 0x39, 0x3c, 0x39, 0x6b, 0xb4, 0x52, 0x1f, 0xf8, 0x8f, 0x3b, 0x47, 0x2b, 0x86, 0xcf +db 0xd2, 0x38, 0xe9, 0x08, 0x73, 0x09, 0x32, 0x5f, 0x6c, 0x3a, 0xdb, 0xfc, 0x1d, 0x91, 0xa4, 0x26 +db 0xa3, 0x0c, 0xbc, 0x94, 0xf5, 0xbd, 0x29, 0xcf, 0x72, 0x3d, 0xee, 0x48, 0x06, 0x77, 0x63, 0x70 +db 0x47, 0xc9, 0x87, 0x21, 0xb1, 0x9a, 0xdd, 0x5f, 0x71, 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0x3b, 0x73, 0xa5, 0x4f +db 0x06, 0x79, 0xf4, 0x6e, 0x3a, 0xae, 0xa4, 0x98, 0x86, 0xb9, 0x1b, 0x8b, 0x66, 0xd9, 0x96, 0xdb +db 0xa5, 0x47, 0xd3, 0xa8, 0x05, 0x3c, 0x50, 0x57, 0x8a, 0x8f, 0xe0, 0x7f, 0xaf, 0x75, 0x30, 0x44 +db 0x01, 0xce, 0x17, 0xb8, 0x89, 0xd4, 0x12, 0xaa, 0xe5, 0x2e, 0xe2, 0x75, 0x70, 0x06, 0x02, 0x5c +db 0xbd, 0x85, 0xaa, 0x75, 0x02, 0x98, 0xe0, 0x0f, 0xe9, 0x94, 0x43, 0x84, 0x8c, 0xca, 0xc1, 0x53 +db 0x2f, 0x5c, 0x9a, 0x04, 0x9c, 0x2c, 0x50, 0xc7, 0x6d, 0x13, 0x70, 0x8f, 0x7d, 0xa5, 0x09, 0xc0 +db 0x2b, 0x75, 0x55, 0x57, 0xc0, 0x51, 0xad, 0x86, 0x18, 0xc5, 0x9a, 0x9f, 0x1d, 0x99, 0x3e, 0xbd +db 0x38, 0x24, 0x33, 0xd6, 0x04, 0x98, 0xde, 0x19, 0xcc, 0xb3, 0x72, 0x53, 0x6b, 0xbb, 0x38, 0x03 +db 0xdc, 0x86, 0xe3, 0x1b, 0x12, 0x04, 0x86, 0x92, 0x3d, 0x3f, 0xf4, 0x4d, 0x73, 0x8a, 0xe7, 0x67 +db 0x68, 0xae, 0x63, 0x13, 0x7b, 0x48, 0x90, 0xce, 0x35, 0xfb, 0xf3, 0x46, 0x17, 0xb3, 0xcd, 0x2f +db 0xeb, 0xb5, 0x7a, 0x11, 0xa9, 0xe1, 0xa6, 0xab, 0x0c, 0x9e, 0x9f, 0xd1, 0x08, 0xae, 0xc1, 0x68 +db 0xd2, 0xfc, 0x41, 0x36, 0xa8, 0xf4, 0x97, 0xbf, 0x86, 0x61, 0x90, 0x51, 0x02, 0x2e, 0x9a, 0x64 +db 0x4e, 0xfb, 0xd1, 0xe5, 0x73, 0x24, 0x07, 0xb5, 0x70, 0xa1, 0xa2, 0xb7, 0xcb, 0x0c, 0xbc, 0x1a +db 0x4a, 0x55, 0x9e, 0x3f, 0x3b, 0xdb, 0x33, 0x4c, 0x01, 0x63, 0x1f, 0xbe, 0xae, 0x05, 0x3e, 0x45 +db 0x9e, 0xcf, 0x2e, 0x5f, 0x3b, 0x83, 0x8a, 0xc7, 0xd7, 0x39, 0x3b, 0xfc, 0x54, 0xf0, 0x10, 0x42 +db 0x9d, 0x5e, 0x12, 0xc2, 0xb8, 0x8c, 0x4e, 0x26, 0xd7, 0xa0, 0xa1, 0x7a, 0xc0, 0x27, 0x72, 0x52 +db 0xdb, 0xc5, 0xed, 0xe1, 0x86, 0x19, 0x0a, 0xff, 0x43, 0x3d, 0x1c, 0x12, 0xb2, 0xbe, 0x5c, 0x12 +db 0x4b, 0xbf, 0xff, 0x20, 0xe3, 0xde, 0x4a, 0x74, 0x89, 0x67, 0x42, 0xc3, 0xaf, 0xe3, 0x8a, 0x8a +db 0x57, 0x88, 0xdf, 0xbe, 0x1a, 0x0c, 0x58, 0xa1, 0xfe, 0x21, 0x57, 0x97, 0xf6, 0xef, 0xba, 0x34 +db 0x54, 0x60, 0x00, 0x71, 0x09, 0x4a, 0x5b, 0x89, 0x61, 0x4a, 0x67, 0x19, 0x34, 0x44, 0x83, 0x21 +db 0x3d, 0xeb, 0x67, 0xff, 0xf7, 0x68, 0xbb, 0x29, 0xa0, 0x74, 0x5e, 0xad, 0x78, 0xb4, 0x11, 0xc5 +db 0x5e, 0x0e, 0xc0, 0xd4, 0xe7, 0x50, 0x40, 0xa1, 0xb5, 0x98, 0xdb, 0x75, 0x1f, 0xa5, 0xbc, 0x1b +db 0xeb, 0x13, 0x18, 0x0e, 0x92, 0x54, 0x17, 0x2d, 0x5b, 0xf8, 0x09, 0x50, 0x27, 0x49, 0xf5, 0x01 +db 0xb9, 0x51, 0xd1, 0x85, 0x34, 0x67, 0xd8, 0xb9, 0x5f, 0x01, 0x7b, 0xfc, 0xe7, 0x1e, 0xc8, 0xfc +db 0x2f, 0xda, 0x81, 0xfd, 0x76, 0x69, 0x5b, 0x47, 0x98, 0x1b, 0x9b, 0xee, 0x9b, 0x18, 0x8e, 0x30 +db 0x85, 0x9d, 0x45, 0xde, 0xa8, 0x9b, 0x4e, 0x57, 0x26, 0x90, 0x0b, 0x9a, 0xe0, 0xf7, 0xfa, 0x08 +db 0x1d, 0xe3, 0xca, 0xb8, 0xaa, 0xda, 0x4e, 0xe3, 0xb6, 0x33, 0x05, 0x9a, 0x75, 0x70, 0x18, 0x86 +db 0x60, 0x31, 0xc1, 0x05, 0x56, 0x02, 0x30, 0xbd, 0xff, 0x3b, 0xa9, 0xca, 0xe4, 0x84, 0xe6, 0x96 +db 0x47, 0xcf, 0x8b, 0xa8, 0xd4, 0x63, 0x8f, 0x8f, 0x55, 0x4a, 0xbc, 0x4c, 0x3c, 0x61, 0x96, 0x38 +db 0xcc, 0x10, 0x7e, 0x4e, 0x5c, 0x97, 0xd3, 0x54, 0x22, 0xde, 0xfb, 0x03, 0x81, 0x4e, 0x6d, 0x76 +db 0xb5, 0xab, 0x8f, 0xba, 0xf5, 0xf0, 0x1a, 0xf9, 0x69, 0x64, 0x30, 0xb3, 0x19, 0x30, 0x54, 0x97 +db 0x14, 0x66, 0x5c, 0xcf, 0x48, 0x0f, 0x74, 0xf3, 0xbe, 0x16, 0x10, 0x6c, 0xb4, 0x93, 0x86, 0xd1 +db 0x21, 0xd0, 0x6a, 0x12, 0x35, 0x03, 0x45, 0x99, 0xaa, 0xe1, 0x0a, 0xd9, 0x58, 0x83, 0x2f, 0x97 +db 0xcb, 0x0d, 0x81, 0x4b, 0x82, 0x01, 0x6f, 0xd6, 0x20, 0xee, 0xf3, 0xbf, 0xdc, 0x3d, 0x67, 0x6c +db 0xa5, 0x7c, 0x6d, 0x21, 0x09, 0x99, 0x2e, 0x0a, 0x98, 0x7c, 0x50, 0x56, 0x19, 0x54, 0xcc, 0x79 +db 0xe1, 0x84, 0x18, 0x86, 0xf8, 0x5a, 0x1b, 0xf7, 0x1f, 0x38, 0xe0, 0x3a, 0xb9, 0x50, 0xc1, 0xf1 +db 0xbe, 0x66, 0x89, 0xe2, 0x68, 0x4a, 0x11, 0x0b, 0xfb, 0x84, 0x02, 0x38, 0x31, 0xf4, 0xda, 0x50 +db 0xb6, 0x5f, 0x27, 0x62, 0xc7, 0x5a, 0x0f, 0x99, 0xb7, 0x7e, 0x4a, 0x49, 0xe9, 0x67, 0xe0, 0xa5 +db 0x0d, 0x08, 0x95, 0xf0, 0xe4, 0x3b, 0x62, 0x30, 0x2b, 0x89, 0x21, 0xdd, 0x52, 0x99, 0x12, 0x16 +db 0x83, 0x94, 0x6a, 0x38, 0x1f, 0x8d, 0x81, 0xbf, 0x1f, 0xf9, 0xe0, 0x9c, 0x80, 0xcc, 0x7c, 0xfe +db 0x33, 0x35, 0x27, 0x26, 0xca, 0xcc, 0x1f, 0x43, 0xcd, 0xb0, 0x74, 0x0e, 0xff, 0x1c, 0x86, 0x43 +db 0xab, 0x44, 0xbc, 0x31, 0xff, 0xa4, 0x54, 0x95, 0xd4, 0x79, 0x9e, 0xc0, 0xed, 0x87, 0x1c, 0x2e +db 0x50, 0x47, 0xad, 0xc0, 0x2f, 0x5e, 0x8c, 0x15, 0xfb, 0x86, 0x2c, 0xa5, 0x61, 0x2a, 0x60, 0x12 +db 0xbc, 0x1f, 0x84, 0xe9, 0x75, 0x55, 0x7e, 0x2c, 0x11, 0xd0, 0xfc, 0x66, 0x89, 0x86, 0x2f, 0x26 +db 0x43, 0x1e, 0xa6, 0x6c, 0xa6, 0x40, 0xa9, 0x37, 0x65, 0x99, 0x72, 0xe1, 0x1a, 0xdc, 0x23, 0x53 +db 0x09, 0x8e, 0xa1, 0xd6, 0xda, 0xd9, 0x95, 0xaf, 0x58, 0xe0, 0x2a, 0x4a, 0xd3, 0xbd, 0xbd, 0x86 diff --git a/unittests/ASM/VEX/avx_vnni_int8.asm b/unittests/ASM/VEX/avx_vnni_int8.asm new file mode 100644 index 0000000000..343ec238b4 --- /dev/null +++ b/unittests/ASM/VEX/avx_vnni_int8.asm @@ -0,0 +1,315 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX_VNNI_INT8"], + "RegData": { + "XMM0": ["0x21a28f672911f967", "0xb098e7bc3dbe6b49", "0", "0"], + "XMM1": ["0xb2f80af49d2e223e", "0xe9922ea798c36356", "0", "0"], + "XMM2": ["0xf25a950848bdd617", "0x07cb5ad780d8b694", "0", "0"], + "XMM3": ["0x14cf6b536192af07", "0x1c52115c3d275b86", "0", "0"], + "XMM4": ["0x62c954ad52e54718", "0xec22c1ba306b7fc0", "0", "0"], + "XMM5": ["0xd03b727d63c5ae5b", "0x19734973d068870e", "0", "0"], + "XMM6": ["0xc8c3c8c9d763552c", "0xe0c736ef5200cf7a", "0x577415294cf4f838", "0xf36b3a3dca0c7e9c"], + "XMM7": ["0xe5bf2392fe3b95b0", "0xa2e3c60a35dfa499", "0x9f0a6995ffacd17e", "0xb3ddd8f8a7ffaaf6"], + "XMM8": ["0x29b18b5d774bf3ae", "0x49543b535dd63a47", "0x07a31e6e8abe0099", "0xae659ae0c6ea16c0"], + "XMM9": ["0x5636b2af13c6e0aa", "0xed8109758baac8f9", "0xbff9d26f646f361d", "0x3396819580d9a344"], + "XMM10": ["0x9693719333266043", "0xd8fcb8adcfa2aac6", "0x97854be0162f6308", "0x38c792142bd73a02"], + "XMM11": ["0xd57fc067c9e2439e", "0x778dd642b24a7499", "0xe821740375531233", "0x6cd3010a5b6b0eef"], + "XMM12": ["0xe10d29c50309972a", "0x7c00c20e21622e31", "0x389bfc2463194ca2", "0xdb3fac535320bf11"], + "XMM13": ["0x52b46b393c392bfd", "0xcf862b473b8ff81f", "0x5f32097308e938d2", "0x26a4911dfcdb3a6C"] + } +} +%endif + +vmovups ymm0, [rel .random_data + (32 * 0)] +vmovups ymm1, [rel .random_data + (32 * 1)] +vmovups ymm2, [rel .random_data + (32 * 2)] +vmovups ymm3, [rel .random_data + (32 * 3)] +vmovups ymm4, [rel .random_data + (32 * 4)] +vmovups ymm5, [rel .random_data + (32 * 5)] +vmovups ymm6, [rel .random_data + (32 * 6)] +vmovups ymm7, [rel .random_data + (32 * 7)] +vmovups ymm8, [rel .random_data + (32 * 8)] +vmovups ymm9, [rel .random_data + (32 * 9)] +vmovups ymm10, [rel .random_data + (32 * 10)] +vmovups ymm11, [rel .random_data + (32 * 11)] +vmovups ymm12, [rel .random_data + (32 * 12)] +vmovups ymm13, [rel .random_data + (32 * 13)] + +; 128-bit +db 0xc4, 0xe2, 0x73, 0x50, 0xc2 ; {vex} vpdpbssd xmm0, xmm1, xmm2 +db 0xc4, 0xe2, 0x6b, 0x51, 0xcb ; {vex} vpdpbssds xmm1, xmm2, xmm3 +db 0xc4, 0xe2, 0x62, 0x50, 0xd4 ; {vex} vpdpbsud xmm2, xmm3, xmm4 +db 0xc4, 0xe2, 0x5a, 0x51, 0xdd ; {vex} vpdpbsuds xmm3, xmm4, xmm5 +db 0xc4, 0xe2, 0x50, 0x50, 0xe6 ; {vex} vpdpbuud xmm4, xmm5, xmm6 +db 0xc4, 0xe2, 0x48, 0x51, 0xef ; {vex} vpdpbuuds xmm5, xmm6, xmm7 + +; 256-bit +db 0xc4, 0xc2, 0x47, 0x50, 0xf0 ; {vex} vpdpbssd ymm6, ymm7, ymm8 +db 0xc4, 0xc2, 0x3f, 0x51, 0xf9 ; {vex} vpdpbssds ymm7, ymm8, ymm9 +db 0xc4, 0x42, 0x36, 0x50, 0xc2 ; {vex} vpdpbsud ymm8, ymm9, ymm10 +db 0xc4, 0x42, 0x2e, 0x51, 0xcb ; {vex} vpdpbsuds ymm9, ymm10, ymm11 +db 0xc4, 0x42, 0x24, 0x50, 0xd4 ; {vex} vpdpbuud ymm10, ymm11, ymm12 +db 0xc4, 0x42, 0x1c, 0x51, 0xdd ; {vex} vpdpbuuds ymm11, ymm12, ymm13 + +hlt + +align 4096 +; 4096 bytes of random data. +.random_data: +db 0x5b, 0x27, 0x12, 0x29, 0xab, 0x84, 0xa2, 0x21, 0x6d, 0x27, 0xbe, 0x3d, 0x17, 0x05, 0x99, 0xb0 +db 0xf3, 0xe2, 0x19, 0xf4, 0x42, 0xbb, 0x69, 0x02, 0x67, 0x3a, 0xab, 0x86, 0x9e, 0xda, 0x9f, 0xd5 +db 0xba, 0xd4, 0x2d, 0x9d, 0x20, 0x3d, 0xf8, 0xb2, 0x29, 0xc3, 0xc3, 0x98, 0xa8, 0x30, 0x92, 0xe9 +db 0x5a, 0x75, 0x0c, 0xcb, 0x28, 0x28, 0xb4, 0x90, 0x93, 0x16, 0x45, 0x10, 0x3a, 0x5d, 0x96, 0x67 +db 0xf9, 0x31, 0xbe, 0x48, 0x78, 0xe8, 0x5a, 0xf2, 0x66, 0x29, 0xd9, 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0x44, 0xa8, 0x70, 0xd8, 0xda, 0x45, 0x72, 0xdb, 0x83, 0xf7, 0xbe, 0xbb, 0x93, 0xc9, 0xaa +db 0xf5, 0xfb, 0xdc, 0x0a, 0x55, 0x54, 0xd1, 0xae, 0x9e, 0x14, 0x38, 0x24, 0x06, 0x6e, 0x4d, 0x17 +db 0xaa, 0xb1, 0xe4, 0x55, 0x9b, 0x7c, 0xc2, 0xe7, 0xb6, 0x82, 0x1b, 0x5d, 0x21, 0x20, 0xfc, 0x34 +db 0x51, 0xf7, 0xfd, 0x20, 0x17, 0x4b, 0xd1, 0x9f, 0xc7, 0x2a, 0x57, 0x62, 0x4a, 0x60, 0x3f, 0xfa +db 0x70, 0x75, 0x1a, 0x3e, 0x9d, 0xbd, 0x6c, 0xe3, 0x60, 0xc3, 0xd3, 0xa6, 0x3b, 0x73, 0xa5, 0x4f +db 0x06, 0x79, 0xf4, 0x6e, 0x3a, 0xae, 0xa4, 0x98, 0x86, 0xb9, 0x1b, 0x8b, 0x66, 0xd9, 0x96, 0xdb +db 0xa5, 0x47, 0xd3, 0xa8, 0x05, 0x3c, 0x50, 0x57, 0x8a, 0x8f, 0xe0, 0x7f, 0xaf, 0x75, 0x30, 0x44 +db 0x01, 0xce, 0x17, 0xb8, 0x89, 0xd4, 0x12, 0xaa, 0xe5, 0x2e, 0xe2, 0x75, 0x70, 0x06, 0x02, 0x5c +db 0xbd, 0x85, 0xaa, 0x75, 0x02, 0x98, 0xe0, 0x0f, 0xe9, 0x94, 0x43, 0x84, 0x8c, 0xca, 0xc1, 0x53 +db 0x2f, 0x5c, 0x9a, 0x04, 0x9c, 0x2c, 0x50, 0xc7, 0x6d, 0x13, 0x70, 0x8f, 0x7d, 0xa5, 0x09, 0xc0 +db 0x2b, 0x75, 0x55, 0x57, 0xc0, 0x51, 0xad, 0x86, 0x18, 0xc5, 0x9a, 0x9f, 0x1d, 0x99, 0x3e, 0xbd +db 0x38, 0x24, 0x33, 0xd6, 0x04, 0x98, 0xde, 0x19, 0xcc, 0xb3, 0x72, 0x53, 0x6b, 0xbb, 0x38, 0x03 +db 0xdc, 0x86, 0xe3, 0x1b, 0x12, 0x04, 0x86, 0x92, 0x3d, 0x3f, 0xf4, 0x4d, 0x73, 0x8a, 0xe7, 0x67 +db 0x68, 0xae, 0x63, 0x13, 0x7b, 0x48, 0x90, 0xce, 0x35, 0xfb, 0xf3, 0x46, 0x17, 0xb3, 0xcd, 0x2f +db 0xeb, 0xb5, 0x7a, 0x11, 0xa9, 0xe1, 0xa6, 0xab, 0x0c, 0x9e, 0x9f, 0xd1, 0x08, 0xae, 0xc1, 0x68 +db 0xd2, 0xfc, 0x41, 0x36, 0xa8, 0xf4, 0x97, 0xbf, 0x86, 0x61, 0x90, 0x51, 0x02, 0x2e, 0x9a, 0x64 +db 0x4e, 0xfb, 0xd1, 0xe5, 0x73, 0x24, 0x07, 0xb5, 0x70, 0xa1, 0xa2, 0xb7, 0xcb, 0x0c, 0xbc, 0x1a +db 0x4a, 0x55, 0x9e, 0x3f, 0x3b, 0xdb, 0x33, 0x4c, 0x01, 0x63, 0x1f, 0xbe, 0xae, 0x05, 0x3e, 0x45 +db 0x9e, 0xcf, 0x2e, 0x5f, 0x3b, 0x83, 0x8a, 0xc7, 0xd7, 0x39, 0x3b, 0xfc, 0x54, 0xf0, 0x10, 0x42 +db 0x9d, 0x5e, 0x12, 0xc2, 0xb8, 0x8c, 0x4e, 0x26, 0xd7, 0xa0, 0xa1, 0x7a, 0xc0, 0x27, 0x72, 0x52 +db 0xdb, 0xc5, 0xed, 0xe1, 0x86, 0x19, 0x0a, 0xff, 0x43, 0x3d, 0x1c, 0x12, 0xb2, 0xbe, 0x5c, 0x12 +db 0x4b, 0xbf, 0xff, 0x20, 0xe3, 0xde, 0x4a, 0x74, 0x89, 0x67, 0x42, 0xc3, 0xaf, 0xe3, 0x8a, 0x8a +db 0x57, 0x88, 0xdf, 0xbe, 0x1a, 0x0c, 0x58, 0xa1, 0xfe, 0x21, 0x57, 0x97, 0xf6, 0xef, 0xba, 0x34 +db 0x54, 0x60, 0x00, 0x71, 0x09, 0x4a, 0x5b, 0x89, 0x61, 0x4a, 0x67, 0x19, 0x34, 0x44, 0x83, 0x21 +db 0x3d, 0xeb, 0x67, 0xff, 0xf7, 0x68, 0xbb, 0x29, 0xa0, 0x74, 0x5e, 0xad, 0x78, 0xb4, 0x11, 0xc5 +db 0x5e, 0x0e, 0xc0, 0xd4, 0xe7, 0x50, 0x40, 0xa1, 0xb5, 0x98, 0xdb, 0x75, 0x1f, 0xa5, 0xbc, 0x1b +db 0xeb, 0x13, 0x18, 0x0e, 0x92, 0x54, 0x17, 0x2d, 0x5b, 0xf8, 0x09, 0x50, 0x27, 0x49, 0xf5, 0x01 +db 0xb9, 0x51, 0xd1, 0x85, 0x34, 0x67, 0xd8, 0xb9, 0x5f, 0x01, 0x7b, 0xfc, 0xe7, 0x1e, 0xc8, 0xfc +db 0x2f, 0xda, 0x81, 0xfd, 0x76, 0x69, 0x5b, 0x47, 0x98, 0x1b, 0x9b, 0xee, 0x9b, 0x18, 0x8e, 0x30 +db 0x85, 0x9d, 0x45, 0xde, 0xa8, 0x9b, 0x4e, 0x57, 0x26, 0x90, 0x0b, 0x9a, 0xe0, 0xf7, 0xfa, 0x08 +db 0x1d, 0xe3, 0xca, 0xb8, 0xaa, 0xda, 0x4e, 0xe3, 0xb6, 0x33, 0x05, 0x9a, 0x75, 0x70, 0x18, 0x86 +db 0x60, 0x31, 0xc1, 0x05, 0x56, 0x02, 0x30, 0xbd, 0xff, 0x3b, 0xa9, 0xca, 0xe4, 0x84, 0xe6, 0x96 +db 0x47, 0xcf, 0x8b, 0xa8, 0xd4, 0x63, 0x8f, 0x8f, 0x55, 0x4a, 0xbc, 0x4c, 0x3c, 0x61, 0x96, 0x38 +db 0xcc, 0x10, 0x7e, 0x4e, 0x5c, 0x97, 0xd3, 0x54, 0x22, 0xde, 0xfb, 0x03, 0x81, 0x4e, 0x6d, 0x76 +db 0xb5, 0xab, 0x8f, 0xba, 0xf5, 0xf0, 0x1a, 0xf9, 0x69, 0x64, 0x30, 0xb3, 0x19, 0x30, 0x54, 0x97 +db 0x14, 0x66, 0x5c, 0xcf, 0x48, 0x0f, 0x74, 0xf3, 0xbe, 0x16, 0x10, 0x6c, 0xb4, 0x93, 0x86, 0xd1 +db 0x21, 0xd0, 0x6a, 0x12, 0x35, 0x03, 0x45, 0x99, 0xaa, 0xe1, 0x0a, 0xd9, 0x58, 0x83, 0x2f, 0x97 +db 0xcb, 0x0d, 0x81, 0x4b, 0x82, 0x01, 0x6f, 0xd6, 0x20, 0xee, 0xf3, 0xbf, 0xdc, 0x3d, 0x67, 0x6c +db 0xa5, 0x7c, 0x6d, 0x21, 0x09, 0x99, 0x2e, 0x0a, 0x98, 0x7c, 0x50, 0x56, 0x19, 0x54, 0xcc, 0x79 +db 0xe1, 0x84, 0x18, 0x86, 0xf8, 0x5a, 0x1b, 0xf7, 0x1f, 0x38, 0xe0, 0x3a, 0xb9, 0x50, 0xc1, 0xf1 +db 0xbe, 0x66, 0x89, 0xe2, 0x68, 0x4a, 0x11, 0x0b, 0xfb, 0x84, 0x02, 0x38, 0x31, 0xf4, 0xda, 0x50 +db 0xb6, 0x5f, 0x27, 0x62, 0xc7, 0x5a, 0x0f, 0x99, 0xb7, 0x7e, 0x4a, 0x49, 0xe9, 0x67, 0xe0, 0xa5 +db 0x0d, 0x08, 0x95, 0xf0, 0xe4, 0x3b, 0x62, 0x30, 0x2b, 0x89, 0x21, 0xdd, 0x52, 0x99, 0x12, 0x16 +db 0x83, 0x94, 0x6a, 0x38, 0x1f, 0x8d, 0x81, 0xbf, 0x1f, 0xf9, 0xe0, 0x9c, 0x80, 0xcc, 0x7c, 0xfe +db 0x33, 0x35, 0x27, 0x26, 0xca, 0xcc, 0x1f, 0x43, 0xcd, 0xb0, 0x74, 0x0e, 0xff, 0x1c, 0x86, 0x43 +db 0xab, 0x44, 0xbc, 0x31, 0xff, 0xa4, 0x54, 0x95, 0xd4, 0x79, 0x9e, 0xc0, 0xed, 0x87, 0x1c, 0x2e +db 0x50, 0x47, 0xad, 0xc0, 0x2f, 0x5e, 0x8c, 0x15, 0xfb, 0x86, 0x2c, 0xa5, 0x61, 0x2a, 0x60, 0x12 +db 0xbc, 0x1f, 0x84, 0xe9, 0x75, 0x55, 0x7e, 0x2c, 0x11, 0xd0, 0xfc, 0x66, 0x89, 0x86, 0x2f, 0x26 +db 0x43, 0x1e, 0xa6, 0x6c, 0xa6, 0x40, 0xa9, 0x37, 0x65, 0x99, 0x72, 0xe1, 0x1a, 0xdc, 0x23, 0x53 +db 0x09, 0x8e, 0xa1, 0xd6, 0xda, 0xd9, 0x95, 0xaf, 0x58, 0xe0, 0x2a, 0x4a, 0xd3, 0xbd, 0xbd, 0x86 + diff --git a/unittests/ASM/VEX/sha512.asm b/unittests/ASM/VEX/sha512.asm new file mode 100644 index 0000000000..2b931bb6a3 --- /dev/null +++ b/unittests/ASM/VEX/sha512.asm @@ -0,0 +1,282 @@ +%ifdef CONFIG +{ + "HostFeatures": ["SHA512"], + "RegData": { + "XMM0": ["0x6f221b6bfda4acda", "0xb5808945640ef458", "0x36af5f2311e7688f", "0xb2c3a7d2a7dca9d3"], + "XMM1": ["0x8febeb2652f67a8b", "0xfd7df914b59ef15b", "0xb117bca3111eb9cc", "0x68d1f83ebccbf141"], + "XMM2": ["0x3cb04da6e3ac61ea", "0xf9e3da02d1d0d718", "0xc766d5b99e733da1", "0xeb6bd1ff18bf8bb3"], + "XMM3": ["0x14ced4b4619266aa", "0x1c51c6d03d27869c", "0x463b30252d0bd4a0", "0x0a5aaa4a05b50723"] + } +} +%endif + +vmovups ymm0, [rel .random_data + (32 * 0)] +vmovups ymm1, [rel .random_data + (32 * 1)] +vmovups ymm2, [rel .random_data + (32 * 2)] +vmovups ymm3, [rel .random_data + (32 * 3)] + +db 0xc4, 0xe2, 0x77, 0xcb, 0xc2 ; vsha512rnds2 ymm0, ymm1, xmm2 +db 0xc4, 0xe2, 0x7f, 0xcc, 0xca ; vsha512msg1 ymm1, xmm2 +db 0xc4, 0xe2, 0x7f, 0xcd, 0xd3 ; vsha512msg2 ymm2, ymm3 + +hlt + +align 4096 +; 4096 bytes of random data. +.random_data: +db 0x5b, 0x27, 0x12, 0x29, 0xab, 0x84, 0xa2, 0x21, 0x6d, 0x27, 0xbe, 0x3d, 0x17, 0x05, 0x99, 0xb0 +db 0xf3, 0xe2, 0x19, 0xf4, 0x42, 0xbb, 0x69, 0x02, 0x67, 0x3a, 0xab, 0x86, 0x9e, 0xda, 0x9f, 0xd5 +db 0xba, 0xd4, 0x2d, 0x9d, 0x20, 0x3d, 0xf8, 0xb2, 0x29, 0xc3, 0xc3, 0x98, 0xa8, 0x30, 0x92, 0xe9 +db 0x5a, 0x75, 0x0c, 0xcb, 0x28, 0x28, 0xb4, 0x90, 0x93, 0x16, 0x45, 0x10, 0x3a, 0x5d, 0x96, 0x67 +db 0xf9, 0x31, 0xbe, 0x48, 0x78, 0xe8, 0x5a, 0xf2, 0x66, 0x29, 0xd9, 0x80, 0x50, 0x80, 0xcb, 0x07 +db 0xfe, 0xda, 0x19, 0x0f, 0x22, 0xea, 0x18, 0x5e, 0x12, 0xea, 0x3d, 0x1a, 0xbc, 0x91, 0x51, 0x15 +db 0xaa, 0x66, 0x92, 0x61, 0xb4, 0xd4, 0xce, 0x14, 0x9c, 0x86, 0x27, 0x3d, 0xd0, 0xc6, 0x51, 0x1c +db 0xa0, 0xd4, 0x0b, 0x2d, 0x25, 0x30, 0x3b, 0x46, 0x23, 0x07, 0xb5, 0x05, 0x4a, 0xaa, 0x5a, 0x0a +db 0x7b, 0x29, 0xe4, 0x52, 0x6f, 0x6f, 0xc8, 0x62, 0xb8, 0x94, 0x6a, 0x30, 0x66, 0xf1, 0x21, 0xec +db 0xd1, 0xf2, 0x68, 0xda, 0xb7, 0x7f, 0x5a, 0x26, 0x38, 0x46, 0x48, 0xda, 0x5d, 0x64, 0x8d, 0x3d +db 0x2f, 0xf6, 0xc3, 0x63, 0xb8, 0x09, 0x3a, 0xd0, 0x5b, 0xeb, 0x67, 0xd0, 0xaa, 0x63, 0x71, 0x19 +db 0x7e, 0x4e, 0x33, 0xe2, 0x15, 0xba, 0x87, 0xa7, 0x7b, 0x25, 0xe4, 0xbb, 0xb5, 0x26, 0x9a, 0xf1 +db 0xdd, 0x5a, 0x63, 0xd7, 0x16, 0xc0, 0xc3, 0xc8, 0x1b, 0xad, 0x00, 0x52, 0x63, 0x55, 0xc7, 0xe0 +db 0xd9, 0xe9, 0xf4, 0x4c, 0x53, 0xfb, 0x73, 0x57, 0xdc, 0xad, 0x0c, 0xca, 0x73, 0x44, 0x6b, 0xf3 +db 0xb7, 0x83, 0x3b, 0xfe, 0xf0, 0x15, 0xbf, 0xe5, 0x15, 0xca, 0xdf, 0x35, 0xeb, 0xe7, 0xe3, 0xa2 +db 0xbd, 0x20, 0xad, 0xff, 0x1b, 0x67, 0x0a, 0x9f, 0x60, 0x60, 0xff, 0xa7, 0xc9, 0x19, 0xde, 0xb3 +db 0x67, 0xf1, 0x4b, 0x77, 0x7f, 0x0b, 0xb1, 0x29, 0xee, 0xcb, 0xd6, 0x5d, 0x0d, 0xb9, 0x54, 0x49 +db 0x10, 0xe3, 0xbd, 0x8a, 0xa0, 0x69, 0xa3, 0x07, 0xbe, 0x8e, 0xea, 0xc6, 0x75, 0x27, 0x66, 0xae +db 0x3c, 0xde, 0xc6, 0x13, 0x1b, 0x50, 0x37, 0x56, 0x7c, 0x01, 0xab, 0x8b, 0x46, 0xdc, 0x80, 0xed +db 0xdf, 0x12, 0x6f, 0x64, 0xdf, 0xe6, 0xf9, 0xbf, 0x15, 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0xc1, 0x68 +db 0xd2, 0xfc, 0x41, 0x36, 0xa8, 0xf4, 0x97, 0xbf, 0x86, 0x61, 0x90, 0x51, 0x02, 0x2e, 0x9a, 0x64 +db 0x4e, 0xfb, 0xd1, 0xe5, 0x73, 0x24, 0x07, 0xb5, 0x70, 0xa1, 0xa2, 0xb7, 0xcb, 0x0c, 0xbc, 0x1a +db 0x4a, 0x55, 0x9e, 0x3f, 0x3b, 0xdb, 0x33, 0x4c, 0x01, 0x63, 0x1f, 0xbe, 0xae, 0x05, 0x3e, 0x45 +db 0x9e, 0xcf, 0x2e, 0x5f, 0x3b, 0x83, 0x8a, 0xc7, 0xd7, 0x39, 0x3b, 0xfc, 0x54, 0xf0, 0x10, 0x42 +db 0x9d, 0x5e, 0x12, 0xc2, 0xb8, 0x8c, 0x4e, 0x26, 0xd7, 0xa0, 0xa1, 0x7a, 0xc0, 0x27, 0x72, 0x52 +db 0xdb, 0xc5, 0xed, 0xe1, 0x86, 0x19, 0x0a, 0xff, 0x43, 0x3d, 0x1c, 0x12, 0xb2, 0xbe, 0x5c, 0x12 +db 0x4b, 0xbf, 0xff, 0x20, 0xe3, 0xde, 0x4a, 0x74, 0x89, 0x67, 0x42, 0xc3, 0xaf, 0xe3, 0x8a, 0x8a +db 0x57, 0x88, 0xdf, 0xbe, 0x1a, 0x0c, 0x58, 0xa1, 0xfe, 0x21, 0x57, 0x97, 0xf6, 0xef, 0xba, 0x34 +db 0x54, 0x60, 0x00, 0x71, 0x09, 0x4a, 0x5b, 0x89, 0x61, 0x4a, 0x67, 0x19, 0x34, 0x44, 0x83, 0x21 +db 0x3d, 0xeb, 0x67, 0xff, 0xf7, 0x68, 0xbb, 0x29, 0xa0, 0x74, 0x5e, 0xad, 0x78, 0xb4, 0x11, 0xc5 +db 0x5e, 0x0e, 0xc0, 0xd4, 0xe7, 0x50, 0x40, 0xa1, 0xb5, 0x98, 0xdb, 0x75, 0x1f, 0xa5, 0xbc, 0x1b +db 0xeb, 0x13, 0x18, 0x0e, 0x92, 0x54, 0x17, 0x2d, 0x5b, 0xf8, 0x09, 0x50, 0x27, 0x49, 0xf5, 0x01 +db 0xb9, 0x51, 0xd1, 0x85, 0x34, 0x67, 0xd8, 0xb9, 0x5f, 0x01, 0x7b, 0xfc, 0xe7, 0x1e, 0xc8, 0xfc +db 0x2f, 0xda, 0x81, 0xfd, 0x76, 0x69, 0x5b, 0x47, 0x98, 0x1b, 0x9b, 0xee, 0x9b, 0x18, 0x8e, 0x30 +db 0x85, 0x9d, 0x45, 0xde, 0xa8, 0x9b, 0x4e, 0x57, 0x26, 0x90, 0x0b, 0x9a, 0xe0, 0xf7, 0xfa, 0x08 +db 0x1d, 0xe3, 0xca, 0xb8, 0xaa, 0xda, 0x4e, 0xe3, 0xb6, 0x33, 0x05, 0x9a, 0x75, 0x70, 0x18, 0x86 +db 0x60, 0x31, 0xc1, 0x05, 0x56, 0x02, 0x30, 0xbd, 0xff, 0x3b, 0xa9, 0xca, 0xe4, 0x84, 0xe6, 0x96 +db 0x47, 0xcf, 0x8b, 0xa8, 0xd4, 0x63, 0x8f, 0x8f, 0x55, 0x4a, 0xbc, 0x4c, 0x3c, 0x61, 0x96, 0x38 +db 0xcc, 0x10, 0x7e, 0x4e, 0x5c, 0x97, 0xd3, 0x54, 0x22, 0xde, 0xfb, 0x03, 0x81, 0x4e, 0x6d, 0x76 +db 0xb5, 0xab, 0x8f, 0xba, 0xf5, 0xf0, 0x1a, 0xf9, 0x69, 0x64, 0x30, 0xb3, 0x19, 0x30, 0x54, 0x97 +db 0x14, 0x66, 0x5c, 0xcf, 0x48, 0x0f, 0x74, 0xf3, 0xbe, 0x16, 0x10, 0x6c, 0xb4, 0x93, 0x86, 0xd1 +db 0x21, 0xd0, 0x6a, 0x12, 0x35, 0x03, 0x45, 0x99, 0xaa, 0xe1, 0x0a, 0xd9, 0x58, 0x83, 0x2f, 0x97 +db 0xcb, 0x0d, 0x81, 0x4b, 0x82, 0x01, 0x6f, 0xd6, 0x20, 0xee, 0xf3, 0xbf, 0xdc, 0x3d, 0x67, 0x6c +db 0xa5, 0x7c, 0x6d, 0x21, 0x09, 0x99, 0x2e, 0x0a, 0x98, 0x7c, 0x50, 0x56, 0x19, 0x54, 0xcc, 0x79 +db 0xe1, 0x84, 0x18, 0x86, 0xf8, 0x5a, 0x1b, 0xf7, 0x1f, 0x38, 0xe0, 0x3a, 0xb9, 0x50, 0xc1, 0xf1 +db 0xbe, 0x66, 0x89, 0xe2, 0x68, 0x4a, 0x11, 0x0b, 0xfb, 0x84, 0x02, 0x38, 0x31, 0xf4, 0xda, 0x50 +db 0xb6, 0x5f, 0x27, 0x62, 0xc7, 0x5a, 0x0f, 0x99, 0xb7, 0x7e, 0x4a, 0x49, 0xe9, 0x67, 0xe0, 0xa5 +db 0x0d, 0x08, 0x95, 0xf0, 0xe4, 0x3b, 0x62, 0x30, 0x2b, 0x89, 0x21, 0xdd, 0x52, 0x99, 0x12, 0x16 +db 0x83, 0x94, 0x6a, 0x38, 0x1f, 0x8d, 0x81, 0xbf, 0x1f, 0xf9, 0xe0, 0x9c, 0x80, 0xcc, 0x7c, 0xfe +db 0x33, 0x35, 0x27, 0x26, 0xca, 0xcc, 0x1f, 0x43, 0xcd, 0xb0, 0x74, 0x0e, 0xff, 0x1c, 0x86, 0x43 +db 0xab, 0x44, 0xbc, 0x31, 0xff, 0xa4, 0x54, 0x95, 0xd4, 0x79, 0x9e, 0xc0, 0xed, 0x87, 0x1c, 0x2e +db 0x50, 0x47, 0xad, 0xc0, 0x2f, 0x5e, 0x8c, 0x15, 0xfb, 0x86, 0x2c, 0xa5, 0x61, 0x2a, 0x60, 0x12 +db 0xbc, 0x1f, 0x84, 0xe9, 0x75, 0x55, 0x7e, 0x2c, 0x11, 0xd0, 0xfc, 0x66, 0x89, 0x86, 0x2f, 0x26 +db 0x43, 0x1e, 0xa6, 0x6c, 0xa6, 0x40, 0xa9, 0x37, 0x65, 0x99, 0x72, 0xe1, 0x1a, 0xdc, 0x23, 0x53 +db 0x09, 0x8e, 0xa1, 0xd6, 0xda, 0xd9, 0x95, 0xaf, 0x58, 0xe0, 0x2a, 0x4a, 0xd3, 0xbd, 0xbd, 0x86 diff --git a/unittests/ASM/VEX/vbcstnebf162ps.asm b/unittests/ASM/VEX/vbcstnebf162ps.asm new file mode 100644 index 0000000000..8c1ebf1a4a --- /dev/null +++ b/unittests/ASM/VEX/vbcstnebf162ps.asm @@ -0,0 +1,63 @@ +%ifdef CONFIG +{ + "RegData": { + "XMM0": ["0x8142000081420000", "0x8142000081420000", "0", "0"], + "XMM1": ["0x8142000081420000", "0x8142000081420000", "0x8142000081420000", "0x8142000081420000"], + "XMM2": ["0xffff0000ffff0000", "0xffff0000ffff0000", "0", "0"], + "XMM3": ["0xffff0000ffff0000", "0xffff0000ffff0000", "0xffff0000ffff0000", "0xffff0000ffff0000"], + "XMM4": ["0x0001000000010000", "0x0001000000010000", "0", "0"], + "XMM5": ["0x0001000000010000", "0x0001000000010000", "0x0001000000010000", "0x0001000000010000"], + "XMM6": ["0xff800000ff800000", "0xff800000ff800000", "0", "0"], + "XMM7": ["0xff800000ff800000", "0xff800000ff800000", "0xff800000ff800000", "0xff800000ff800000"], + "XMM8": ["0x7f8000007f800000", "0x7f8000007f800000", "0", "0"], + "XMM9": ["0x7f8000007f800000", "0x7f8000007f800000", "0x7f8000007f800000", "0x7f8000007f800000"] + }, + "HostFeatures": ["AVX_NE_CONVERT"] +} +%endif + +; Tests bfloat16 convert and broadcast. +; Does not round, is exact. +vmovups ymm0, [rel .data_junk] +vmovups ymm1, [rel .data_junk] +vmovups ymm2, [rel .data_junk] +vmovups ymm3, [rel .data_junk] +vmovups ymm4, [rel .data_junk] +vmovups ymm5, [rel .data_junk] +vmovups ymm6, [rel .data_junk] +vmovups ymm7, [rel .data_junk] +vmovups ymm8, [rel .data_junk] +vmovups ymm9, [rel .data_junk] + +; Old nasm can't encode these. +db 0xc4, 0xe2, 0x7a, 0xb1, 0x05, 0xa7, 0x0f, 0x00, 0x00 ; vbcstnebf162ps xmm0, [rel .data] +db 0xc4, 0xe2, 0x7e, 0xb1, 0x0d, 0x9e, 0x0f, 0x00, 0x00 ; vbcstnebf162ps ymm1, [rel .data] +db 0xc4, 0xe2, 0x7a, 0xb1, 0x15, 0x97, 0x0f, 0x00, 0x00 ; vbcstnebf162ps xmm2, [rel .data2] +db 0xc4, 0xe2, 0x7e, 0xb1, 0x1d, 0x8e, 0x0f, 0x00, 0x00 ; vbcstnebf162ps ymm3, [rel .data2] +db 0xc4, 0xe2, 0x7a, 0xb1, 0x25, 0x87, 0x0f, 0x00, 0x00 ; vbcstnebf162ps xmm4, [rel .data3] +db 0xc4, 0xe2, 0x7e, 0xb1, 0x2d, 0x7e, 0x0f, 0x00, 0x00 ; vbcstnebf162ps ymm5, [rel .data3] +db 0xc4, 0xe2, 0x7a, 0xb1, 0x35, 0x77, 0x0f, 0x00, 0x00 ; vbcstnebf162ps xmm6, [rel .data4] +db 0xc4, 0xe2, 0x7e, 0xb1, 0x3d, 0x6e, 0x0f, 0x00, 0x00 ; vbcstnebf162ps ymm7, [rel .data4] +db 0xc4, 0x62, 0x7a, 0xb1, 0x05, 0x67, 0x0f, 0x00, 0x00 ; vbcstnebf162ps xmm8, [rel .data5] +db 0xc4, 0x62, 0x7e, 0xb1, 0x0d, 0x5e, 0x0f, 0x00, 0x00 ; vbcstnebf162ps ymm9, [rel .data5] + +hlt + +align 4096 +.data: +dw 0x8142 ; Regular number +.data2: +dw 0xFFFF ; NaN +.data3: +dw 0x0001 ; Subnormal +.data4: +dw 0xFF80 ; -infinity +.data5: +dw 0x7F80 ; +infinity + +.data_junk: +dq 0x4142434445464748 +dq 0x5152535455565758 +dq 0x6162636465666768 +dq 0x7172737475767778 + diff --git a/unittests/ASM/VEX/vbcstnesh2ps.asm b/unittests/ASM/VEX/vbcstnesh2ps.asm new file mode 100644 index 0000000000..de77906bbb --- /dev/null +++ b/unittests/ASM/VEX/vbcstnesh2ps.asm @@ -0,0 +1,62 @@ +%ifdef CONFIG +{ + "RegData": { + "XMM0": ["0xb7a10000b7a10000", "0xb7a10000b7a10000", "0", "0"], + "XMM1": ["0xb7a10000b7a10000", "0xb7a10000b7a10000", "0xb7a10000b7a10000", "0xb7a10000b7a10000"], + "XMM2": ["0xffffe000ffffe000", "0xffffe000ffffe000", "0", "0"], + "XMM3": ["0xffffe000ffffe000", "0xffffe000ffffe000", "0xffffe000ffffe000", "0xffffe000ffffe000"], + "XMM4": ["0x3380000033800000", "0x3380000033800000", "0", "0"], + "XMM5": ["0x3380000033800000", "0x3380000033800000", "0x3380000033800000", "0x3380000033800000"], + "XMM6": ["0xfff00000fff00000", "0xfff00000fff00000", "0", "0"], + "XMM7": ["0xfff00000fff00000", "0xfff00000fff00000", "0xfff00000fff00000", "0xfff00000fff00000"], + "XMM8": ["0x7ff000007ff00000", "0x7ff000007ff00000", "0", "0"], + "XMM9": ["0x7ff000007ff00000", "0x7ff000007ff00000", "0x7ff000007ff00000", "0x7ff000007ff00000"] + }, + "HostFeatures": ["AVX_NE_CONVERT"] +} +%endif + +; Tests float16 convert and broadcast. +; Does not round, is exact. +vmovups ymm0, [rel .data_junk] +vmovups ymm1, [rel .data_junk] +vmovups ymm2, [rel .data_junk] +vmovups ymm3, [rel .data_junk] +vmovups ymm4, [rel .data_junk] +vmovups ymm5, [rel .data_junk] +vmovups ymm6, [rel .data_junk] +vmovups ymm7, [rel .data_junk] +vmovups ymm8, [rel .data_junk] +vmovups ymm9, [rel .data_junk] + +; Old nasm can't encode these. +db 0xc4, 0xe2, 0x79, 0xb1, 0x05, 0xa7, 0x0f, 0x00, 0x00 ; vbcstnesh2ps xmm0, [rel .data] +db 0xc4, 0xe2, 0x7d, 0xb1, 0x0d, 0x9e, 0x0f, 0x00, 0x00 ; vbcstnesh2ps ymm1, [rel .data] +db 0xc4, 0xe2, 0x79, 0xb1, 0x15, 0x97, 0x0f, 0x00, 0x00 ; vbcstnesh2ps xmm2, [rel .data2] +db 0xc4, 0xe2, 0x7d, 0xb1, 0x1d, 0x8e, 0x0f, 0x00, 0x00 ; vbcstnesh2ps ymm3, [rel .data2] +db 0xc4, 0xe2, 0x79, 0xb1, 0x25, 0x87, 0x0f, 0x00, 0x00 ; vbcstnesh2ps xmm4, [rel .data3] +db 0xc4, 0xe2, 0x7d, 0xb1, 0x2d, 0x7e, 0x0f, 0x00, 0x00 ; vbcstnesh2ps ymm5, [rel .data3] +db 0xc4, 0xe2, 0x79, 0xb1, 0x35, 0x77, 0x0f, 0x00, 0x00 ; vbcstnesh2ps xmm6, [rel .data4] +db 0xc4, 0xe2, 0x7d, 0xb1, 0x3d, 0x6e, 0x0f, 0x00, 0x00 ; vbcstnesh2ps ymm7, [rel .data4] +db 0xc4, 0x62, 0x79, 0xb1, 0x05, 0x67, 0x0f, 0x00, 0x00 ; vbcstnesh2ps xmm8, [rel .data5] +db 0xc4, 0x62, 0x7d, 0xb1, 0x0d, 0x5e, 0x0f, 0x00, 0x00 ; vbcstnesh2ps ymm9, [rel .data5] + +hlt + +align 4096 +.data: +dw 0x8142 ; Regular number +.data2: +dw 0xFFFF ; NaN +.data3: +dw 0x0001 ; Subnormal +.data4: +dw 0xFF80 ; -infinity +.data5: +dw 0x7F80 ; +infinity + +.data_junk: +dq 0x4142434445464748 +dq 0x5152535455565758 +dq 0x6162636465666768 +dq 0x7172737475767778 diff --git a/unittests/ASM/VEX/vcvtneebf162ps.asm b/unittests/ASM/VEX/vcvtneebf162ps.asm new file mode 100644 index 0000000000..97b0cf5f04 --- /dev/null +++ b/unittests/ASM/VEX/vcvtneebf162ps.asm @@ -0,0 +1,37 @@ +%ifdef CONFIG +{ + "RegData": { + "XMM0": ["0x0001000081420000", "0x454600007f800000", "0", "0"], + "XMM1": ["0x0001000081420000", "0x454600007f800000", "0x5556000041420000", "0x6566000051520000"] + }, + "HostFeatures": ["AVX_NE_CONVERT"] +} +%endif + +; Test bfloat16 convert vector-even. +; Does not round, is exact. +vmovups ymm0, [rel .data_junk] +vmovups ymm1, [rel .data_junk] + +; Old nasm can't encode these. +db 0xc4, 0xe2, 0x7a, 0xb0, 0x05, 0xe7, 0x0f, 0x00, 0x00 ; vcvtneebf162ps xmm0, [rel .data] +db 0xc4, 0xe2, 0x7e, 0xb0, 0x0d, 0xde, 0x0f, 0x00, 0x00 ; vcvtneebf162ps ymm1, [rel .data] +hlt + +align 4096 +.data: +dw 0x8142 ; Regular number +.data2: +dw 0xFFFF ; NaN +.data3: +dw 0x0001 ; Subnormal +.data4: +dw 0xFF80 ; -infinity +.data5: +dw 0x7F80 ; +infinity + +.data_junk: +dq 0x4142434445464748 +dq 0x5152535455565758 +dq 0x6162636465666768 +dq 0x7172737475767778 diff --git a/unittests/ASM/VEX/vcvtneeph2ps.asm b/unittests/ASM/VEX/vcvtneeph2ps.asm new file mode 100644 index 0000000000..d9e7acc273 --- /dev/null +++ b/unittests/ASM/VEX/vcvtneeph2ps.asm @@ -0,0 +1,37 @@ +%ifdef CONFIG +{ + "RegData": { + "XMM0": ["0x33800000b7a10000", "0x40a8c0007ff00000", "0", "0"], + "XMM1": ["0x33800000b7a10000", "0x40a8c0007ff00000", "0x42aac00040284000", "0x44acc000422a4000"] + }, + "HostFeatures": ["AVX_NE_CONVERT"] +} +%endif + +; Test float16 convert vector-even. +; Does not round, is exact. +vmovups ymm0, [rel .data_junk] +vmovups ymm1, [rel .data_junk] + +; Old nasm can't encode these. +db 0xc4, 0xe2, 0x79, 0xb0, 0x05, 0xe7, 0x0f, 0x00, 0x00 ; vcvtneeph2ps xmm0, [rel .data] +db 0xc4, 0xe2, 0x7d, 0xb0, 0x0d, 0xde, 0x0f, 0x00, 0x00 ; vcvtneeph2ps ymm1, [rel .data] +hlt + +align 4096 +.data: +dw 0x8142 ; Regular number +.data2: +dw 0xFFFF ; NaN +.data3: +dw 0x0001 ; Subnormal +.data4: +dw 0xFF80 ; -infinity +.data5: +dw 0x7F80 ; +infinity + +.data_junk: +dq 0x4142434445464748 +dq 0x5152535455565758 +dq 0x6162636465666768 +dq 0x7172737475767778 diff --git a/unittests/ASM/VEX/vcvtneobf162ps.asm b/unittests/ASM/VEX/vcvtneobf162ps.asm new file mode 100644 index 0000000000..e71d9025c7 --- /dev/null +++ b/unittests/ASM/VEX/vcvtneobf162ps.asm @@ -0,0 +1,37 @@ +%ifdef CONFIG +{ + "RegData": { + "XMM0": ["0xff800000ffff0000", "0x4344000047480000", "0", "0"], + "XMM1": ["0xff800000ffff0000", "0x4344000047480000", "0x5354000057580000", "0x6364000067680000"] + }, + "HostFeatures": ["AVX_NE_CONVERT"] +} +%endif + +; Test bfloat16 convert vector-odd. +; Does not round, is exact. +vmovups ymm0, [rel .data_junk] +vmovups ymm1, [rel .data_junk] + +; Old nasm can't encode these. +db 0xc4, 0xe2, 0x7b, 0xb0, 0x05, 0xe7, 0x0f, 0x00, 0x00 ; vcvtneobf162ps xmm0, [rel .data] +db 0xc4, 0xe2, 0x7f, 0xb0, 0x0d, 0xde, 0x0f, 0x00, 0x00 ; vcvtneobf162ps ymm1, [rel .data] +hlt + +align 4096 +.data: +dw 0x8142 ; Regular number +.data2: +dw 0xFFFF ; NaN +.data3: +dw 0x0001 ; Subnormal +.data4: +dw 0xFF80 ; -infinity +.data5: +dw 0x7F80 ; +infinity + +.data_junk: +dq 0x4142434445464748 +dq 0x5152535455565758 +dq 0x6162636465666768 +dq 0x7172737475767778 diff --git a/unittests/ASM/VEX/vcvtneoph2ps.asm b/unittests/ASM/VEX/vcvtneoph2ps.asm new file mode 100644 index 0000000000..1dcb85ff66 --- /dev/null +++ b/unittests/ASM/VEX/vcvtneoph2ps.asm @@ -0,0 +1,37 @@ +%ifdef CONFIG +{ + "RegData": { + "XMM0": ["0xfff00000ffffe000", "0x4068800040e90000", "0", "0"], + "XMM1": ["0xfff00000ffffe000", "0x4068800040e90000", "0x426a800042eb0000", "0x446c800044ed0000"] + }, + "HostFeatures": ["AVX_NE_CONVERT"] +} +%endif + +; Test float16 convert vector-odd. +; Does not round, is exact. +vmovups ymm0, [rel .data_junk] +vmovups ymm1, [rel .data_junk] + +; Old nasm can't encode these. +db 0xc4, 0xe2, 0x78, 0xb0, 0x05, 0xe7, 0x0f, 0x00, 0x00 ; vcvtneoph2ps xmm0, [rel .data] +db 0xc4, 0xe2, 0x7c, 0xb0, 0x0d, 0xde, 0x0f, 0x00, 0x00 ; vcvtneoph2ps ymm1, [rel .data] +hlt + +align 4096 +.data: +dw 0x8142 ; Regular number +.data2: +dw 0xFFFF ; NaN +.data3: +dw 0x0001 ; Subnormal +.data4: +dw 0xFF80 ; -infinity +.data5: +dw 0x7F80 ; +infinity + +.data_junk: +dq 0x4142434445464748 +dq 0x5152535455565758 +dq 0x6162636465666768 +dq 0x7172737475767778 diff --git a/unittests/ASM/VEX/vcvtneps2bf16.asm b/unittests/ASM/VEX/vcvtneps2bf16.asm new file mode 100644 index 0000000000..e0fad5aa84 --- /dev/null +++ b/unittests/ASM/VEX/vcvtneps2bf16.asm @@ -0,0 +1,50 @@ +%ifdef CONFIG +{ + "RegData": { + "XMM0": ["0xff800000ffff8142", "0", "0", "0"], + "XMM1": ["0xff800000ffff8142", "0x8000cf853f857f80", "0", "0"], + "XMM2": ["0xff800000ffff8142", "0", "0", "0"], + "XMM3": ["0xff800000ffff8142", "0x8000cf853f857f80", "0", "0"], + "XMM4": ["0xffffffff81420000", "0xff80000000000001", "0x3f8555557f800000", "0x80000000cf855555"] + }, + "HostFeatures": ["AVX_NE_CONVERT"] +} +%endif + +; Test float32->bfloat16 convert. +; Rounding mode is always `Round to nearest (even)` +; ARM alt-mode float handling ensures this is true when converted to BFCVTN. +; Convert 4 or 8 float numbers to bfloat16. + +vmovups ymm0, [rel .data_junk] +vmovups ymm1, [rel .data_junk] +vmovups ymm2, [rel .data_junk] +vmovups ymm3, [rel .data_junk] + +; And one register for testing register variants. +vmovups ymm4, [rel .data] + +; nasm fails to support encoding these as vex. +db 0xc4, 0xe2, 0x7a, 0x72, 0x05, 0xcf, 0x0f, 0x00, 0x00 ; {vex} vcvtneps2bf16 xmm0, [rel .data] +db 0xc4, 0xe2, 0x7e, 0x72, 0x0d, 0xc6, 0x0f, 0x00, 0x00 ; {vex} vcvtneps2bf16 xmm1, yword [rel .data] +db 0xc4, 0xe2, 0x7a, 0x72, 0xd4 ; {vex} vcvtneps2bf16 xmm2, xmm4 +db 0xc4, 0xe2, 0x7e, 0x72, 0xdc ; {vex} vcvtneps2bf16 xmm3, ymm4 + +hlt + +align 4096 +.data: +dd 0x81420000 ; Regular number +dd 0xFFFFFFFF ; NaN +dd 0x00000001 ; Subnormal +dd 0xFF800000 ; -infinity +dd 0x7F800000 ; +infinity +dd 0x3f855555 ; Positive large number +dd 0xcf855555 ; Negative large number +dd 0x80000000 ; Negative zero + +.data_junk: +dq 0x4142434445464748 +dq 0x5152535455565758 +dq 0x6162636465666768 +dq 0x7172737475767778 diff --git a/unittests/ASM/VEX/vpmadd52huq.asm b/unittests/ASM/VEX/vpmadd52huq.asm new file mode 100644 index 0000000000..14563a10c7 --- /dev/null +++ b/unittests/ASM/VEX/vpmadd52huq.asm @@ -0,0 +1,293 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX_IFMA"], + "RegData": { + "XMM0": ["0x21a82293d41f8215", "0xb09a981b7078d5e4", "0", "0"], + "XMM1": ["0xb2fddb09483b2f74", "0xe993c3accb7e71a0", "0", "0"], + "XMM2": ["0xf262ba1d4d654bcf", "0x07cbb78b7e149165", "0x5e20418801b95e42", "0x155a7eff1cd34a20"], + "XMM3": ["0x14d6a65966398080", "0x1c51fe0b3a62ee9b", "0x4642878b1fab57e4", "0x0a63978d084a6731"], + "XMM4": ["0x62c86f6f52e4297b", "0xec21f166306a94b8", "0x265a7fb7da68f2d1", "0x3d8d645dda484638"] + } +} +%endif + +vmovups ymm0, [rel .random_data + (32 * 0)] +vmovups ymm1, [rel .random_data + (32 * 1)] +vmovups ymm2, [rel .random_data + (32 * 2)] +vmovups ymm3, [rel .random_data + (32 * 3)] +vmovups ymm4, [rel .random_data + (32 * 4)] + +; 128-bit +db 0xc4, 0xe2, 0xf1, 0xb5, 0xc2 ; {vex} vpmadd52huq xmm0, xmm1, xmm2 + +; Overlap for fun. +db 0xc4, 0xe2, 0xf1, 0xb5, 0xca ; {vex} vpmadd52huq xmm1, xmm1, xmm2 + +; 256-bit +db 0xc4, 0xe2, 0xe5, 0xb5, 0xd4 ; {vex} vpmadd52huq ymm2, ymm3, ymm4 + +; Overlap for fun. +db 0xc4, 0xe2, 0xe5, 0xb5, 0xdc ; {vex} vpmadd52huq ymm3, ymm3, ymm4 + +hlt + +align 4096 +; 4096 bytes of random data. +.random_data: +db 0x5b, 0x27, 0x12, 0x29, 0xab, 0x84, 0xa2, 0x21, 0x6d, 0x27, 0xbe, 0x3d, 0x17, 0x05, 0x99, 0xb0 +db 0xf3, 0xe2, 0x19, 0xf4, 0x42, 0xbb, 0x69, 0x02, 0x67, 0x3a, 0xab, 0x86, 0x9e, 0xda, 0x9f, 0xd5 +db 0xba, 0xd4, 0x2d, 0x9d, 0x20, 0x3d, 0xf8, 0xb2, 0x29, 0xc3, 0xc3, 0x98, 0xa8, 0x30, 0x92, 0xe9 +db 0x5a, 0x75, 0x0c, 0xcb, 0x28, 0x28, 0xb4, 0x90, 0x93, 0x16, 0x45, 0x10, 0x3a, 0x5d, 0x96, 0x67 +db 0xf9, 0x31, 0xbe, 0x48, 0x78, 0xe8, 0x5a, 0xf2, 0x66, 0x29, 0xd9, 0x80, 0x50, 0x80, 0xcb, 0x07 +db 0xfe, 0xda, 0x19, 0x0f, 0x22, 0xea, 0x18, 0x5e, 0x12, 0xea, 0x3d, 0x1a, 0xbc, 0x91, 0x51, 0x15 +db 0xaa, 0x66, 0x92, 0x61, 0xb4, 0xd4, 0xce, 0x14, 0x9c, 0x86, 0x27, 0x3d, 0xd0, 0xc6, 0x51, 0x1c +db 0xa0, 0xd4, 0x0b, 0x2d, 0x25, 0x30, 0x3b, 0x46, 0x23, 0x07, 0xb5, 0x05, 0x4a, 0xaa, 0x5a, 0x0a +db 0x7b, 0x29, 0xe4, 0x52, 0x6f, 0x6f, 0xc8, 0x62, 0xb8, 0x94, 0x6a, 0x30, 0x66, 0xf1, 0x21, 0xec +db 0xd1, 0xf2, 0x68, 0xda, 0xb7, 0x7f, 0x5a, 0x26, 0x38, 0x46, 0x48, 0xda, 0x5d, 0x64, 0x8d, 0x3d +db 0x2f, 0xf6, 0xc3, 0x63, 0xb8, 0x09, 0x3a, 0xd0, 0x5b, 0xeb, 0x67, 0xd0, 0xaa, 0x63, 0x71, 0x19 +db 0x7e, 0x4e, 0x33, 0xe2, 0x15, 0xba, 0x87, 0xa7, 0x7b, 0x25, 0xe4, 0xbb, 0xb5, 0x26, 0x9a, 0xf1 +db 0xdd, 0x5a, 0x63, 0xd7, 0x16, 0xc0, 0xc3, 0xc8, 0x1b, 0xad, 0x00, 0x52, 0x63, 0x55, 0xc7, 0xe0 +db 0xd9, 0xe9, 0xf4, 0x4c, 0x53, 0xfb, 0x73, 0x57, 0xdc, 0xad, 0x0c, 0xca, 0x73, 0x44, 0x6b, 0xf3 +db 0xb7, 0x83, 0x3b, 0xfe, 0xf0, 0x15, 0xbf, 0xe5, 0x15, 0xca, 0xdf, 0x35, 0xeb, 0xe7, 0xe3, 0xa2 +db 0xbd, 0x20, 0xad, 0xff, 0x1b, 0x67, 0x0a, 0x9f, 0x60, 0x60, 0xff, 0xa7, 0xc9, 0x19, 0xde, 0xb3 +db 0x67, 0xf1, 0x4b, 0x77, 0x7f, 0x0b, 0xb1, 0x29, 0xee, 0xcb, 0xd6, 0x5d, 0x0d, 0xb9, 0x54, 0x49 +db 0x10, 0xe3, 0xbd, 0x8a, 0xa0, 0x69, 0xa3, 0x07, 0xbe, 0x8e, 0xea, 0xc6, 0x75, 0x27, 0x66, 0xae +db 0x3c, 0xde, 0xc6, 0x13, 0x1b, 0x50, 0x37, 0x56, 0x7c, 0x01, 0xab, 0x8b, 0x46, 0xdc, 0x80, 0xed +db 0xdf, 0x12, 0x6f, 0x64, 0xdf, 0xe6, 0xf9, 0xbf, 0x15, 0x95, 0xd9, 0x80, 0x19, 0x8c, 0x96, 0x33 +db 0x89, 0xbe, 0x25, 0x33, 0x34, 0x82, 0x92, 0x96, 0x05, 0x52, 0xa2, 0xcf, 0x5b, 0x3d, 0xfc, 0xd8 +db 0x43, 0x89, 0x2e, 0x16, 0x6d, 0xbd, 0x84, 0x97, 0x77, 0xb5, 0xd6, 0x2b, 0x6b, 0xb1, 0xc6, 0x38 +db 0x0a, 0xfe, 0xe1, 0xc9, 0x31, 0x32, 0x7f, 0xd5, 0xc1, 0x03, 0x4a, 0xb2, 0x86, 0x4d, 0x8d, 0x77 +db 0xd6, 0x62, 0x52, 0x75, 0xed, 0x27, 0x21, 0xe8, 0x69, 0x6f, 0x6a, 0x5b, 0x59, 0x4d, 0xd2, 0x6c +db 0x2a, 0x97, 0x09, 0x03, 0xc5, 0x29, 0x0d, 0xe1, 0x31, 0x2e, 0x62, 0x21, 0x0e, 0xc2, 0x00, 0x7c +db 0xa2, 0x4c, 0x19, 0x63, 0x24, 0xfc, 0x9b, 0x38, 0x11, 0xbf, 0x20, 0x53, 0x53, 0xac, 0x3f, 0xdb +db 0xfd, 0x2b, 0x39, 0x3c, 0x39, 0x6b, 0xb4, 0x52, 0x1f, 0xf8, 0x8f, 0x3b, 0x47, 0x2b, 0x86, 0xcf +db 0xd2, 0x38, 0xe9, 0x08, 0x73, 0x09, 0x32, 0x5f, 0x6c, 0x3a, 0xdb, 0xfc, 0x1d, 0x91, 0xa4, 0x26 +db 0xa3, 0x0c, 0xbc, 0x94, 0xf5, 0xbd, 0x29, 0xcf, 0x72, 0x3d, 0xee, 0x48, 0x06, 0x77, 0x63, 0x70 +db 0x47, 0xc9, 0x87, 0x21, 0xb1, 0x9a, 0xdd, 0x5f, 0x71, 0x08, 0xe3, 0x3b, 0xf6, 0x07, 0x9f, 0x2f +db 0x20, 0xa3, 0x02, 0xc8, 0x4d, 0xc8, 0x18, 0xfa, 0x69, 0x32, 0x60, 0x97, 0x2d, 0x2f, 0x26, 0x84 +db 0x3d, 0x7a, 0xf6, 0x2f, 0xb1, 0xc9, 0xd2, 0xcd, 0x6e, 0x24, 0x18, 0xa8, 0x0d, 0xb0, 0xe2, 0x41 +db 0x1e, 0xdf, 0xc7, 0xee, 0xcd, 0x21, 0x5b, 0xc3, 0x26, 0x26, 0xb3, 0xb4, 0x33, 0x58, 0x79, 0xb5 +db 0xc3, 0x24, 0x7c, 0xe3, 0xd7, 0x78, 0x33, 0x22, 0xd5, 0x20, 0x21, 0x86, 0xcf, 0xca, 0x44, 0xba +db 0xd8, 0x05, 0x84, 0x37, 0x69, 0x48, 0xb0, 0xe0, 0x7a, 0xe6, 0x74, 0x53, 0x1e, 0xd0, 0x0c, 0x3c +db 0x33, 0x83, 0x15, 0x43, 0x16, 0x0e, 0x93, 0x39, 0x55, 0x2e, 0x55, 0x1c, 0x09, 0xbd, 0x7a, 0xc3 +db 0x80, 0x77, 0x4e, 0xd9, 0xf3, 0xa5, 0xee, 0x94, 0xbf, 0x8e, 0xd0, 0xec, 0x39, 0x33, 0x31, 0x8d +db 0x74, 0x94, 0xd2, 0x24, 0x22, 0x4a, 0xde, 0x51, 0x99, 0xc5, 0x68, 0xf2, 0x2e, 0xd3, 0x8d, 0xc5 +db 0x32, 0x31, 0x26, 0xe7, 0x87, 0x47, 0x5f, 0xbc, 0x32, 0x80, 0x43, 0x83, 0x34, 0x36, 0xa1, 0x72 +db 0x6b, 0x38, 0x10, 0x93, 0xa7, 0xa3, 0x92, 0xb7, 0x3c, 0x61, 0x1c, 0x4e, 0x0b, 0x86, 0x43, 0xa9 +db 0x64, 0xf1, 0xf8, 0xd7, 0xd3, 0xf4, 0xd0, 0xe2, 0x17, 0xd4, 0xbb, 0xe9, 0x2c, 0xc8, 0x76, 0xc5 +db 0x87, 0x7f, 0x81, 0x55, 0xbe, 0x87, 0x0e, 0x6b, 0xf6, 0x4f, 0x44, 0x37, 0x92, 0x32, 0x7f, 0x30 +db 0xa6, 0x66, 0x09, 0x01, 0x7a, 0x6e, 0xb3, 0x3b, 0x7d, 0x8f, 0x32, 0x0e, 0x3c, 0xdc, 0xba, 0x2e +db 0xf8, 0xec, 0xde, 0xd9, 0xb1, 0xf0, 0x3e, 0xbd, 0x20, 0x4d, 0x01, 0x5a, 0xf4, 0xda, 0x99, 0x23 +db 0x81, 0x01, 0x5f, 0x50, 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0x38, 0xe0, 0x3a, 0xb9, 0x50, 0xc1, 0xf1 +db 0xbe, 0x66, 0x89, 0xe2, 0x68, 0x4a, 0x11, 0x0b, 0xfb, 0x84, 0x02, 0x38, 0x31, 0xf4, 0xda, 0x50 +db 0xb6, 0x5f, 0x27, 0x62, 0xc7, 0x5a, 0x0f, 0x99, 0xb7, 0x7e, 0x4a, 0x49, 0xe9, 0x67, 0xe0, 0xa5 +db 0x0d, 0x08, 0x95, 0xf0, 0xe4, 0x3b, 0x62, 0x30, 0x2b, 0x89, 0x21, 0xdd, 0x52, 0x99, 0x12, 0x16 +db 0x83, 0x94, 0x6a, 0x38, 0x1f, 0x8d, 0x81, 0xbf, 0x1f, 0xf9, 0xe0, 0x9c, 0x80, 0xcc, 0x7c, 0xfe +db 0x33, 0x35, 0x27, 0x26, 0xca, 0xcc, 0x1f, 0x43, 0xcd, 0xb0, 0x74, 0x0e, 0xff, 0x1c, 0x86, 0x43 +db 0xab, 0x44, 0xbc, 0x31, 0xff, 0xa4, 0x54, 0x95, 0xd4, 0x79, 0x9e, 0xc0, 0xed, 0x87, 0x1c, 0x2e +db 0x50, 0x47, 0xad, 0xc0, 0x2f, 0x5e, 0x8c, 0x15, 0xfb, 0x86, 0x2c, 0xa5, 0x61, 0x2a, 0x60, 0x12 +db 0xbc, 0x1f, 0x84, 0xe9, 0x75, 0x55, 0x7e, 0x2c, 0x11, 0xd0, 0xfc, 0x66, 0x89, 0x86, 0x2f, 0x26 +db 0x43, 0x1e, 0xa6, 0x6c, 0xa6, 0x40, 0xa9, 0x37, 0x65, 0x99, 0x72, 0xe1, 0x1a, 0xdc, 0x23, 0x53 +db 0x09, 0x8e, 0xa1, 0xd6, 0xda, 0xd9, 0x95, 0xaf, 0x58, 0xe0, 0x2a, 0x4a, 0xd3, 0xbd, 0xbd, 0x86 + diff --git a/unittests/ASM/VEX/vpmadd52luq.asm b/unittests/ASM/VEX/vpmadd52luq.asm new file mode 100644 index 0000000000..634cfd81bb --- /dev/null +++ b/unittests/ASM/VEX/vpmadd52luq.asm @@ -0,0 +1,293 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AVX_IFMA"], + "RegData": { + "XMM0": ["0x21ab0a820269aa45", "0xb0a3451063c07ac3", "0", "0"], + "XMM1": ["0xb300c2f7768557a4", "0xe99c70a1bec6167f", "0", "0"], + "XMM2": ["0xf26203bf7feebfa7", "0x07d8031a4bac1986", "0x5e251b4fa5c1b19e", "0x15591631a9a30bba"], + "XMM3": ["0x14d5effb98c2f458", "0x1c5e499a07fa76bc", "0x46476152c3b3ab40", "0x0a622ebf951a28cb"], + "XMM4": ["0x62c86f6f52e4297b", "0xec21f166306a94b8", "0x265a7fb7da68f2d1", "0x3d8d645dda484638"] + } +} +%endif + +vmovups ymm0, [rel .random_data + (32 * 0)] +vmovups ymm1, [rel .random_data + (32 * 1)] +vmovups ymm2, [rel .random_data + (32 * 2)] +vmovups ymm3, [rel .random_data + (32 * 3)] +vmovups ymm4, [rel .random_data + (32 * 4)] + +; 128-bit +db 0xc4, 0xe2, 0xf1, 0xb4, 0xc2 ; {vex} vpmadd52luq xmm0, xmm1, xmm2 + +; Overlap for fun. +db 0xc4, 0xe2, 0xf1, 0xb4, 0xca ; {vex} vpmadd52luq xmm1, xmm1, xmm2 + +; 256-bit +db 0xc4, 0xe2, 0xe5, 0xb4, 0xd4 ; {vex} vpmadd52luq ymm2, ymm3, ymm4 + +; Overlap for fun. +db 0xc4, 0xe2, 0xe5, 0xb4, 0xdc ; {vex} vpmadd52luq ymm3, ymm3, ymm4 + +hlt + +align 4096 +; 4096 bytes of random data. +.random_data: +db 0x5b, 0x27, 0x12, 0x29, 0xab, 0x84, 0xa2, 0x21, 0x6d, 0x27, 0xbe, 0x3d, 0x17, 0x05, 0x99, 0xb0 +db 0xf3, 0xe2, 0x19, 0xf4, 0x42, 0xbb, 0x69, 0x02, 0x67, 0x3a, 0xab, 0x86, 0x9e, 0xda, 0x9f, 0xd5 +db 0xba, 0xd4, 0x2d, 0x9d, 0x20, 0x3d, 0xf8, 0xb2, 0x29, 0xc3, 0xc3, 0x98, 0xa8, 0x30, 0x92, 0xe9 +db 0x5a, 0x75, 0x0c, 0xcb, 0x28, 0x28, 0xb4, 0x90, 0x93, 0x16, 0x45, 0x10, 0x3a, 0x5d, 0x96, 0x67 +db 0xf9, 0x31, 0xbe, 0x48, 0x78, 0xe8, 0x5a, 0xf2, 0x66, 0x29, 0xd9, 0x80, 0x50, 0x80, 0xcb, 0x07 +db 0xfe, 0xda, 0x19, 0x0f, 0x22, 0xea, 0x18, 0x5e, 0x12, 0xea, 0x3d, 0x1a, 0xbc, 0x91, 0x51, 0x15 +db 0xaa, 0x66, 0x92, 0x61, 0xb4, 0xd4, 0xce, 0x14, 0x9c, 0x86, 0x27, 0x3d, 0xd0, 0xc6, 0x51, 0x1c +db 0xa0, 0xd4, 0x0b, 0x2d, 0x25, 0x30, 0x3b, 0x46, 0x23, 0x07, 0xb5, 0x05, 0x4a, 0xaa, 0x5a, 0x0a +db 0x7b, 0x29, 0xe4, 0x52, 0x6f, 0x6f, 0xc8, 0x62, 0xb8, 0x94, 0x6a, 0x30, 0x66, 0xf1, 0x21, 0xec +db 0xd1, 0xf2, 0x68, 0xda, 0xb7, 0x7f, 0x5a, 0x26, 0x38, 0x46, 0x48, 0xda, 0x5d, 0x64, 0x8d, 0x3d +db 0x2f, 0xf6, 0xc3, 0x63, 0xb8, 0x09, 0x3a, 0xd0, 0x5b, 0xeb, 0x67, 0xd0, 0xaa, 0x63, 0x71, 0x19 +db 0x7e, 0x4e, 0x33, 0xe2, 0x15, 0xba, 0x87, 0xa7, 0x7b, 0x25, 0xe4, 0xbb, 0xb5, 0x26, 0x9a, 0xf1 +db 0xdd, 0x5a, 0x63, 0xd7, 0x16, 0xc0, 0xc3, 0xc8, 0x1b, 0xad, 0x00, 0x52, 0x63, 0x55, 0xc7, 0xe0 +db 0xd9, 0xe9, 0xf4, 0x4c, 0x53, 0xfb, 0x73, 0x57, 0xdc, 0xad, 0x0c, 0xca, 0x73, 0x44, 0x6b, 0xf3 +db 0xb7, 0x83, 0x3b, 0xfe, 0xf0, 0x15, 0xbf, 0xe5, 0x15, 0xca, 0xdf, 0x35, 0xeb, 0xe7, 0xe3, 0xa2 +db 0xbd, 0x20, 0xad, 0xff, 0x1b, 0x67, 0x0a, 0x9f, 0x60, 0x60, 0xff, 0xa7, 0xc9, 0x19, 0xde, 0xb3 +db 0x67, 0xf1, 0x4b, 0x77, 0x7f, 0x0b, 0xb1, 0x29, 0xee, 0xcb, 0xd6, 0x5d, 0x0d, 0xb9, 0x54, 0x49 +db 0x10, 0xe3, 0xbd, 0x8a, 0xa0, 0x69, 0xa3, 0x07, 0xbe, 0x8e, 0xea, 0xc6, 0x75, 0x27, 0x66, 0xae +db 0x3c, 0xde, 0xc6, 0x13, 0x1b, 0x50, 0x37, 0x56, 0x7c, 0x01, 0xab, 0x8b, 0x46, 0xdc, 0x80, 0xed +db 0xdf, 0x12, 0x6f, 0x64, 0xdf, 0xe6, 0xf9, 0xbf, 0x15, 0x95, 0xd9, 0x80, 0x19, 0x8c, 0x96, 0x33 +db 0x89, 0xbe, 0x25, 0x33, 0x34, 0x82, 0x92, 0x96, 0x05, 0x52, 0xa2, 0xcf, 0x5b, 0x3d, 0xfc, 0xd8 +db 0x43, 0x89, 0x2e, 0x16, 0x6d, 0xbd, 0x84, 0x97, 0x77, 0xb5, 0xd6, 0x2b, 0x6b, 0xb1, 0xc6, 0x38 +db 0x0a, 0xfe, 0xe1, 0xc9, 0x31, 0x32, 0x7f, 0xd5, 0xc1, 0x03, 0x4a, 0xb2, 0x86, 0x4d, 0x8d, 0x77 +db 0xd6, 0x62, 0x52, 0x75, 0xed, 0x27, 0x21, 0xe8, 0x69, 0x6f, 0x6a, 0x5b, 0x59, 0x4d, 0xd2, 0x6c +db 0x2a, 0x97, 0x09, 0x03, 0xc5, 0x29, 0x0d, 0xe1, 0x31, 0x2e, 0x62, 0x21, 0x0e, 0xc2, 0x00, 0x7c +db 0xa2, 0x4c, 0x19, 0x63, 0x24, 0xfc, 0x9b, 0x38, 0x11, 0xbf, 0x20, 0x53, 0x53, 0xac, 0x3f, 0xdb +db 0xfd, 0x2b, 0x39, 0x3c, 0x39, 0x6b, 0xb4, 0x52, 0x1f, 0xf8, 0x8f, 0x3b, 0x47, 0x2b, 0x86, 0xcf +db 0xd2, 0x38, 0xe9, 0x08, 0x73, 0x09, 0x32, 0x5f, 0x6c, 0x3a, 0xdb, 0xfc, 0x1d, 0x91, 0xa4, 0x26 +db 0xa3, 0x0c, 0xbc, 0x94, 0xf5, 0xbd, 0x29, 0xcf, 0x72, 0x3d, 0xee, 0x48, 0x06, 0x77, 0x63, 0x70 +db 0x47, 0xc9, 0x87, 0x21, 0xb1, 0x9a, 0xdd, 0x5f, 0x71, 0x08, 0xe3, 0x3b, 0xf6, 0x07, 0x9f, 0x2f +db 0x20, 0xa3, 0x02, 0xc8, 0x4d, 0xc8, 0x18, 0xfa, 0x69, 0x32, 0x60, 0x97, 0x2d, 0x2f, 0x26, 0x84 +db 0x3d, 0x7a, 0xf6, 0x2f, 0xb1, 0xc9, 0xd2, 0xcd, 0x6e, 0x24, 0x18, 0xa8, 0x0d, 0xb0, 0xe2, 0x41 +db 0x1e, 0xdf, 0xc7, 0xee, 0xcd, 0x21, 0x5b, 0xc3, 0x26, 0x26, 0xb3, 0xb4, 0x33, 0x58, 0x79, 0xb5 +db 0xc3, 0x24, 0x7c, 0xe3, 0xd7, 0x78, 0x33, 0x22, 0xd5, 0x20, 0x21, 0x86, 0xcf, 0xca, 0x44, 0xba +db 0xd8, 0x05, 0x84, 0x37, 0x69, 0x48, 0xb0, 0xe0, 0x7a, 0xe6, 0x74, 0x53, 0x1e, 0xd0, 0x0c, 0x3c +db 0x33, 0x83, 0x15, 0x43, 0x16, 0x0e, 0x93, 0x39, 0x55, 0x2e, 0x55, 0x1c, 0x09, 0xbd, 0x7a, 0xc3 +db 0x80, 0x77, 0x4e, 0xd9, 0xf3, 0xa5, 0xee, 0x94, 0xbf, 0x8e, 0xd0, 0xec, 0x39, 0x33, 0x31, 0x8d +db 0x74, 0x94, 0xd2, 0x24, 0x22, 0x4a, 0xde, 0x51, 0x99, 0xc5, 0x68, 0xf2, 0x2e, 0xd3, 0x8d, 0xc5 +db 0x32, 0x31, 0x26, 0xe7, 0x87, 0x47, 0x5f, 0xbc, 0x32, 0x80, 0x43, 0x83, 0x34, 0x36, 0xa1, 0x72 +db 0x6b, 0x38, 0x10, 0x93, 0xa7, 0xa3, 0x92, 0xb7, 0x3c, 0x61, 0x1c, 0x4e, 0x0b, 0x86, 0x43, 0xa9 +db 0x64, 0xf1, 0xf8, 0xd7, 0xd3, 0xf4, 0xd0, 0xe2, 0x17, 0xd4, 0xbb, 0xe9, 0x2c, 0xc8, 0x76, 0xc5 +db 0x87, 0x7f, 0x81, 0x55, 0xbe, 0x87, 0x0e, 0x6b, 0xf6, 0x4f, 0x44, 0x37, 0x92, 0x32, 0x7f, 0x30 +db 0xa6, 0x66, 0x09, 0x01, 0x7a, 0x6e, 0xb3, 0x3b, 0x7d, 0x8f, 0x32, 0x0e, 0x3c, 0xdc, 0xba, 0x2e +db 0xf8, 0xec, 0xde, 0xd9, 0xb1, 0xf0, 0x3e, 0xbd, 0x20, 0x4d, 0x01, 0x5a, 0xf4, 0xda, 0x99, 0x23 +db 0x81, 0x01, 0x5f, 0x50, 0xce, 0xa8, 0xb9, 0xb1, 0x59, 0xe5, 0xde, 0x47, 0x5b, 0xba, 0x94, 0xd3 +db 0x21, 0x7c, 0x49, 0xeb, 0xb5, 0x14, 0xe5, 0x56, 0x93, 0x06, 0x3b, 0xd2, 0x3a, 0x11, 0xca, 0x7a +db 0x14, 0x48, 0x54, 0xc7, 0x9f, 0x03, 0x40, 0x2c, 0x0b, 0x42, 0x8e, 0xac, 0xac, 0x08, 0x04, 0x8e +db 0xb3, 0x15, 0xe5, 0x06, 0xa6, 0x5b, 0xf0, 0x57, 0x08, 0xfa, 0x0f, 0x00, 0x7e, 0x4a, 0x16, 0xa8 +db 0xb0, 0x4d, 0x07, 0x1b, 0xbc, 0x3d, 0xd0, 0x86, 0x15, 0xcd, 0x7c, 0xb2, 0xcc, 0x37, 0x6d, 0x15 +db 0x8b, 0xd1, 0xe6, 0x3e, 0xfb, 0x6e, 0xe4, 0xea, 0xd9, 0x1f, 0x69, 0x2a, 0xbc, 0xda, 0xd9, 0x78 +db 0xee, 0xcb, 0xb6, 0xff, 0x53, 0xfd, 0xd2, 0xb9, 0x18, 0x1f, 0xdf, 0x0e, 0x69, 0xfe, 0x36, 0xb0 +db 0x77, 0x28, 0x66, 0xe2, 0xf0, 0x80, 0x4c, 0x11, 0x11, 0xba, 0xb7, 0xfd, 0x67, 0x4f, 0x05, 0xed +db 0x0c, 0xcc, 0x3e, 0x4d, 0xd9, 0xbc, 0x52, 0xe3, 0xec, 0xd9, 0x74, 0x29, 0x30, 0xf2, 0x66, 0xd6 +db 0xfb, 0xc3, 0x5c, 0xc1, 0xd8, 0xef, 0x86, 0x08, 0x22, 0xb1, 0x6d, 0xfd, 0xee, 0xc7, 0x12, 0x25 +db 0xda, 0xee, 0xd6, 0x28, 0x3b, 0x1d, 0xa7, 0x29, 0xdf, 0x45, 0x3a, 0xa4, 0x36, 0xe0, 0xa4, 0xda +db 0xb1, 0x2c, 0x8a, 0xa5, 0x5c, 0x8c, 0x70, 0xd8, 0xcd, 0x0f, 0xb5, 0x63, 0xd3, 0xaf, 0x59, 0x2b +db 0x7d, 0x86, 0x4a, 0xc4, 0xcc, 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0x7e, 0x4a, 0x49, 0xe9, 0x67, 0xe0, 0xa5 +db 0x0d, 0x08, 0x95, 0xf0, 0xe4, 0x3b, 0x62, 0x30, 0x2b, 0x89, 0x21, 0xdd, 0x52, 0x99, 0x12, 0x16 +db 0x83, 0x94, 0x6a, 0x38, 0x1f, 0x8d, 0x81, 0xbf, 0x1f, 0xf9, 0xe0, 0x9c, 0x80, 0xcc, 0x7c, 0xfe +db 0x33, 0x35, 0x27, 0x26, 0xca, 0xcc, 0x1f, 0x43, 0xcd, 0xb0, 0x74, 0x0e, 0xff, 0x1c, 0x86, 0x43 +db 0xab, 0x44, 0xbc, 0x31, 0xff, 0xa4, 0x54, 0x95, 0xd4, 0x79, 0x9e, 0xc0, 0xed, 0x87, 0x1c, 0x2e +db 0x50, 0x47, 0xad, 0xc0, 0x2f, 0x5e, 0x8c, 0x15, 0xfb, 0x86, 0x2c, 0xa5, 0x61, 0x2a, 0x60, 0x12 +db 0xbc, 0x1f, 0x84, 0xe9, 0x75, 0x55, 0x7e, 0x2c, 0x11, 0xd0, 0xfc, 0x66, 0x89, 0x86, 0x2f, 0x26 +db 0x43, 0x1e, 0xa6, 0x6c, 0xa6, 0x40, 0xa9, 0x37, 0x65, 0x99, 0x72, 0xe1, 0x1a, 0xdc, 0x23, 0x53 +db 0x09, 0x8e, 0xa1, 0xd6, 0xda, 0xd9, 0x95, 0xaf, 0x58, 0xe0, 0x2a, 0x4a, 0xd3, 0xbd, 0xbd, 0x86 + diff --git a/unittests/CMakeLists.txt b/unittests/CMakeLists.txt index 4dacdc6daf..9f615b4f1b 100644 --- a/unittests/CMakeLists.txt +++ b/unittests/CMakeLists.txt @@ -1,3 +1,9 @@ +# -S skips importing the "site" package which cuts down on +# interpreter startup time. This means that these scripts +# can only use the python standard library, since "site" +# is what resolves third-party packages from pip or apt. +set(PYTHON_TEST_RUNNER "python3" "-S") + if (NOT MINGW) add_subdirectory(APITests/) add_subdirectory(POSIX/) @@ -19,6 +25,11 @@ endif() add_subdirectory(ASM/) add_subdirectory(32Bit_ASM/) if (ENABLE_VIXL_DISASSEMBLER) - # Tests are only valid to run if the vixl disassembler is enabled and the active JIT is the ARM64 JIT. + # Tests are only valid to run if the vixl disassembler + # is enabled and the active JIT is the ARM64 JIT. add_subdirectory(InstructionCountCI/) endif() + +if (BUILD_FEX_MINGW_TESTS) + add_subdirectory(FEXMingwTests/) +endif() diff --git a/unittests/FEXLinuxTests/CMakeLists.txt b/unittests/FEXLinuxTests/CMakeLists.txt index 770d590290..15d03e2f9d 100644 --- a/unittests/FEXLinuxTests/CMakeLists.txt +++ b/unittests/FEXLinuxTests/CMakeLists.txt @@ -47,7 +47,7 @@ function(AddTests Tests BinDirectory Bitness) # Add jit test case add_test(NAME "${TEST_CASE}.jit.flt" - COMMAND "python3" "${CMAKE_SOURCE_DIR}/Scripts/guest_test_runner.py" + COMMAND ${PYTHON_TEST_RUNNER} "${CMAKE_SOURCE_DIR}/Scripts/guest_test_runner.py" "${CMAKE_CURRENT_SOURCE_DIR}/Known_Failures" "${CMAKE_CURRENT_SOURCE_DIR}/Expected_Output" "${CMAKE_CURRENT_SOURCE_DIR}/Disabled_Tests" @@ -76,7 +76,7 @@ function(AddTests Tests BinDirectory Bitness) if (ARCHITECTURE_x86_64 AND NOT TEST_NAME STREQUAL "thunk_testlib" AND NOT TEST_NAME STREQUAL "vulkan_procaddr") # Add host test case add_test(NAME "${TEST_CASE}.host.flt" - COMMAND "python3" "${CMAKE_SOURCE_DIR}/Scripts/guest_test_runner.py" + COMMAND ${PYTHON_TEST_RUNNER} "${CMAKE_SOURCE_DIR}/Scripts/guest_test_runner.py" "${CMAKE_CURRENT_SOURCE_DIR}/Known_Failures_Host" "${CMAKE_CURRENT_SOURCE_DIR}/Expected_Output" "${CMAKE_CURRENT_SOURCE_DIR}/Disabled_Tests_Host" diff --git a/unittests/FEXLinuxTests/Known_Failures b/unittests/FEXLinuxTests/Known_Failures index 689a15a91a..9fcd3dd23c 100644 --- a/unittests/FEXLinuxTests/Known_Failures +++ b/unittests/FEXLinuxTests/Known_Failures @@ -23,6 +23,3 @@ sigtest_sigmask.64 # Disabled since FEX's FaultSafeMemcpy is intentionally stub-implemented syscalls_efault.32 syscalls_efault.64 - -# partial instruction decode is known to fail -noexec_protect.64 diff --git a/unittests/FEXLinuxTests/tests/CMakeLists.txt b/unittests/FEXLinuxTests/tests/CMakeLists.txt index 77e7f9e5ad..81bcf72945 100644 --- a/unittests/FEXLinuxTests/tests/CMakeLists.txt +++ b/unittests/FEXLinuxTests/tests/CMakeLists.txt @@ -33,6 +33,8 @@ endforeach() target_link_libraries(pthread_cancel.${BITNESS} PRIVATE pthread) +target_link_libraries(rlimit_data_pthread.${BITNESS} PRIVATE pthread) + target_link_options(smc-1-dynamic.${BITNESS} PRIVATE -z execstack) target_link_libraries(smc-mt-1.${BITNESS} PRIVATE pthread) diff --git a/unittests/FEXLinuxTests/tests/signal/SystemInstructions.32.cpp b/unittests/FEXLinuxTests/tests/signal/SystemInstructions.32.cpp new file mode 100644 index 0000000000..c5e27d1eaf --- /dev/null +++ b/unittests/FEXLinuxTests/tests/signal/SystemInstructions.32.cpp @@ -0,0 +1,99 @@ +#include "invalid_util.h" + +#include + +#include +#include +#include +#include +#include +#include + +#ifndef REG_RIP +#define REG_RIP REG_EIP +#endif + +enum trapno { + X86_TRAPNO_UD = 6, + X86_TRAPNO_GP = 13, +}; + +#define CONCAT(x, y) x##y +#define TestSymbols(num) \ + extern "C" uint64_t CONCAT(TestBegin_, num); \ + extern "C" uint64_t CONCAT(TestEnd_, num); + +#define Test(num, asm, trapno, errno, si_code, signal) \ + capturing_handler_skip = (unsigned long)&CONCAT(TestEnd_, num) - (unsigned long)&CONCAT(TestBegin_, num); \ + const unsigned long EXPECTED_RIP = (unsigned long)&CONCAT(TestBegin_, num); \ + const int EXPECTED_TRAPNO = trapno; \ + const int EXPECTED_ERR = errno; \ + const int EXPECTED_SI_CODE = si_code; \ + const int EXPECTED_SIGNAL = signal; \ + __asm volatile("TestBegin_" #num ":" asm ";" \ + "TestEnd_" #num ":" :: \ + : "memory"); + + +#define TEST(num, name, asm, trapno, errno, _si_code, _signal) \ + TestSymbols(num); \ + TEST_CASE("Signals: " #name) { \ + struct sigaction act {}; \ + act.sa_sigaction = CapturingHandler; \ + act.sa_flags = SA_SIGINFO; \ + sigaction(SIGSEGV, &act, nullptr); \ + sigaction(SIGTRAP, &act, nullptr); \ + sigaction(SIGILL, &act, nullptr); \ + \ + Test(num, asm, trapno, errno, _si_code, _signal); \ + \ + REQUIRE(from_handler.has_value()); \ + CHECK(from_handler->mctx.gregs[REG_RIP] == EXPECTED_RIP); \ + CHECK(from_handler->mctx.gregs[REG_TRAPNO] == EXPECTED_TRAPNO); \ + CHECK(from_handler->mctx.gregs[REG_ERR] == EXPECTED_ERR); \ + CHECK(from_handler->si_code == EXPECTED_SI_CODE); \ + CHECK(from_handler->signal == EXPECTED_SIGNAL); \ + from_handler.reset(); \ + } + +// Instructions that explicitly are supported but must only work in CPL-0 +TEST(0, "rdmsr", "rdmsr", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(1, "outs", "outs dx, byte ptr [esi]", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(2, "ins", "ins byte ptr [edi], dx", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(3, "cli", "cli", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(4, "clts", "clts", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(5, "invlpg", "invlpg [eax]", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(6, "lmsw", "lmsw [eax]", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(7, "ltr", "ltr [eax]", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(8, "mov cr0", "mov cr0, eax", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(10, "mov eax, cr0", "mov eax, cr0", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(12, "mov eax, dr0", "mov eax, dr0", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(13, "mov dr0, eax", "mov dr0, eax", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(14, "rdpmc", "rdpmc", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(15, "sti", "sti", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(16, "swapgs", "swapgs", X86_TRAPNO_UD, 0, 2, SIGILL); +#ifdef __clang__ +TEST(17, "sysret", "sysret", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +#else +TEST(17, "sysret", "sysretd", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +#endif +TEST(18, "wrmsr", "wrmsr", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(19, "invd", "invd", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(20, "wbinvd", "wbinvd", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); + +// Instructions not implemented +TEST(21, "monitor", "monitor", X86_TRAPNO_UD, 0, 2, SIGILL); +TEST(22, "mwait", "mwait", X86_TRAPNO_UD, 0, 2, SIGILL); +TEST(23, "sysenter", "sysenter", X86_TRAPNO_UD, 0, 2, SIGILL); +#ifdef __clang__ +TEST(24, "sysexit", "sysexit", X86_TRAPNO_UD, 0, 2, SIGILL); +#else +TEST(24, "sysexit", "sysexitd", X86_TRAPNO_UD, 0, 2, SIGILL); +#endif + +TEST(25, "in eax, dx", "in eax, dx", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(26, "xsetbv", "xsetbv", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +// Differs between dr8 and dr0-7 variants. +// dr0-7: SIGSEGV +// dr8-15: SIGILL +// TEST(20, "mov eax, dr8", "mov eax, dr8", X86_TRAPNO_UD, 0, 2, SIGILL); diff --git a/unittests/FEXLinuxTests/tests/signal/SystemInstructions.64.cpp b/unittests/FEXLinuxTests/tests/signal/SystemInstructions.64.cpp index dee0830cf4..28078a9c60 100644 --- a/unittests/FEXLinuxTests/tests/signal/SystemInstructions.64.cpp +++ b/unittests/FEXLinuxTests/tests/signal/SystemInstructions.64.cpp @@ -53,6 +53,7 @@ enum trapno { CHECK(from_handler->mctx.gregs[REG_ERR] == EXPECTED_ERR); \ CHECK(from_handler->si_code == EXPECTED_SI_CODE); \ CHECK(from_handler->signal == EXPECTED_SIGNAL); \ + from_handler.reset(); \ } // Instructions that explicitly are supported but must only work in CPL-0 @@ -93,6 +94,7 @@ TEST(24, "sysexit", "sysexitd", X86_TRAPNO_UD, 0, 2, SIGILL); #endif TEST(25, "in eax, dx", "in eax, dx", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); +TEST(26, "xsetbv", "xsetbv", X86_TRAPNO_GP, 0, 0x80, SIGSEGV); // Differs between dr8 and dr0-7 variants. // dr0-7: SIGSEGV // dr8-15: SIGILL diff --git a/unittests/FEXLinuxTests/tests/signal/cpuid_fault.cpp b/unittests/FEXLinuxTests/tests/signal/cpuid_fault.cpp new file mode 100644 index 0000000000..ecdc4b8f2a --- /dev/null +++ b/unittests/FEXLinuxTests/tests/signal/cpuid_fault.cpp @@ -0,0 +1,309 @@ +#include +#include +#include +#include +#include + +#ifndef ARCH_GET_CPUID +#define ARCH_GET_CPUID 0x1011 +#endif +#ifndef ARCH_SET_CPUID +#define ARCH_SET_CPUID 0x1012 +#endif + +struct cpuid_fn { + uint32_t eax, ebx, ecx, edx; +}; + +static cpuid_fn get_cpuid(uint32_t func, uint32_t leaf = 0) { + cpuid_fn fn {}; + __asm volatile("cpuid" : "=a"(fn.eax), "=b"(fn.ebx), "=c"(fn.ecx), "=d"(fn.edx) : "a"(func), "c"(leaf)); + + return fn; +} + +static cpuid_fn get_looooong_cpuid(uint32_t func, uint32_t leaf = 0) { + cpuid_fn fn {}; + __asm volatile(".byte 0x66, 0x66, 0x66, 0x66;" + ".byte 0x66, 0x66, 0x66, 0x66;" + ".byte 0x66, 0x66, 0x66, 0x66;" + ".byte 0x66;" + "cpuid" + : "=a"(fn.eax), "=b"(fn.ebx), "=c"(fn.ecx), "=d"(fn.edx) + : "a"(func), "c"(leaf)); + + return fn; +} + +static cpuid_fn get_cpuid_2(uint32_t func, uint32_t leaf = 0) { + cpuid_fn fn {}; + __asm volatile(".byte 0x26;" + "cpuid" + : "=a"(fn.eax), "=b"(fn.ebx), "=c"(fn.ecx), "=d"(fn.edx) + : "a"(func), "c"(leaf)); + + return fn; +} + +static cpuid_fn get_cpuid_3(uint32_t func, uint32_t leaf = 0) { + cpuid_fn fn {}; + __asm volatile(".byte 0x2e;" + "cpuid" + : "=a"(fn.eax), "=b"(fn.ebx), "=c"(fn.ecx), "=d"(fn.edx) + : "a"(func), "c"(leaf)); + + return fn; +} + +static cpuid_fn get_cpuid_4(uint32_t func, uint32_t leaf = 0) { + cpuid_fn fn {}; + __asm volatile(".byte 0x36;" + "cpuid" + : "=a"(fn.eax), "=b"(fn.ebx), "=c"(fn.ecx), "=d"(fn.edx) + : "a"(func), "c"(leaf)); + + return fn; +} + +static cpuid_fn get_cpuid_5(uint32_t func, uint32_t leaf = 0) { + cpuid_fn fn {}; + __asm volatile(".byte 0x3E;" + "cpuid" + : "=a"(fn.eax), "=b"(fn.ebx), "=c"(fn.ecx), "=d"(fn.edx) + : "a"(func), "c"(leaf)); + + return fn; +} + +static cpuid_fn get_cpuid_6(uint32_t func, uint32_t leaf = 0) { + cpuid_fn fn {}; + __asm volatile(".byte 0x64;" + "cpuid" + : "=a"(fn.eax), "=b"(fn.ebx), "=c"(fn.ecx), "=d"(fn.edx) + : "a"(func), "c"(leaf)); + + return fn; +} + +static cpuid_fn get_cpuid_7(uint32_t func, uint32_t leaf = 0) { + cpuid_fn fn {}; + __asm volatile(".byte 0x65;" + "cpuid" + : "=a"(fn.eax), "=b"(fn.ebx), "=c"(fn.ecx), "=d"(fn.edx) + : "a"(func), "c"(leaf)); + + return fn; +} + +static cpuid_fn get_cpuid_8(uint32_t func, uint32_t leaf = 0) { + cpuid_fn fn {}; + __asm volatile(".byte 0x66;" + "cpuid" + : "=a"(fn.eax), "=b"(fn.ebx), "=c"(fn.ecx), "=d"(fn.edx) + : "a"(func), "c"(leaf)); + + return fn; +} + +static cpuid_fn get_cpuid_9(uint32_t func, uint32_t leaf = 0) { + cpuid_fn fn {}; + __asm volatile(".byte 0x67;" + "cpuid" + : "=a"(fn.eax), "=b"(fn.ebx), "=c"(fn.ecx), "=d"(fn.edx) + : "a"(func), "c"(leaf)); + + return fn; +} + +static cpuid_fn get_cpuid_10(uint32_t func, uint32_t leaf = 0) { + cpuid_fn fn {}; + __asm volatile(".byte 0xF2;" + "cpuid" + : "=a"(fn.eax), "=b"(fn.ebx), "=c"(fn.ecx), "=d"(fn.edx) + : "a"(func), "c"(leaf)); + + return fn; +} + +static cpuid_fn get_cpuid_11(uint32_t func, uint32_t leaf = 0) { + cpuid_fn fn {}; + __asm volatile(".byte 0xf3;" + "cpuid" + : "=a"(fn.eax), "=b"(fn.ebx), "=c"(fn.ecx), "=d"(fn.edx) + : "a"(func), "c"(leaf)); + + return fn; +} + +#ifdef REG_RIP +// 0x40 isn't REX prefix on 32-bit. +static cpuid_fn get_cpuid_12(uint32_t func, uint32_t leaf = 0) { + cpuid_fn fn {}; + __asm volatile(".byte 0x40;" + "cpuid" + : "=a"(fn.eax), "=b"(fn.ebx), "=c"(fn.ecx), "=d"(fn.edx) + : "a"(func), "c"(leaf)); + + return fn; +} +#endif + +static size_t is_cpuid(uint8_t* data) { + size_t inst_size {}; + + while (true) { + if (inst_size == 15) { + return 0; + } + uint8_t byte = data[inst_size]; + + switch (byte) { + case 0x26: // ES + case 0x2e: // CS + case 0x36: // SS + case 0x3E: // DS + case 0x64: // FS + case 0x65: // GS + case 0x66: // Opcode size + case 0x67: // Addr size + case 0xF2: // REPNE + case 0xF3: // REPE +#ifdef REG_RIP + case 0x40 ... 0x4f: // REX +#endif + break; + + case 0xF0: return 0; // Lock explicitly isn't supported on CPUID, should fault. + case 0xf: { + ++inst_size; + byte = data[inst_size]; + if (byte == 0xa2) { + return inst_size + 1; + } + + // Nope + return 0; + } + } + ++inst_size; + } + return inst_size; +} + +static int faults {}; +static void SignalHandler(int signal, siginfo_t* siginfo, void* context) { + ucontext_t* _context = (ucontext_t*)context; + +#ifdef REG_RIP +#define FEX_IP_REG REG_RIP +#define FEX_RAX_REG REG_RAX +#define FEX_RBX_REG REG_RBX +#define FEX_RCX_REG REG_RCX +#define FEX_RDX_REG REG_RDX +#else +#define FEX_IP_REG REG_EIP +#define FEX_RAX_REG REG_EAX +#define FEX_RBX_REG REG_EBX +#define FEX_RCX_REG REG_ECX +#define FEX_RDX_REG REG_EDX +#endif + if (signal != SIGSEGV) { + FAIL("Incorrect signal"); + } + + if (_context->uc_mcontext.gregs[REG_TRAPNO] != 13) { + FAIL("Incorrect trapno"); + } + + if (_context->uc_mcontext.gregs[REG_ERR] != 0) { + FAIL("Incorrect reg_err"); + } + + if (siginfo->si_code != 0x80) { + FAIL("Incorrect si_code"); + } + + size_t inst_size = is_cpuid(reinterpret_cast(_context->uc_mcontext.gregs[FEX_IP_REG])); + if (inst_size == 0) { + FAIL("Isn't cpuid"); + } + + // Return bogus data + _context->uc_mcontext.gregs[FEX_RAX_REG] = 0x41424344U + faults; + _context->uc_mcontext.gregs[FEX_RBX_REG] = 0x51525354U + faults; + _context->uc_mcontext.gregs[FEX_RCX_REG] = 0x61626364U + faults; + _context->uc_mcontext.gregs[FEX_RDX_REG] = 0x71727374U + faults; + + _context->uc_mcontext.gregs[FEX_IP_REG] += inst_size; + + ++faults; +} + +TEST_CASE("cpuid faulting") { + cpuid_fn fn0 = get_cpuid(0); + if (syscall(SYS_arch_prctl, ARCH_SET_CPUID, (void*)1) != 0) { + // Unsupported, just skip. + return; + } + + struct sigaction act {}; + act.sa_sigaction = SignalHandler; + act.sa_flags = SA_SIGINFO; + sigaction(SIGSEGV, &act, nullptr); + + using ptr_type = cpuid_fn (*)(uint32_t, uint32_t); + ptr_type test_funcs[] = { + get_cpuid, get_cpuid_2, get_cpuid_3, get_cpuid_4, get_cpuid_5, get_cpuid_6, + get_cpuid_7, get_cpuid_8, get_cpuid_9, get_cpuid_10, get_cpuid_11, +#ifdef REG_RIP + get_cpuid_12, +#endif + get_looooong_cpuid, + }; + + // Just attempt regular CPUID for now. + for (auto ptr : test_funcs) { + faults = 0; + cpuid_fn fn_emu = ptr(0, 0); + REQUIRE(faults == 0); + + CHECK(fn0.eax == fn_emu.eax); + CHECK(fn0.ebx == fn_emu.ebx); + CHECK(fn0.ecx == fn_emu.ecx); + CHECK(fn0.edx == fn_emu.edx); + } + + // Enable faulting. + REQUIRE(syscall(SYS_arch_prctl, ARCH_SET_CPUID, (void*)0) == 0); + + for (auto ptr : test_funcs) { + faults = 0; + cpuid_fn fn_emu = ptr(0, 0); + REQUIRE(faults == 1); + + CHECK(fn0.eax != fn_emu.eax); + CHECK(fn0.ebx != fn_emu.ebx); + CHECK(fn0.ecx != fn_emu.ecx); + CHECK(fn0.edx != fn_emu.edx); + + CHECK(fn_emu.eax == 0x41424344U); + CHECK(fn_emu.ebx == 0x51525354U); + CHECK(fn_emu.ecx == 0x61626364U); + CHECK(fn_emu.edx == 0x71727374U); + } + + // Disable faulting. + REQUIRE(syscall(SYS_arch_prctl, ARCH_SET_CPUID, (void*)1) == 0); + + // Just attempt regular CPUID for now. + for (auto ptr : test_funcs) { + faults = 0; + cpuid_fn fn_emu = ptr(0, 0); + REQUIRE(faults == 0); + + CHECK(fn0.eax == fn_emu.eax); + CHECK(fn0.ebx == fn_emu.ebx); + CHECK(fn0.ecx == fn_emu.ecx); + CHECK(fn0.edx == fn_emu.edx); + } +} diff --git a/unittests/FEXLinuxTests/tests/signal/dead_flags_load_fault.cpp b/unittests/FEXLinuxTests/tests/signal/dead_flags_load_fault.cpp new file mode 100644 index 0000000000..764f1e523d --- /dev/null +++ b/unittests/FEXLinuxTests/tests/signal/dead_flags_load_fault.cpp @@ -0,0 +1,44 @@ +#include + +#include +#include +#include + +// A compare against memory whose flags are never read still has to perform +// the load, because the load can fault. HotSpot's C1 relies on this for its +// explicit null checks: `cmp rax, [reg]` with the flags dead, and the SIGSEGV +// at that address becomes the NullPointerException. FEX used to remove the +// load together with the dead flag calculation, so the null receiver went on +// to fault at a later instruction instead. + +static sigjmp_buf JumpBuffer; +static volatile int Faulted; + +static void SIGSEGVHandler(int, siginfo_t*, void*) { + Faulted = 1; + siglongjmp(JumpBuffer, 1); +} + +TEST_CASE("Signals: load with dead flags still faults") { + struct sigaction act {}; + act.sa_sigaction = SIGSEGVHandler; + act.sa_flags = SA_SIGINFO; + sigaction(SIGSEGV, &act, nullptr); + + uint32_t Counter = 0; + uintptr_t Null = 0; + Faulted = 0; + + if (sigsetjmp(JumpBuffer, 1) == 0) { + // The add overwrites every flag the compare produced, so only the + // fault from the load is observable. + __asm volatile("cmp %[Null], [%[Null]];" + "add dword ptr [%[Counter]], 1;" + : + : [Null] "r"(Null), [Counter] "r"(&Counter) + : "cc", "memory"); + } + + CHECK(Faulted == 1); + CHECK(Counter == 0); +} diff --git a/unittests/FEXLinuxTests/tests/signal/invalid_group1_82.64.cpp b/unittests/FEXLinuxTests/tests/signal/invalid_group1_82.64.cpp new file mode 100644 index 0000000000..f9e790353d --- /dev/null +++ b/unittests/FEXLinuxTests/tests/signal/invalid_group1_82.64.cpp @@ -0,0 +1,54 @@ +#include "invalid_util.h" + +#include + +#include + +// In 32-bit mode 0x82 is an alias of the 0x80 group 1 encoding. +// In 64-bit mode it is an invalid opcode and must raise SIGILL, +// which this test verifies. + +#define TEST(name, ...) \ + TEST_CASE("Signals: Invalid 0x82 " name) { \ + struct sigaction act {}; \ + act.sa_sigaction = CapturingHandler; \ + act.sa_flags = SA_SIGINFO; \ + sigaction(SIGILL, &act, nullptr); \ + \ + from_handler.reset(); \ + capturing_handler_skip = sizeof((const unsigned char[]) {__VA_ARGS__}); \ + __asm volatile(".byte " #__VA_ARGS__ ::: "memory"); \ + \ + REQUIRE(from_handler.has_value()); \ + CHECK(from_handler->signal == SIGILL); \ + } + +// byte [rax], 0x12 +TEST("/0 add mem", 0x82, 0x00, 0x12); +TEST("/1 or mem", 0x82, 0x08, 0x12); +TEST("/2 adc mem", 0x82, 0x10, 0x12); +TEST("/3 sbb mem", 0x82, 0x18, 0x12); +TEST("/4 and mem", 0x82, 0x20, 0x12); +TEST("/5 sub mem", 0x82, 0x28, 0x12); +TEST("/6 xor mem", 0x82, 0x30, 0x12); +TEST("/7 cmp mem", 0x82, 0x38, 0x12); + +// lock byte [rax], 0x12 +TEST("/0 lock add mem", 0xf0, 0x82, 0x00, 0x12); +TEST("/1 lock or mem", 0xf0, 0x82, 0x08, 0x12); +TEST("/2 lock adc mem", 0xf0, 0x82, 0x10, 0x12); +TEST("/3 lock sbb mem", 0xf0, 0x82, 0x18, 0x12); +TEST("/4 lock and mem", 0xf0, 0x82, 0x20, 0x12); +TEST("/5 lock sub mem", 0xf0, 0x82, 0x28, 0x12); +TEST("/6 lock xor mem", 0xf0, 0x82, 0x30, 0x12); +TEST("/7 lock cmp mem", 0xf0, 0x82, 0x38, 0x12); + +// al, 0x12 +TEST("/0 add reg", 0x82, 0xc0, 0x12); +TEST("/1 or reg", 0x82, 0xc8, 0x12); +TEST("/2 adc reg", 0x82, 0xd0, 0x12); +TEST("/3 sbb reg", 0x82, 0xd8, 0x12); +TEST("/4 and reg", 0x82, 0xe0, 0x12); +TEST("/5 sub reg", 0x82, 0xe8, 0x12); +TEST("/6 xor reg", 0x82, 0xf0, 0x12); +TEST("/7 cmp reg", 0x82, 0xf8, 0x12); diff --git a/unittests/FEXLinuxTests/tests/signal/partial_decode_failure.cpp b/unittests/FEXLinuxTests/tests/signal/partial_decode_failure.cpp new file mode 100644 index 0000000000..3a032b27c1 --- /dev/null +++ b/unittests/FEXLinuxTests/tests/signal/partial_decode_failure.cpp @@ -0,0 +1,155 @@ +#include + +#include +#include +#include +#include +#include +#include + +// FEX-Emu had a bug where partially decoded instruction faults weren't returning the correct data in the signal handler. +// Simple test that pushes a 7-byte NOP and a RET instruction across a RWX+RW page boundary to ensure correct fault addresses. +extern "C" { +__attribute__((naked, nocf_check)) void Ret() { + __asm volatile(R"( + .global RetInstruction + RetInstruction: + ret; + )"); +} + +extern void* RetInstruction; +} + +struct ReturnDataStruct { + int Signal {}; + size_t FaultRIP {}; + size_t FaultAddr {}; +}; + +std::optional SignalReturnData {}; + +static void SignalHandler(int signal, siginfo_t* siginfo, void* context) { + ucontext_t* _context = (ucontext_t*)context; + +#ifdef REG_RIP +#define FEX_IP_REG REG_RIP +#else +#define FEX_IP_REG REG_EIP +#endif + + SignalReturnData = ReturnDataStruct { + .Signal = signal, + .FaultRIP = static_cast(_context->uc_mcontext.gregs[FEX_IP_REG]), + .FaultAddr = reinterpret_cast(siginfo->si_addr), + }; + + _context->uc_mcontext.gregs[FEX_IP_REG] = reinterpret_cast(&RetInstruction); +#undef FEX_IP_REG +} + +TEST_CASE("Partial Fault requires correct data") { + struct sigaction Act {}; + Act.sa_sigaction = SignalHandler; + Act.sa_flags = SA_SIGINFO; + + REQUIRE(sigaction(SIGILL, &Act, nullptr) == 0); + REQUIRE(sigaction(SIGSEGV, &Act, nullptr) == 0); + + const auto PageSize = sysconf(_SC_PAGESIZE); + REQUIRE(PageSize > 0); + + void* Ptr = mmap(nullptr, PageSize * 2, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); + REQUIRE(Ptr != MAP_FAILED); + + REQUIRE(mprotect(static_cast(Ptr) + PageSize, PageSize, PROT_READ | PROT_WRITE) == 0); + + constexpr std::array NOPData = { + 0x0f, 0x18, 0x25, 0, 0, 0, 0, // nop dword [rip + Index] + 0xc3, // ret + }; + + struct ResultsStruct { + bool ShouldFault {}; + std::optional Result {}; + }; + + std::array TestResults {{ + // Both instructions inside the executable page, won't fault. + {false, std::nullopt}, + + // Faults on the `ret` on the page boundary, which means FaultRIP == FaultAddr. + {true, + ReturnDataStruct { + .Signal = SIGSEGV, + .FaultRIP = reinterpret_cast(Ptr) + PageSize, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + // Starts faulting in the middle of nop instruction decode. + // FaultAddr is always on the page boundary, but FaultRIP is where the instruction begins. + {true, + ReturnDataStruct { + .Signal = SIGSEGV, + .FaultRIP = reinterpret_cast(Ptr) + PageSize - 6, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + {true, + ReturnDataStruct { + .Signal = SIGSEGV, + .FaultRIP = reinterpret_cast(Ptr) + PageSize - 5, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + {true, + ReturnDataStruct { + .Signal = SIGSEGV, + .FaultRIP = reinterpret_cast(Ptr) + PageSize - 4, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + {true, + ReturnDataStruct { + .Signal = SIGSEGV, + .FaultRIP = reinterpret_cast(Ptr) + PageSize - 3, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + {true, + ReturnDataStruct { + .Signal = SIGSEGV, + .FaultRIP = reinterpret_cast(Ptr) + PageSize - 2, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + {true, + ReturnDataStruct { + .Signal = SIGSEGV, + .FaultRIP = reinterpret_cast(Ptr) + PageSize - 1, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + // NOP Instruction is fully inside the RW page, so matches again. + {true, + ReturnDataStruct { + .Signal = SIGSEGV, + .FaultRIP = reinterpret_cast(Ptr) + PageSize, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + }}; + + for (size_t i = 0; i < TestResults.size(); ++i) { + auto& TestResult = TestResults[i]; + uint8_t* Code = static_cast(Ptr) + PageSize - NOPData.size() + i; + memcpy(Code, NOPData.data(), NOPData.size()); + + using FuncPtr = void (*)(); + auto Func = reinterpret_cast(Code); + + SignalReturnData.reset(); + Func(); + + auto Result = SignalReturnData; + + REQUIRE(TestResult.ShouldFault == Result.has_value()); + if (TestResult.ShouldFault) { + CHECK(TestResult.Result->Signal == Result->Signal); + CHECK(TestResult.Result->FaultRIP == Result->FaultRIP); + CHECK(TestResult.Result->FaultAddr == Result->FaultAddr); + } + } +} diff --git a/unittests/FEXLinuxTests/tests/signal/sigtest_resethandler.cpp b/unittests/FEXLinuxTests/tests/signal/sigtest_resethandler.cpp new file mode 100644 index 0000000000..8cbd3d6d84 --- /dev/null +++ b/unittests/FEXLinuxTests/tests/signal/sigtest_resethandler.cpp @@ -0,0 +1,184 @@ +#include + +#include +#include +#include +#include +#include +#include + +void sig_handler(int signum, siginfo_t* info, void* context) { + printf("Inside handler function\n"); +} + +TEST_CASE("Signals: Check waitpid works") { + int pid = ::fork(); + if (pid == 0) { + _exit(0); + } + + int status {}; + auto res = ::waitpid(pid, &status, 0); + REQUIRE(res != -1); + CHECK(WIFEXITED(status)); + CHECK(WEXITSTATUS(status) == 0); +} + +TEST_CASE("Signals: Check terminate works.") { + int pid = ::fork(); + if (pid == 0) { + // Reset Catch2's signal handler for this fork. + struct sigaction act = {}; + act.sa_flags = 0; + act.sa_handler = SIG_DFL; + REQUIRE(sigaction(SIGTERM, &act, nullptr) == 0); + + ::tgkill(::getpid(), ::gettid(), SIGTERM); + } + + int status {}; + auto res = ::waitpid(pid, &status, 0); + REQUIRE(res != -1); + CHECK(!WIFEXITED(status)); + CHECK(WIFSIGNALED(status)); + CHECK(WTERMSIG(status) == SIGTERM); +} + +TEST_CASE("Signals: Check flags.") { + constexpr static uint32_t SIGNAL_FLAGS = SA_SIGINFO | SA_NODEFER; + + int pid = ::fork(); + if (pid == 0) { + static struct sigaction act = {}; + auto sig_handler = [](int signum, siginfo_t* info, void* context) -> void { + REQUIRE(sigaction(SIGTERM, nullptr, &act) == 0); + }; + + // Reset Catch2's signal handler for this fork. + act.sa_flags = SIGNAL_FLAGS; + act.sa_sigaction = sig_handler; + REQUIRE(sigaction(SIGTERM, &act, nullptr) == 0); + + ::tgkill(::getpid(), ::gettid(), SIGTERM); + +#define SA_RESTORER 0x04000000 + if ((act.sa_flags & ~SA_RESTORER) != SIGNAL_FLAGS) { + _exit(1); + } + + if (act.sa_sigaction != sig_handler) { + _exit(1); + } + + _exit(0); + } + + int status {}; + auto res = ::waitpid(pid, &status, 0); + REQUIRE(res != -1); + CHECK(WIFEXITED(status)); + CHECK(WEXITSTATUS(status) == 0); +} + +TEST_CASE("Signals: Check flags reset handler.") { + constexpr static uint32_t SIGNAL_FLAGS = SA_SIGINFO | SA_NODEFER | SA_RESETHAND; + + int pid = ::fork(); + if (pid == 0) { + static struct sigaction act = {}; + auto sig_handler = [](int signum, siginfo_t* info, void* context) -> void { + REQUIRE(sigaction(SIGTERM, nullptr, &act) == 0); + }; + + // Reset Catch2's signal handler for this fork. + act.sa_flags = SIGNAL_FLAGS; + act.sa_sigaction = sig_handler; + REQUIRE(sigaction(SIGTERM, &act, nullptr) == 0); + + ::tgkill(::getpid(), ::gettid(), SIGTERM); + +#define SA_RESTORER 0x04000000 + // With SA_RESETHAND, sa_handler resets to SIG_DFL but everything else stays the same. + REQUIRE((act.sa_flags & ~SA_RESTORER) == SIGNAL_FLAGS); + REQUIRE(act.sa_handler == SIG_DFL); + _exit(0); + } + + int status {}; + auto res = ::waitpid(pid, &status, 0); + REQUIRE(res != -1); + CHECK(WIFEXITED(status)); + CHECK(WEXITSTATUS(status) == 0); +} + +TEST_CASE("Signals: Check flags reset handler ignore.") { + // SIGWINCH by default is type SIG_DFL but that means SIG_IGN in the kernel. + // Ensure SA_RESETHAND resets it to SIG_DFL, not SIG_IGN. + constexpr static uint32_t SIGNAL_FLAGS = SA_SIGINFO | SA_NODEFER | SA_RESETHAND; + + int pid = ::fork(); + if (pid == 0) { + static struct sigaction act = {}; + auto sig_handler = [](int signum, siginfo_t* info, void* context) -> void { + REQUIRE(sigaction(SIGWINCH, nullptr, &act) == 0); + }; + + // Reset Catch2's signal handler for this fork. + act.sa_flags = SIGNAL_FLAGS; + act.sa_sigaction = sig_handler; + REQUIRE(sigaction(SIGWINCH, &act, nullptr) == 0); + + ::tgkill(::getpid(), ::gettid(), SIGWINCH); + +#define SA_RESTORER 0x04000000 + // With SA_RESETHAND, sa_handler resets to SIG_DFL but everything else stays the same. + REQUIRE((act.sa_flags & ~SA_RESTORER) == SIGNAL_FLAGS); + REQUIRE(act.sa_handler == SIG_DFL); + _exit(0); + } + + int status {}; + auto res = ::waitpid(pid, &status, 0); + REQUIRE(res != -1); + CHECK(WIFEXITED(status)); + CHECK(WEXITSTATUS(status) == 0); +} + +TEST_CASE("Signals: Check flags reset handler thread.") { + constexpr static uint32_t SIGNAL_FLAGS = SA_SIGINFO | SA_NODEFER | SA_RESETHAND; + + static struct sigaction act = {}; + static struct sigaction orig_act = {}; + + auto sig_handler = [](int signum, siginfo_t* info, void* context) -> void { + REQUIRE(sigaction(SIGTERM, nullptr, &act) == 0); + }; + + // Reset Catch2's signal handler for this fork. + act.sa_flags = SIGNAL_FLAGS; + act.sa_sigaction = sig_handler; + REQUIRE(sigaction(SIGTERM, &act, &orig_act) == 0); + + std::thread t([]() { + ::tgkill(::getpid(), ::gettid(), SIGTERM); + +#define SA_RESTORER 0x04000000 + // With SA_RESETHAND, sa_handler resets to SIG_DFL but everything else stays the same. + REQUIRE((act.sa_flags & ~SA_RESTORER) == SIGNAL_FLAGS); + REQUIRE(act.sa_handler == SIG_DFL); + }); + + // DFL switch should be visible from parent thread. + static struct sigaction act_parent = {}; + while (sigaction(SIGTERM, nullptr, &act_parent) == 0) { + if (act_parent.sa_handler == SIG_DFL) { + fprintf(stderr, "Hit DFL!\n"); + break; + } + } + + t.join(); + + // Set the original handler back for any remaining tests. + REQUIRE(sigaction(SIGTERM, &orig_act, nullptr) == 0); +} diff --git a/unittests/FEXLinuxTests/tests/syscalls/rlimit_data_pthread.cpp b/unittests/FEXLinuxTests/tests/syscalls/rlimit_data_pthread.cpp new file mode 100644 index 0000000000..c528beeaec --- /dev/null +++ b/unittests/FEXLinuxTests/tests/syscalls/rlimit_data_pthread.cpp @@ -0,0 +1,42 @@ +#include + +#include +#include +#include +#include + +static void* ThreadFunc(void* Arg) { + auto Semaphore = static_cast*>(Arg); + while (*Semaphore) { + // Sleep for a bit to avoid thrashing. + usleep(100'000); + } + return nullptr; +} + +// NB: At present, empirical testing shows that we can +// actually set this to ~45, and still pass. To give us wiggle room for +// any other per thread overhead let's set it to a nice round number instead. +#define NUM_THREADS 32 + +// Chromium's sandbox lowers RLIMIT_DATA to 16GB and then spawns threads. +// Historically, FEX would allocate a several TB writtable region +// for its host stack, which would blow past this limit. +TEST_CASE("pthread_create after lowering RLIMIT_DATA") { + rlimit64 Limit { + .rlim_cur = 16ULL * 1024 * 1024 * 1024, + .rlim_max = 16ULL * 1024 * 1024 * 1024, + }; + REQUIRE(setrlimit64(RLIMIT_DATA, &Limit) == 0); + + pthread_t Threads[NUM_THREADS]; + std::atomic Semaphore = true; + for (int i = 0; i < NUM_THREADS; ++i) { + REQUIRE(pthread_create(&Threads[i], nullptr, ThreadFunc, &Semaphore) == 0); + } + + Semaphore = false; + for (int i = 0; i < NUM_THREADS; ++i) { + CHECK(pthread_join(Threads[i], nullptr) == 0); + } +} diff --git a/unittests/FEXLinuxTests/tests/syscalls/stat_efault.32.cpp b/unittests/FEXLinuxTests/tests/syscalls/stat_efault.32.cpp new file mode 100644 index 0000000000..d475b17e23 --- /dev/null +++ b/unittests/FEXLinuxTests/tests/syscalls/stat_efault.32.cpp @@ -0,0 +1,49 @@ +#include + +#include +#include +#include +#include +#include + +#define CHECK_EFAULT(Expr) \ + do { \ + REQUIRE((Expr) == -1); \ + CHECK(errno == EFAULT); \ + } while (0) + +#define CHECK_ENOENT(Expr) \ + do { \ + REQUIRE((Expr) == -1); \ + CHECK(errno == ENOENT); \ + } while (0) + +TEST_CASE("stat et al. returns EFAULT for null pointers") { + int FD = ::open("/", O_RDONLY); + CHECK_EFAULT(::syscall(SYS_oldstat, "/", nullptr)); + CHECK_EFAULT(::syscall(SYS_oldfstat, FD, nullptr)); + CHECK_EFAULT(::syscall(SYS_oldlstat, "/", nullptr)); + CHECK_EFAULT(::syscall(SYS_stat, "/", nullptr)); + CHECK_EFAULT(::syscall(SYS_fstat, FD, nullptr)); + CHECK_EFAULT(::syscall(SYS_lstat, "/", nullptr)); + CHECK_EFAULT(::syscall(SYS_stat64, "/", nullptr)); + CHECK_EFAULT(::syscall(SYS_lstat64, "/", nullptr)); + CHECK_EFAULT(::syscall(SYS_fstat64, FD, nullptr)); + CHECK_EFAULT(::syscall(SYS_statfs, "/", nullptr)); + CHECK_EFAULT(::syscall(SYS_fstatfs, FD, nullptr)); + CHECK_EFAULT(::syscall(SYS_fstatfs64, FD, sizeof(struct statfs64), nullptr)); + CHECK_EFAULT(::syscall(SYS_statfs64, "/", sizeof(struct statfs64), nullptr)); + CHECK_EFAULT(::syscall(SYS_fstatat64, AT_FDCWD, "/", nullptr, 0)); +} + +TEST_CASE("stat et al. returns ENOENT for missing paths with null buffers") { + CHECK_ENOENT(::syscall(SYS_oldstat, "/does/not/exist", nullptr)); + CHECK_ENOENT(::syscall(SYS_oldlstat, "/does/not/exist", nullptr)); + CHECK_ENOENT(::syscall(SYS_stat, "/does/not/exist", nullptr)); + CHECK_ENOENT(::syscall(SYS_lstat, "/does/not/exist", nullptr)); + CHECK_ENOENT(::syscall(SYS_stat64, "/does/not/exist", nullptr)); + CHECK_ENOENT(::syscall(SYS_lstat64, "/does/not/exist", nullptr)); + CHECK_ENOENT(::syscall(SYS_statfs, "/does/not/exist", nullptr)); + CHECK_ENOENT(::syscall(SYS_statfs64, "/does/not/exist", sizeof(struct statfs64), nullptr)); + CHECK_ENOENT(::syscall(SYS_fstatat64, AT_FDCWD, "/does/not/exist", nullptr, 0)); +} diff --git a/unittests/FEXLinuxTests/tests/syscalls/stat_efault.64.cpp b/unittests/FEXLinuxTests/tests/syscalls/stat_efault.64.cpp new file mode 100644 index 0000000000..25127997cd --- /dev/null +++ b/unittests/FEXLinuxTests/tests/syscalls/stat_efault.64.cpp @@ -0,0 +1,41 @@ +#include + +#include +#include +#include +#include + +#define CHECK_EFAULT(Expr) \ + do { \ + REQUIRE((Expr) == -1); \ + CHECK(errno == EFAULT); \ + } while (0) + +#define CHECK_ENOENT(Expr) \ + do { \ + REQUIRE((Expr) == -1); \ + CHECK(errno == ENOENT); \ + } while (0) + +// This should be more than big enough +static char Buffer[2048]; + +TEST_CASE("stat et al. returns EFAULT for null pointers") { + int FD = ::open("/", O_RDONLY); + CHECK_EFAULT(::syscall(SYS_stat, nullptr, Buffer)); + CHECK_EFAULT(::syscall(SYS_stat, "/", nullptr)); + CHECK_EFAULT(::syscall(SYS_fstat, FD, nullptr)); + CHECK_EFAULT(::syscall(SYS_lstat, nullptr, Buffer)); + CHECK_EFAULT(::syscall(SYS_lstat, "/", nullptr)); + CHECK_EFAULT(::syscall(SYS_newfstatat, AT_FDCWD, nullptr, Buffer, 0)); + CHECK_EFAULT(::syscall(SYS_newfstatat, AT_FDCWD, "/", nullptr, 0)); + CHECK_EFAULT(::syscall(SYS_statfs, nullptr, Buffer)); + CHECK_EFAULT(::syscall(SYS_statfs, "/", nullptr)); +} + +TEST_CASE("stat et al. returns ENOENT for missing paths with null buffers") { + CHECK_ENOENT(::syscall(SYS_stat, "/does/not/exist", nullptr)); + CHECK_ENOENT(::syscall(SYS_lstat, "/does/not/exist", nullptr)); + CHECK_ENOENT(::syscall(SYS_newfstatat, AT_FDCWD, "/does/not/exist", nullptr, 0)); + CHECK_ENOENT(::syscall(SYS_statfs, "/does/not/exist", nullptr)); +} diff --git a/unittests/FEXMingwTests/CMakeLists.txt b/unittests/FEXMingwTests/CMakeLists.txt new file mode 100644 index 0000000000..c2a9f9da9e --- /dev/null +++ b/unittests/FEXMingwTests/CMakeLists.txt @@ -0,0 +1,72 @@ +include(ExternalProject) +ExternalProject_Add(FEXMingwTests + PREFIX FEXMingwTests + SOURCE_DIR "${CMAKE_CURRENT_SOURCE_DIR}/tests" + BINARY_DIR "${CMAKE_CURRENT_BINARY_DIR}/FEXMingwTests_64" + CMAKE_ARGS + "-DCMAKE_BUILD_TYPE=${CMAKE_BUILD_TYPE}" + "-DLLVM_MINGW=${LLVM_MINGW}" + "-DCMAKE_TOOLCHAIN_FILE:FILEPATH=${X86_64_MINGW_TOOLCHAIN_FILE}" + "-DBITNESS=64" + INSTALL_COMMAND "" + BUILD_ALWAYS ON) + +ExternalProject_Add(FEXMingwTests_32 + PREFIX FEXMingwTests_32 + SOURCE_DIR "${CMAKE_CURRENT_SOURCE_DIR}/tests" + BINARY_DIR "${CMAKE_CURRENT_BINARY_DIR}/FEXMingwTests_32" + CMAKE_ARGS + "-DCMAKE_BUILD_TYPE=${CMAKE_BUILD_TYPE}" + "-DLLVM_MINGW=${LLVM_MINGW}" + "-DCMAKE_TOOLCHAIN_FILE:FILEPATH=${X86_32_MINGW_TOOLCHAIN_FILE}" + "-DBITNESS=32" + INSTALL_COMMAND "" + BUILD_ALWAYS ON) + +# this kind of sucks, but reglob +file(GLOB_RECURSE TESTS CONFIGURE_DEPENDS tests/*.cpp) +file(GLOB_RECURSE TESTS_64_ONLY CONFIGURE_DEPENDS tests/*.64.cpp) +file(GLOB_RECURSE TESTS_32_ONLY CONFIGURE_DEPENDS tests/*.32.cpp) + +# Apply bitness-specific exclude lists +list(REMOVE_ITEM TESTS ${TESTS_64_ONLY}) +list(REMOVE_ITEM TESTS ${TESTS_32_ONLY}) + +find_program(WINE_PATH wine) + +function(AddTests Tests BinDirectory Bitness) + foreach(TEST ${Tests}) + get_filename_component(TEST_NAME ${TEST} NAME_WE) + set(BIN_PATH "${CMAKE_CURRENT_BINARY_DIR}/${BinDirectory}/${TEST_NAME}.${Bitness}.exe") + set(TEST_CASE "${TEST_NAME}.${Bitness}") + + # Add jit test case + add_test(NAME "${TEST_CASE}.mingw.tst" + COMMAND ${PYTHON_TEST_RUNNER} "${CMAKE_SOURCE_DIR}/Scripts/guest_test_runner.py" + "${CMAKE_CURRENT_SOURCE_DIR}/Known_Failures" + "${CMAKE_CURRENT_SOURCE_DIR}/Expected_Output" + "${CMAKE_CURRENT_SOURCE_DIR}/Disabled_Tests" + "${CMAKE_CURRENT_SOURCE_DIR}/Flake_Tests" + "${TEST_CASE}" + "host" + "${WINE_PATH}" + "${BIN_PATH}") + endforeach() +endfunction() + +# Only add the tests if a wine binary is found. +if (NOT WINE_PATH-NOTFOUND) + # Execute combined 32-bit and 64-bit tests. + AddTests("${TESTS}" "FEXMingwTests_64" 64) + AddTests("${TESTS}" "FEXMingwTests_32" 32) + # Execute tests that are only 64-bit. + AddTests("${TESTS_64_ONLY}" "FEXMingwTests_64" 64) + # Execute tests that are only 32-bit. + AddTests("${TESTS_32_ONLY}" "FEXMingwTests_32" 32) +endif() + +add_custom_target(fex_mingw_tests + WORKING_DIRECTORY "${CMAKE_BINARY_DIR}" + USES_TERMINAL + COMMAND "ctest" "--output-on-failure" "--timeout" "30" ${TEST_JOB_FLAG} "-R" "\.*\.mingw\.tst$$" + DEPENDS FEXMingwTests FEXMingwTests_32) diff --git a/unittests/FEXMingwTests/tests/CMakeLists.txt b/unittests/FEXMingwTests/tests/CMakeLists.txt new file mode 100644 index 0000000000..6fca7edbe5 --- /dev/null +++ b/unittests/FEXMingwTests/tests/CMakeLists.txt @@ -0,0 +1,32 @@ +cmake_minimum_required(VERSION 3.14) +project(FEXMingwTests) + +set(CMAKE_CXX_STANDARD 20) + +set(GENERATE_GUEST_INSTALL_TARGETS TRUE) + +# Use intel masm syntax. ATT style asm syntax is archaic and hard to read. +add_compile_options(-masm=intel) +# Override a define so catch2 doesn't use ATT style inline asm +add_definitions(-D"CATCH_BREAK_INTO_DEBUGGER\(\)"="[]{ if\( Catch::isDebuggerActive\(\) \) { __builtin_trap\(\)\; } }\(\)") + +file(GLOB_RECURSE TESTS CONFIGURE_DEPENDS *.cpp) +if(BITNESS EQUAL 64) + file(GLOB_RECURSE TESTS_32_ONLY CONFIGURE_DEPENDS *.32.cpp) + list(REMOVE_ITEM TESTS ${TESTS_32_ONLY}) +else() + file(GLOB_RECURSE TESTS_64_ONLY CONFIGURE_DEPENDS *.64.cpp) + list(REMOVE_ITEM TESTS ${TESTS_64_ONLY}) +endif() + +option(CATCH_BUILD_STATIC_LIBRARY "" ON) +set(CATCH_BUILD_STATIC_LIBRARY ON) +add_subdirectory(../../../External/Catch2/ Catch2) + +foreach(TEST ${TESTS}) + get_filename_component(TEST_NAME ${TEST} NAME_WE) + + add_executable(${TEST_NAME}.${BITNESS} ${TEST}) + target_link_libraries(${TEST_NAME}.${BITNESS} PRIVATE Catch2::Catch2WithMain) + target_include_directories(${TEST_NAME}.${BITNESS} PRIVATE include/) +endforeach() diff --git a/unittests/FEXMingwTests/tests/signal/debug_registers.cpp b/unittests/FEXMingwTests/tests/signal/debug_registers.cpp new file mode 100644 index 0000000000..031fa673f7 --- /dev/null +++ b/unittests/FEXMingwTests/tests/signal/debug_registers.cpp @@ -0,0 +1,653 @@ +// SPDX-License-Identifier: MIT + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef __x86_64__ +#define ASM_CONV +#else +#define ASM_CONV fastcall +#endif +#define str(x) #x +#define xstr(x) str(x) + +// Debug registers on x86 are fairly flexible but there are few of them. +// - DR0-3 are registers which contain the addresses to breakpoint on. +// - DR4/5 are reserved. Aliased to DR6/DR7. Attempting to access will fault. +// - DR6 is `Debug-Status Register` containing sticky bits about what conditions occured. +// - DR7 is `Debug-Control Register` which controls how the breakpoints are controlled. +// - D8-15 are defined for x86_64 but are currently reserved. + +enum LengthClass : uint32_t { + Byte = 0, + Word = 1, + QWord = 2, + DWord = 3, +}; +enum TypeClass : uint32_t { + InstExec = 0, + DataWrite = 1, + IOReadWrite = 2, + DataReadWrite = 3, +}; + +struct BreakpointAssignments { + struct BPInfo { + size_t Addr; + LengthClass Length; + TypeClass TypeOfFault; + bool LocalBPEnable; + bool GlobalBPEnable; + }; + BPInfo BPs[4] {}; + size_t DebugStatusRegister {}; + // Used to detect when any `MOV DRn` occurs. + // Sets DR6[BD] to 1 when occurs. + // Since `MOV DRn` isn't available to CPL3, it isn't interesting although. + bool GeneralDetectEnabled; +}; + +#ifdef __x86_64__ +#define PREFIX(x) _##x +#else +#define PREFIX(x) x +#endif + +extern "C" void* PREFIX(ReadBPState); +extern "C" void* PREFIX(ReturnReadBPState); + +extern "C" void* PREFIX(WriteBPState); +extern "C" void* PREFIX(ReturnWriteBPState); + +extern "C" void* PREFIX(BPFaultContinueInstruction); +extern "C" void* PREFIX(ReturnBPFaultContinueInstruction); + +extern "C" void* PREFIX(BPFaultInstruction); +extern "C" void* PREFIX(ReturnBPFaultInstruction); + +union DataStruct { + struct { + uint8_t _pad[7]; + uint8_t u8; + }; + struct { + uint16_t _pad2[3]; + uint16_t u16; + }; + struct { + uint32_t _pad3; + uint32_t u32; + }; + uint64_t u64; +}; + +static DataStruct FaultData {}; +// Have number of exceptions after fault data to capture any BP reads that extend too far. +static size_t NumExceptions {}; + +void FetchBPData(BreakpointAssignments* bp, const PCONTEXT ctx) { + bp->BPs[0].Addr = ctx->Dr0; + bp->BPs[1].Addr = ctx->Dr1; + bp->BPs[2].Addr = ctx->Dr2; + bp->BPs[3].Addr = ctx->Dr3; + bp->DebugStatusRegister = ctx->Dr6; + + const size_t Dr7 = ctx->Dr7; + // Local and global for each BP is sequential. + bp->BPs[0].LocalBPEnable = !!(Dr7 & (1 << 0)); + bp->BPs[0].GlobalBPEnable = !!(Dr7 & (1 << 1)); + bp->BPs[1].LocalBPEnable = !!(Dr7 & (1 << 2)); + bp->BPs[1].GlobalBPEnable = !!(Dr7 & (1 << 3)); + bp->BPs[2].LocalBPEnable = !!(Dr7 & (1 << 4)); + bp->BPs[2].GlobalBPEnable = !!(Dr7 & (1 << 5)); + bp->BPs[3].LocalBPEnable = !!(Dr7 & (1 << 6)); + bp->BPs[3].GlobalBPEnable = !!(Dr7 & (1 << 7)); + + // Then general detect bit. + bp->GeneralDetectEnabled = !!(Dr7 & (1 << 13)); + + // Then Lengths and types. + bp->BPs[0].TypeOfFault = static_cast((Dr7 >> 16) & 0b11); + bp->BPs[0].Length = static_cast((Dr7 >> 18) & 0b11); + bp->BPs[1].TypeOfFault = static_cast((Dr7 >> 20) & 0b11); + bp->BPs[1].Length = static_cast((Dr7 >> 22) & 0b11); + bp->BPs[2].TypeOfFault = static_cast((Dr7 >> 24) & 0b11); + bp->BPs[2].Length = static_cast((Dr7 >> 26) & 0b11); + bp->BPs[3].TypeOfFault = static_cast((Dr7 >> 28) & 0b11); + bp->BPs[3].Length = static_cast((Dr7 >> 30) & 0b11); +} + +void WriteBPData(const BreakpointAssignments* bp, PCONTEXT ctx) { + ctx->Dr0 = bp->BPs[0].Addr; + ctx->Dr1 = bp->BPs[1].Addr; + ctx->Dr2 = bp->BPs[2].Addr; + ctx->Dr3 = bp->BPs[3].Addr; + ctx->Dr6 = bp->DebugStatusRegister; + + size_t Dr7 {}; + // Local and global for each BP is sequential. + Dr7 |= bp->BPs[0].LocalBPEnable ? (1 << 0) : 0; + Dr7 |= bp->BPs[0].GlobalBPEnable ? (1 << 1) : 0; + Dr7 |= bp->BPs[1].LocalBPEnable ? (1 << 2) : 0; + Dr7 |= bp->BPs[1].GlobalBPEnable ? (1 << 3) : 0; + Dr7 |= bp->BPs[2].LocalBPEnable ? (1 << 4) : 0; + Dr7 |= bp->BPs[2].GlobalBPEnable ? (1 << 5) : 0; + Dr7 |= bp->BPs[3].LocalBPEnable ? (1 << 6) : 0; + Dr7 |= bp->BPs[3].GlobalBPEnable ? (1 << 7) : 0; + + // Then general detect bit. + Dr7 |= bp->GeneralDetectEnabled ? (1 << 13) : 0; + + // Then Lengths and types. + Dr7 |= (bp->BPs[0].TypeOfFault << 16); + Dr7 |= (bp->BPs[0].Length << 18); + Dr7 |= (bp->BPs[1].TypeOfFault << 20); + Dr7 |= (bp->BPs[1].Length << 22); + Dr7 |= (bp->BPs[2].TypeOfFault << 24); + Dr7 |= (bp->BPs[2].Length << 26); + Dr7 |= (bp->BPs[3].TypeOfFault << 28); + Dr7 |= (bp->BPs[3].Length << 30); + + ctx->Dr7 = Dr7; +} + +__attribute__((stdcall)) static long CapturingHandler(EXCEPTION_POINTERS* ExceptionInfo) { +#ifdef __x86_64__ +#define ARG1 Rcx +#define ARGRET Rax + auto& RIP = ExceptionInfo->ContextRecord->Rip; +#else +#define ARG1 Ecx +#define ARGRET Eax + auto& RIP = ExceptionInfo->ContextRecord->Eip; +#endif + ++NumExceptions; + + fprintf(stderr, "Exception at 0x%zx\n", (size_t)RIP); + if (ExceptionInfo->ExceptionRecord->ExceptionCode == STATUS_ILLEGAL_INSTRUCTION) { + if (RIP == reinterpret_cast(&PREFIX(ReadBPState))) { + auto BPArg = reinterpret_cast(ExceptionInfo->ContextRecord->ARG1); + if (ExceptionInfo->ContextRecord->ContextFlags & CONTEXT_DEBUG_REGISTERS) { + FetchBPData(BPArg, ExceptionInfo->ContextRecord); + } else { + fprintf(stderr, "Debug registers were empty\n"); + } + RIP = reinterpret_cast(&PREFIX(ReturnReadBPState)); + return EXCEPTION_CONTINUE_EXECUTION; + } + + if (RIP == reinterpret_cast(&PREFIX(WriteBPState))) { + auto BPArg = reinterpret_cast(ExceptionInfo->ContextRecord->ARG1); + if (ExceptionInfo->ContextRecord->ContextFlags & CONTEXT_DEBUG_REGISTERS) { + WriteBPData(BPArg, ExceptionInfo->ContextRecord); + } else { + fprintf(stderr, "Debug registers were empty\n"); + } + RIP = reinterpret_cast(&PREFIX(ReturnWriteBPState)); + return EXCEPTION_CONTINUE_EXECUTION; + } + } else if (ExceptionInfo->ExceptionRecord->ExceptionCode == STATUS_SINGLE_STEP) { + // Only skip when on `BPFaultContinue`. + // Explicitly avoiding handling on `BPFault` + fprintf(stderr, "Return reg is: 0x%zx\n", (size_t)ExceptionInfo->ContextRecord->ARGRET); + constexpr uint32_t MeaningfulBits = (0b111 << 13) | (1 << 1) | (0xF); + fprintf(stderr, "Dr6: 0x%zx\n", (size_t)ExceptionInfo->ContextRecord->Dr6 & MeaningfulBits); + + if (ExceptionInfo->ContextRecord->Dr0 == RIP) { + fprintf(stderr, "Exception at Dr0: 0x%zx\n", (size_t)ExceptionInfo->ContextRecord->Dr7); + ExceptionInfo->ContextRecord->Dr7 &= ~(0b11 << 0); + } + if (ExceptionInfo->ContextRecord->Dr1 == RIP) { + fprintf(stderr, "Exception at Dr1: 0x%zx\n", (size_t)ExceptionInfo->ContextRecord->Dr7); + ExceptionInfo->ContextRecord->Dr7 &= ~(0b11 << 2); + } + if (ExceptionInfo->ContextRecord->Dr2 == RIP) { + fprintf(stderr, "Exception at Dr2: 0x%zx\n", (size_t)ExceptionInfo->ContextRecord->Dr7); + ExceptionInfo->ContextRecord->Dr7 &= ~(0b11 << 4); + } + if (ExceptionInfo->ContextRecord->Dr3 == RIP) { + fprintf(stderr, "Exception at Dr3: 0x%zx\n", (size_t)ExceptionInfo->ContextRecord->Dr7); + ExceptionInfo->ContextRecord->Dr7 &= ~(0b11 << 6); + } + + if (RIP == reinterpret_cast(&PREFIX(BPFaultContinueInstruction))) { + RIP = reinterpret_cast(&PREFIX(ReturnBPFaultContinueInstruction)); + } + return EXCEPTION_CONTINUE_EXECUTION; + } + + fprintf(stderr, "Unhandled exception: 0x%lx\n", ExceptionInfo->ExceptionRecord->ExceptionCode); + assert(false); + return EXCEPTION_CONTINUE_SEARCH; +} + +void InstallSignalHandler() { + AddVectoredExceptionHandler(true, CapturingHandler); +} + +__attribute__((naked, ASM_CONV)) void ReadBreakpoints(BreakpointAssignments* BP) { + asm(R"( + .global _ReadBPState + _ReadBPState: + ud2; + + .global _ReturnReadBPState; + _ReturnReadBPState: + ret; + )" :: + : "memory"); +} +__attribute__((naked, ASM_CONV)) void WriteBreakpoints(const BreakpointAssignments* BP) { + asm(R"( + .global _WriteBPState + _WriteBPState: + ud2; + + .global _ReturnWriteBPState; + _ReturnWriteBPState: + ret; + )" :: + : "memory"); +} +__attribute__((naked, ASM_CONV)) uint32_t BPFaultContinueFunction() { + asm(R"( + mov eax, 0xdeadbeef; + + mov eax, 1; + +.global _BPFaultContinueInstruction +_BPFaultContinueInstruction: + mov eax, 0; + +.global _ReturnBPFaultContinueInstruction; +_ReturnBPFaultContinueInstruction: +ret; +)" :: + : "memory"); +} + +__attribute__((naked, ASM_CONV)) uint32_t BPFaultFunction() { + asm(R"( + mov eax, 0xdeadbeef; + +.global _BPFaultInstruction +_BPFaultInstruction: + mov eax, 1; + +.global ReturnBPFaultInstruction; +ReturnBPFaultInstruction: +ret; +)" :: + : "memory"); +} + +static DWORD WINAPI empty(void* arg) { + return 0; +} + +// Check if a created thread with breakpoint data matches. +void test0() { + CONTEXT ctx {}; + ctx.ContextFlags = CONTEXT_DEBUG_REGISTERS; + ctx.Dr0 = ~0U; + ctx.Dr1 = ~0U; + ctx.Dr2 = ~0U; + ctx.Dr3 = ~0U; + ctx.Dr6 = ~0U; + ctx.Dr7 = 0x400; + + NTSTATUS status {}; + + auto t = CreateThread(nullptr, 0, empty, nullptr, CREATE_SUSPENDED, nullptr); + REQUIRE(t != INVALID_HANDLE_VALUE); + + ctx.ContextFlags = CONTEXT_DEBUG_REGISTERS; + bool success = SetThreadContext(t, &ctx); + REQUIRE(success); + + success = GetThreadContext(t, &ctx); + REQUIRE(success); + + CHECK(ctx.Dr0 == ~0U); + CHECK(ctx.Dr1 == ~0U); + CHECK(ctx.Dr2 == ~0U); + CHECK(ctx.Dr3 == ~0U); + CHECK(ctx.Dr6 == ~0U); + CHECK(ctx.Dr7 == 0x400); +} + +// Ensures by default the debug registers are empty. +void test1() { + NumExceptions = 0; + BreakpointAssignments bp {}; + memset(&bp, 0x42, sizeof(bp)); + + // Ensure breakpoints are empty. + ReadBreakpoints(&bp); + + REQUIRE(bp.GeneralDetectEnabled == false); + REQUIRE(bp.DebugStatusRegister == 0); + for (size_t i = 0; i < 4; ++i) { + REQUIRE(bp.BPs[i].Addr == 0); + REQUIRE(bp.BPs[i].Length == LengthClass::Byte); + REQUIRE(bp.BPs[i].TypeOfFault == TypeClass::InstExec); + REQUIRE(bp.BPs[i].LocalBPEnable == false); + REQUIRE(bp.BPs[i].GlobalBPEnable == false); + } + REQUIRE(NumExceptions == 1); +} + +// Ensures the BP addresses are sticky. +void test2() { + NumExceptions = 0; + BreakpointAssignments bp {}; + bp.BPs[0].Addr = 0x41424344; + bp.BPs[1].Addr = 0x51525354; + bp.BPs[2].Addr = 0x61626364; + bp.BPs[3].Addr = 0x71727374; + + // Write a breakpoint. + WriteBreakpoints(&bp); + + memset(&bp, 0x42, sizeof(bp)); + + // Read it back. + ReadBreakpoints(&bp); + + // Ensure the addresses are sticky. + CHECK(bp.BPs[0].Addr == 0x41424344); + CHECK(bp.BPs[1].Addr == 0x51525354); + CHECK(bp.BPs[2].Addr == 0x61626364); + CHECK(bp.BPs[3].Addr == 0x71727374); + + REQUIRE(bp.GeneralDetectEnabled == false); + REQUIRE(bp.DebugStatusRegister == 0); + + for (size_t i = 0; i < 4; ++i) { + REQUIRE(bp.BPs[i].Length == LengthClass::Byte); + REQUIRE(bp.BPs[i].TypeOfFault == TypeClass::InstExec); + REQUIRE(bp.BPs[i].LocalBPEnable == false); + REQUIRE(bp.BPs[i].GlobalBPEnable == false); + } + + REQUIRE(NumExceptions == 2); +} + +bool GlobalBPSupported = true; +bool GeneralDetectedSupported = true; + +// Ensures the BP options are sticky. +void test3() { + NumExceptions = 0; + BreakpointAssignments bp {}; + bp.GeneralDetectEnabled = true; + for (size_t i = 0; i < 4; ++i) { + bp.BPs[i].LocalBPEnable = true; + bp.BPs[i].GlobalBPEnable = true; + } + + // Write a breakpoint. + WriteBreakpoints(&bp); + + memset(&bp, 0x42, sizeof(bp)); + + // Read it back. + ReadBreakpoints(&bp); + + // Windows doesn't support setting General detect. + GeneralDetectedSupported = bp.GeneralDetectEnabled; + REQUIRE(bp.DebugStatusRegister == 0); + for (size_t i = 0; i < 4; ++i) { + REQUIRE(bp.BPs[i].Addr == 0); + REQUIRE(bp.BPs[i].Length == LengthClass::Byte); + REQUIRE(bp.BPs[i].TypeOfFault == TypeClass::InstExec); + CHECK(bp.BPs[i].LocalBPEnable == true); + + // Windows doesn't support global BP. + if (bp.BPs[i].GlobalBPEnable == false) { + GlobalBPSupported = false; + } + } + + REQUIRE(NumExceptions == 2); +} + +// Spin up a new thread and wait on it. +// Ensures that breakpoint information isn't inherited. +void test4() { + // Set the addresses from test2(). + test2(); + + std::thread t([]() { test1(); }); + t.join(); +} + +// Ensures that when a instruction bp is hit, the signal handler can jump to a new instruction. +// Skipping one. +void test5(int BP, bool Global) { + if (Global && !GlobalBPSupported) { + return; + } + NumExceptions = 0; + BreakpointAssignments bp {}; + bp.BPs[BP].Addr = reinterpret_cast(&PREFIX(BPFaultContinueInstruction)); + bp.BPs[BP].GlobalBPEnable = Global; + bp.BPs[BP].LocalBPEnable = !Global; + + static int count {}; + fprintf(stderr, "# Test5: %d\n", ++count); + + fprintf(stderr, "## WriteBP: Fault RIP: 0x%zx\n", bp.BPs[BP].Addr); + + // Write a breakpoint. + WriteBreakpoints(&bp); + + fprintf(stderr, "### Faulting\n"); + + uint32_t Ret = BPFaultContinueFunction(); + REQUIRE(Ret == 1); + + fprintf(stderr, "#### Reading BP\n"); + + // Read it back. + ReadBreakpoints(&bp); + + REQUIRE(bp.GeneralDetectEnabled == false); + constexpr uint32_t MeaningfulBits = (0b111 << 13) | (1 << 1) | (0xF); + + // Only bp0 fired. + REQUIRE((bp.DebugStatusRegister & MeaningfulBits) == (1 << BP)); + + REQUIRE(bp.BPs[BP].Addr == reinterpret_cast(&PREFIX(BPFaultContinueInstruction))); + REQUIRE(bp.BPs[BP].Length == LengthClass::Byte); + REQUIRE(bp.BPs[BP].TypeOfFault == TypeClass::InstExec); + + // These will have fired and changed state. + REQUIRE(bp.BPs[BP].GlobalBPEnable == false); + REQUIRE(bp.BPs[BP].LocalBPEnable == false); + + for (size_t i = 0; i < 4; ++i) { + if (i == BP) { + continue; + } + + REQUIRE(bp.BPs[i].Addr == 0); + REQUIRE(bp.BPs[i].Length == LengthClass::Byte); + REQUIRE(bp.BPs[i].TypeOfFault == TypeClass::InstExec); + REQUIRE(bp.BPs[i].LocalBPEnable == false); + REQUIRE(bp.BPs[i].GlobalBPEnable == false); + } + + REQUIRE(NumExceptions == 3); +} + +// Ensures that when a instruction BP is hit, it continues execution afterwards. +void test6(int BP, bool Global) { + if (Global && !GlobalBPSupported) { + return; + } + + NumExceptions = 0; + BreakpointAssignments bp {}; + bp.BPs[BP].Addr = reinterpret_cast(&PREFIX(BPFaultInstruction)); + bp.BPs[BP].GlobalBPEnable = Global; + bp.BPs[BP].LocalBPEnable = !Global; + + // Write a breakpoint. + WriteBreakpoints(&bp); + + uint32_t Ret = BPFaultFunction(); + REQUIRE(Ret == 1); + + memset(&bp, 0x42, sizeof(bp)); + + // Read it back. + ReadBreakpoints(&bp); + + REQUIRE(bp.GeneralDetectEnabled == false); + constexpr uint32_t MeaningfulBits = (0b111 << 13) | (1 << 1) | (0xF); + + // Only bp0 fired. + CHECK((bp.DebugStatusRegister & MeaningfulBits) == (1 << BP)); + + CHECK(bp.BPs[BP].Addr == reinterpret_cast(&PREFIX(BPFaultInstruction))); + CHECK(bp.BPs[BP].Length == LengthClass::Byte); + CHECK(bp.BPs[BP].TypeOfFault == TypeClass::InstExec); + + // These will have fired and changed state. + REQUIRE(bp.BPs[BP].GlobalBPEnable == false); + REQUIRE(bp.BPs[BP].LocalBPEnable == false); + + for (size_t i = 0; i < 4; ++i) { + if (i == BP) { + continue; + } + + CHECK(bp.BPs[i].Addr == 0); + CHECK(bp.BPs[i].Length == LengthClass::Byte); + CHECK(bp.BPs[i].TypeOfFault == TypeClass::InstExec); + CHECK(bp.BPs[i].LocalBPEnable == false); + CHECK(bp.BPs[i].GlobalBPEnable == false); + } + + REQUIRE(NumExceptions == 3); +} + +// Testing of data breakpoints. +void test7(size_t Size, bool Read, bool ExpectHit, size_t offset = 0) { + NumExceptions = 0; + BreakpointAssignments bp {}; + bp.BPs[0].Addr = reinterpret_cast(&FaultData) + offset; + bp.BPs[0].GlobalBPEnable = false; + bp.BPs[0].LocalBPEnable = true; + + switch (Size) { + case 1: bp.BPs[0].Length = LengthClass::Byte; break; + case 2: bp.BPs[0].Length = LengthClass::Word; break; + case 4: bp.BPs[0].Length = LengthClass::DWord; break; + case 8: bp.BPs[0].Length = LengthClass::QWord; break; + default: assert(false && "Unhandled size"); + } + + bp.BPs[0].TypeOfFault = Read ? TypeClass::DataReadWrite : TypeClass::DataWrite; + + // Write a breakpoint. + WriteBreakpoints(&bp); + + size_t Result = ~0U; + if (!Read) { + FaultData.u8 = 1; + Result = 1; + } else { + Result = FaultData.u8; + } + + memset(&bp, 0x42, sizeof(bp)); + + // Read it back. + ReadBreakpoints(&bp); + + constexpr uint32_t MeaningfulBits = (0b111 << 13) | (1 << 1) | (0xF); + bp.DebugStatusRegister &= MeaningfulBits; + + REQUIRE(FaultData.u8 == Result); + + // Only bp0 fired. + CHECK((bp.DebugStatusRegister & MeaningfulBits) == (ExpectHit ? (1 << 0) : 0)); + + // A bit complex for how many exceptions are expected. + uint32_t ExpectedHits = 2; + if (!Read && ExpectHit) { + ExpectedHits = 3; + } else if (Read && ExpectHit) { + ExpectedHits = 4; + } + REQUIRE(NumExceptions == ExpectedHits); +} + +TEST_CASE("Test Harness") { + InstallSignalHandler(); + + test0(); + test1(); + test2(); + test3(); + test4(); + for (size_t i = 0; i < 4; ++i) { + test5(i, false); + test5(i, true); + } + for (size_t i = 0; i < 4; ++i) { + test6(i, false); + test6(i, true); + } + + // FEX-Emu doesn't currently support data breakpoints. + if constexpr (false) { + struct Test7Data { + size_t Size; + bool Read; + bool ExpectHit; + size_t Offset; + }; + Test7Data Test7[] = { + // 1-byte. + {1, false, true, 7}, + {1, true, true, 7}, + {1, false, false, 6}, + {1, true, false, 6}, + // 2-byte + {2, false, true, 6}, + {2, true, true, 6}, + {2, false, false, 4}, + {2, true, false, 4}, + // 4-byte + {4, false, true, 4}, + {4, true, true, 4}, + {4, false, false, 0}, + {4, true, false, 0}, +#ifdef __x86_64__ + // 8-byte + {8, false, true, 0}, + {8, true, true, 0}, +#endif + }; + + for (auto Data : Test7) { + test7(Data.Size, Data.Read, Data.ExpectHit, Data.Offset); + } + } +} diff --git a/unittests/FEXMingwTests/tests/signal/partial_decode_failure.cpp b/unittests/FEXMingwTests/tests/signal/partial_decode_failure.cpp new file mode 100644 index 0000000000..cbfb3ae200 --- /dev/null +++ b/unittests/FEXMingwTests/tests/signal/partial_decode_failure.cpp @@ -0,0 +1,158 @@ +#include +#include + +#include +#include +#include +#include +#include + +// FEX-Emu had a bug where partially decoded instruction faults weren't returning the correct data in the signal handler. +// Simple test that pushes a 7-byte NOP and a RET instruction across a RWX+RW page boundary to ensure correct fault addresses. +#ifdef __x86_64__ +#define PREFIX(x) _##x +#else +#define PREFIX(x) x +#endif + +extern "C" { +__attribute__((naked)) void Ret() { + __asm volatile(R"( + .global _RetInstruction + _RetInstruction: + ret; + )"); +} + +extern void* PREFIX(RetInstruction); +} + +struct ReturnDataStruct { + DWORD Signal {}; + size_t FaultRIP {}; + size_t FaultAddr {}; +}; + +std::optional SignalReturnData {}; + +__attribute__((stdcall)) static long CapturingHandler(struct _EXCEPTION_POINTERS* ExceptionInfo) { +#ifdef __x86_64__ + auto& RIP = ExceptionInfo->ContextRecord->Rip; +#else + auto& RIP = ExceptionInfo->ContextRecord->Eip; +#endif + + SignalReturnData = ReturnDataStruct { + .Signal = ExceptionInfo->ExceptionRecord->ExceptionCode, + .FaultRIP = RIP, + .FaultAddr = ExceptionInfo->ExceptionRecord->ExceptionInformation[1], + }; + + RIP = reinterpret_cast(&PREFIX(RetInstruction)); + return EXCEPTION_CONTINUE_EXECUTION; +} + +TEST_CASE("Partial Fault requires correct data") { + AddVectoredExceptionHandler(true, CapturingHandler); + + SYSTEM_INFO system_info {}; + GetSystemInfo(&system_info); + + const auto PageSize = system_info.dwPageSize; + REQUIRE(PageSize > 0); + + void* Ptr = ::VirtualAlloc(nullptr, PageSize * 2, MEM_COMMIT | MEM_TOP_DOWN, PAGE_EXECUTE_READWRITE); + REQUIRE(Ptr != nullptr); + + DWORD OldProtect {}; + REQUIRE(::VirtualProtect(static_cast(Ptr) + PageSize, PageSize, PAGE_READWRITE, &OldProtect) != 0); + + constexpr std::array NOPData = { + 0x0f, 0x18, 0x25, 0, 0, 0, 0, // nop dword [rip + Index] + 0xc3, // ret + }; + + struct ResultsStruct { + bool ShouldFault {}; + std::optional Result {}; + }; + + std::array TestResults {{ + // Both instructions inside the executable page, won't fault. + {false, std::nullopt}, + + // Faults on the `ret` on the page boundary, which means FaultRIP == FaultAddr. + {true, + ReturnDataStruct { + .Signal = STATUS_ACCESS_VIOLATION, + .FaultRIP = reinterpret_cast(Ptr) + PageSize, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + // Starts faulting in the middle of nop instruction decode. + // FaultAddr is always on the page boundary, but FaultRIP is where the instruction begins. + {true, + ReturnDataStruct { + .Signal = STATUS_ACCESS_VIOLATION, + .FaultRIP = reinterpret_cast(Ptr) + PageSize - 6, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + {true, + ReturnDataStruct { + .Signal = STATUS_ACCESS_VIOLATION, + .FaultRIP = reinterpret_cast(Ptr) + PageSize - 5, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + {true, + ReturnDataStruct { + .Signal = STATUS_ACCESS_VIOLATION, + .FaultRIP = reinterpret_cast(Ptr) + PageSize - 4, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + {true, + ReturnDataStruct { + .Signal = STATUS_ACCESS_VIOLATION, + .FaultRIP = reinterpret_cast(Ptr) + PageSize - 3, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + {true, + ReturnDataStruct { + .Signal = STATUS_ACCESS_VIOLATION, + .FaultRIP = reinterpret_cast(Ptr) + PageSize - 2, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + {true, + ReturnDataStruct { + .Signal = STATUS_ACCESS_VIOLATION, + .FaultRIP = reinterpret_cast(Ptr) + PageSize - 1, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + // NOP Instruction is fully inside the RW page, so matches again. + {true, + ReturnDataStruct { + .Signal = STATUS_ACCESS_VIOLATION, + .FaultRIP = reinterpret_cast(Ptr) + PageSize, + .FaultAddr = reinterpret_cast(Ptr) + PageSize, + }}, + }}; + + for (size_t i = 0; i < TestResults.size(); ++i) { + auto& TestResult = TestResults[i]; + uint8_t* Code = static_cast(Ptr) + PageSize - NOPData.size() + i; + memcpy(Code, NOPData.data(), NOPData.size()); + + using FuncPtr = void (*)(); + auto Func = reinterpret_cast(Code); + + SignalReturnData.reset(); + Func(); + + auto Result = SignalReturnData; + + REQUIRE(TestResult.ShouldFault == Result.has_value()); + if (TestResult.ShouldFault) { + CHECK(TestResult.Result->Signal == Result->Signal); + CHECK(TestResult.Result->FaultRIP == Result->FaultRIP); + CHECK(TestResult.Result->FaultAddr == Result->FaultAddr); + } + } +} diff --git a/unittests/InstructionCountCI/AFP/H0F3A.json b/unittests/InstructionCountCI/AFP/H0F3A.json index e3f5c86cd1..ab85d52991 100644 --- a/unittests/InstructionCountCI/AFP/H0F3A.json +++ b/unittests/InstructionCountCI/AFP/H0F3A.json @@ -8,7 +8,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "roundss xmm0, xmm1, 00000000b": { diff --git a/unittests/InstructionCountCI/AFP/SVE256/Secondary.json b/unittests/InstructionCountCI/AFP/SVE256/Secondary.json index 8bd3d2da05..af357531ff 100644 --- a/unittests/InstructionCountCI/AFP/SVE256/Secondary.json +++ b/unittests/InstructionCountCI/AFP/SVE256/Secondary.json @@ -7,7 +7,7 @@ "AFP" ], "DisabledHostFeatures": [], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "cvtpi2ps xmm0, [rax]": { diff --git a/unittests/InstructionCountCI/AFP/SVE256/Secondary_REP.json b/unittests/InstructionCountCI/AFP/SVE256/Secondary_REP.json index 1ebfdb7de8..9a85833b77 100644 --- a/unittests/InstructionCountCI/AFP/SVE256/Secondary_REP.json +++ b/unittests/InstructionCountCI/AFP/SVE256/Secondary_REP.json @@ -9,7 +9,7 @@ "DisabledHostFeatures": [ "RPRES" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "cvtsi2ss xmm0, eax": { diff --git a/unittests/InstructionCountCI/AFP/SVE256/Secondary_REPNE.json b/unittests/InstructionCountCI/AFP/SVE256/Secondary_REPNE.json index a5f15a72f1..beb441c4c7 100644 --- a/unittests/InstructionCountCI/AFP/SVE256/Secondary_REPNE.json +++ b/unittests/InstructionCountCI/AFP/SVE256/Secondary_REPNE.json @@ -7,7 +7,7 @@ "AFP" ], "DisabledHostFeatures": [], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "cvtsi2sd xmm0, eax": { diff --git a/unittests/InstructionCountCI/AFP/Secondary.json b/unittests/InstructionCountCI/AFP/Secondary.json index 286ab68804..2df611c8de 100644 --- a/unittests/InstructionCountCI/AFP/Secondary.json +++ b/unittests/InstructionCountCI/AFP/Secondary.json @@ -8,7 +8,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "cvtpi2ps xmm0, [rax]": { diff --git a/unittests/InstructionCountCI/AFP/Secondary_REP.json b/unittests/InstructionCountCI/AFP/Secondary_REP.json index 7813cf1deb..21d49dde32 100644 --- a/unittests/InstructionCountCI/AFP/Secondary_REP.json +++ b/unittests/InstructionCountCI/AFP/Secondary_REP.json @@ -9,7 +9,7 @@ "SVE256", "RPRES" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "cvtsi2ss xmm0, eax": { diff --git a/unittests/InstructionCountCI/AFP/Secondary_REPNE.json b/unittests/InstructionCountCI/AFP/Secondary_REPNE.json index 78a29f0a06..7c0e31dd22 100644 --- a/unittests/InstructionCountCI/AFP/Secondary_REPNE.json +++ b/unittests/InstructionCountCI/AFP/Secondary_REPNE.json @@ -8,7 +8,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "cvtsi2sd xmm0, eax": { diff --git a/unittests/InstructionCountCI/AFP/VEX_map1.json b/unittests/InstructionCountCI/AFP/VEX_map1.json index f63e618eaf..f99c6c4b2d 100644 --- a/unittests/InstructionCountCI/AFP/VEX_map1.json +++ b/unittests/InstructionCountCI/AFP/VEX_map1.json @@ -9,7 +9,7 @@ "DisabledHostFeatures": [ "RPRES" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vsqrtss xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/AFP/VEX_map3.json b/unittests/InstructionCountCI/AFP/VEX_map3.json index 0f1fee4b66..0e414e32a2 100644 --- a/unittests/InstructionCountCI/AFP/VEX_map3.json +++ b/unittests/InstructionCountCI/AFP/VEX_map3.json @@ -7,7 +7,7 @@ "AFP" ], "DisabledHostFeatures": [], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vroundss xmm0, xmm1, 00000000b": { diff --git a/unittests/InstructionCountCI/AVX128/FMA4.json b/unittests/InstructionCountCI/AVX128/FMA4.json index dabe0090f2..f6ac70bedb 100644 --- a/unittests/InstructionCountCI/AVX128/FMA4.json +++ b/unittests/InstructionCountCI/AVX128/FMA4.json @@ -7,426 +7,486 @@ "SVE256", "SVE128" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vfmaddsubps xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x5c 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmaddsubps ymm0, ymm1, ymm2, ymm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x5c 256-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmaddsubpd xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x5d 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmaddsubpd ymm0, ymm1, ymm2, ymm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x5d 256-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmsubaddps xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x5e 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmsubaddps ymm0, ymm1, ymm2, ymm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x5e 256-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmsubaddpd xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x5f 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmsubaddpd ymm0, ymm1, ymm2, ymm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x5f 256-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmaddps xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x68 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmaddps ymm0, ymm1, ymm2, ymm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x68 256-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmaddpd xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x69 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmaddpd ymm0, ymm1, ymm2, ymm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x69 256-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmaddss xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x6a 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmaddsd xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x6b 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmsubps xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x6c 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmsubps ymm0, ymm1, ymm2, ymm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x6c 256-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmsubpd xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x6d 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmsubpd ymm0, ymm1, ymm2, ymm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x6d 256-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmsubss xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x6e 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfmsubsd xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x6f 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfnmaddps xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x78 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfnmaddpd ymm0, ymm1, ymm2, ymm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x78 256-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfnmaddss xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x79 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfnmaddsd xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x7a 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfnmsubps xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x7c 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfnmsubps ymm0, ymm1, ymm2, ymm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x7c 256-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfnmsubpd xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x7d 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfnmsubpd ymm0, ymm1, ymm2, ymm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x7d 256-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfnmsubss xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x7e 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "vfnmsubsd xmm0, xmm1, xmm2, xmm3": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "Map 3 0b01 0x7f 128-bit" ], "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] } diff --git a/unittests/InstructionCountCI/AVX128/VEX_map1.json b/unittests/InstructionCountCI/AVX128/VEX_map1.json index ba6cc7806d..9212db6cf1 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map1.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map1.json @@ -13,7 +13,7 @@ "SVE256", "SVE128" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vmovups xmm0, xmm0": { @@ -486,7 +486,7 @@ ], "ExpectedArm64ASM": [ "ushr v2.4s, v16.4s, #31", - "ldr q3, [x28, #3328]", + "ldr q3, [x28, #3120]", "ushl v2.4s, v2.4s, v3.4s", "addv s2, v2.4s", "mov w4, v2.s[0]" @@ -501,7 +501,7 @@ "ldr q2, [x28, #192]", "uzp2 v2.8h, v16.8h, v2.8h", "ushr v2.8h, v2.8h, #15", - "ldr q3, [x28, #3152]", + "ldr q3, [x28, #2944]", "ushl v2.8h, v2.8h, v3.8h", "addv h2, v2.8h", "umov w4, v2.h[0]" @@ -528,7 +528,7 @@ "ldr q2, [x28, #192]", "uzp2 v2.4s, v16.4s, v2.4s", "ushr v2.4s, v2.4s, #31", - "ldr q3, [x28, #3328]", + "ldr q3, [x28, #3120]", "ushl v2.4s, v2.4s, v3.4s", "addv s2, v2.4s", "mov w4, v2.s[0]" @@ -1116,7 +1116,7 @@ "Map 1 0b01 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q2, [x0, #16]", "tbl v16.16b, {v17.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" @@ -1128,7 +1128,7 @@ "Map 1 0b01 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q2, [x0, #32]", "tbl v16.16b, {v17.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" @@ -1140,7 +1140,7 @@ "Map 1 0b01 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q2, [x0, #48]", "tbl v16.16b, {v17.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" @@ -1165,7 +1165,7 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #208]", - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q3, [x0, #16]", "tbl v16.16b, {v17.16b}, v3.16b", "tbl v2.16b, {v2.16b}, v3.16b", @@ -1179,7 +1179,7 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #208]", - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q3, [x0, #32]", "tbl v16.16b, {v17.16b}, v3.16b", "tbl v2.16b, {v2.16b}, v3.16b", @@ -1193,7 +1193,7 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #208]", - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q3, [x0, #48]", "tbl v16.16b, {v17.16b}, v3.16b", "tbl v2.16b, {v2.16b}, v3.16b", @@ -1217,7 +1217,7 @@ "Map 1 0b10 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2744]", + "ldr x0, [x28, #2544]", "ldr q2, [x0, #16]", "tbl v16.16b, {v17.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" @@ -1229,7 +1229,7 @@ "Map 1 0b10 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2744]", + "ldr x0, [x28, #2544]", "ldr q2, [x0, #32]", "tbl v16.16b, {v17.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" @@ -1241,7 +1241,7 @@ "Map 1 0b10 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2744]", + "ldr x0, [x28, #2544]", "ldr q2, [x0, #48]", "tbl v16.16b, {v17.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" @@ -1268,7 +1268,7 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #208]", - "ldr x0, [x28, #2744]", + "ldr x0, [x28, #2544]", "ldr q3, [x0, #16]", "tbl v16.16b, {v17.16b}, v3.16b", "tbl v2.16b, {v2.16b}, v3.16b", @@ -1282,7 +1282,7 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #208]", - "ldr x0, [x28, #2744]", + "ldr x0, [x28, #2544]", "ldr q3, [x0, #32]", "tbl v16.16b, {v17.16b}, v3.16b", "tbl v2.16b, {v2.16b}, v3.16b", @@ -1296,7 +1296,7 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #208]", - "ldr x0, [x28, #2744]", + "ldr x0, [x28, #2544]", "ldr q3, [x0, #48]", "tbl v16.16b, {v17.16b}, v3.16b", "tbl v2.16b, {v2.16b}, v3.16b", @@ -1320,7 +1320,7 @@ "Map 1 0b11 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2736]", + "ldr x0, [x28, #2536]", "ldr q2, [x0, #16]", "tbl v16.16b, {v17.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" @@ -1332,7 +1332,7 @@ "Map 1 0b11 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2736]", + "ldr x0, [x28, #2536]", "ldr q2, [x0, #32]", "tbl v16.16b, {v17.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" @@ -1344,7 +1344,7 @@ "Map 1 0b11 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2736]", + "ldr x0, [x28, #2536]", "ldr q2, [x0, #48]", "tbl v16.16b, {v17.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" @@ -1371,7 +1371,7 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #208]", - "ldr x0, [x28, #2736]", + "ldr x0, [x28, #2536]", "ldr q3, [x0, #16]", "tbl v16.16b, {v17.16b}, v3.16b", "tbl v2.16b, {v2.16b}, v3.16b", @@ -1385,7 +1385,7 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #208]", - "ldr x0, [x28, #2736]", + "ldr x0, [x28, #2536]", "ldr q3, [x0, #32]", "tbl v16.16b, {v17.16b}, v3.16b", "tbl v2.16b, {v2.16b}, v3.16b", @@ -1399,7 +1399,7 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #208]", - "ldr x0, [x28, #2736]", + "ldr x0, [x28, #2536]", "ldr q3, [x0, #48]", "tbl v16.16b, {v17.16b}, v3.16b", "tbl v2.16b, {v2.16b}, v3.16b", @@ -2283,7 +2283,7 @@ "Map 1 0b00 0xC6 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2760]", + "ldr x0, [x28, #2560]", "ldr q2, [x0, #16]", "tbl v16.16b, {v17.16b, v18.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" @@ -2297,7 +2297,7 @@ "ExpectedArm64ASM": [ "ldr q2, [x28, #208]", "ldr q3, [x28, #224]", - "ldr x0, [x28, #2760]", + "ldr x0, [x28, #2560]", "ldr q4, [x0, #16]", "tbl v16.16b, {v17.16b, v18.16b}, v4.16b", "tbl v2.16b, {v2.16b, v3.16b}, v4.16b", @@ -2310,7 +2310,7 @@ "Map 1 0b00 0xC6 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2760]", + "ldr x0, [x28, #2560]", "ldr q2, [x0, #32]", "tbl v16.16b, {v17.16b, v18.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" @@ -2324,7 +2324,7 @@ "ExpectedArm64ASM": [ "ldr q2, [x28, #208]", "ldr q3, [x28, #224]", - "ldr x0, [x28, #2760]", + "ldr x0, [x28, #2560]", "ldr q4, [x0, #32]", "tbl v16.16b, {v17.16b, v18.16b}, v4.16b", "tbl v2.16b, {v2.16b, v3.16b}, v4.16b", @@ -2337,7 +2337,7 @@ "Map 1 0b00 0xC6 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2760]", + "ldr x0, [x28, #2560]", "ldr q2, [x0, #48]", "tbl v16.16b, {v17.16b, v18.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" @@ -2351,7 +2351,7 @@ "ExpectedArm64ASM": [ "ldr q2, [x28, #208]", "ldr q3, [x28, #224]", - "ldr x0, [x28, #2760]", + "ldr x0, [x28, #2560]", "ldr q4, [x0, #48]", "tbl v16.16b, {v17.16b, v18.16b}, v4.16b", "tbl v2.16b, {v2.16b, v3.16b}, v4.16b", @@ -3936,7 +3936,7 @@ "Map 1 0b01 0xd0 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3232]", + "ldr q2, [x28, #3024]", "eor v2.16b, v18.16b, v2.16b", "fadd v16.2d, v17.2d, v2.2d", "stp xzr, xzr, [x28, #192]" @@ -3950,7 +3950,7 @@ "ExpectedArm64ASM": [ "ldr q2, [x28, #208]", "ldr q3, [x28, #224]", - "ldr q4, [x28, #3232]", + "ldr q4, [x28, #3024]", "eor v5.16b, v18.16b, v4.16b", "fadd v16.2d, v17.2d, v5.2d", "eor v3.16b, v3.16b, v4.16b", @@ -3964,7 +3964,7 @@ "Map 1 0b11 0xd0 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3200]", + "ldr q2, [x28, #2992]", "eor v2.16b, v18.16b, v2.16b", "fadd v16.4s, v17.4s, v2.4s", "stp xzr, xzr, [x28, #192]" @@ -3978,7 +3978,7 @@ "ExpectedArm64ASM": [ "ldr q2, [x28, #208]", "ldr q3, [x28, #224]", - "ldr q4, [x28, #3200]", + "ldr q4, [x28, #2992]", "eor v5.16b, v18.16b, v4.16b", "fadd v16.4s, v17.4s, v5.4s", "eor v3.16b, v3.16b, v4.16b", @@ -4149,7 +4149,7 @@ "Map 1 0b01 0xd7 256-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3456]", + "ldr q2, [x28, #3248]", "cmlt v3.16b, v16.16b, #0", "and v2.16b, v3.16b, v2.16b", "addp v2.16b, v2.16b, v2.16b", @@ -4165,7 +4165,7 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #192]", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "cmlt v4.16b, v16.16b, #0", "and v4.16b, v4.16b, v3.16b", "addp v4.16b, v4.16b, v4.16b", diff --git a/unittests/InstructionCountCI/AVX128/VEX_map1_FCMA.json b/unittests/InstructionCountCI/AVX128/VEX_map1_FCMA.json index fccb4b4c6d..9aadba0717 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map1_FCMA.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map1_FCMA.json @@ -9,7 +9,7 @@ "SVE256", "SVE128" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vaddsubpd xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map1_SVE128.json b/unittests/InstructionCountCI/AVX128/VEX_map1_SVE128.json index 4e7c7120de..9185757806 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map1_SVE128.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map1_SVE128.json @@ -10,7 +10,7 @@ "FLAGM2", "SVE256" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vmovntps [rax], xmm0": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map1_flagm.json b/unittests/InstructionCountCI/AVX128/VEX_map1_flagm.json index 6aee8ccb82..197a5484ab 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map1_flagm.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map1_flagm.json @@ -10,7 +10,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vucomiss xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2.json b/unittests/InstructionCountCI/AVX128/VEX_map2.json index ac5a721208..e774c134e5 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map2.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map2.json @@ -1,7 +1,9 @@ { "Features": { "Bitness": 64, - "EnabledHostFeatures": [], + "EnabledHostFeatures": [ + "BF16" + ], "DisabledHostFeatures": [ "AFP", "FLAGM", @@ -11,7 +13,7 @@ "I8MM", "DOTPROD" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vpshufb xmm0, xmm1, xmm2": { @@ -1902,7 +1904,7 @@ "Map 2 0b01 0x41 256-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "zip1 v3.8h, v2.8h, v17.8h", "zip2 v2.8h, v2.8h, v17.8h", "umin v2.4s, v3.4s, v2.4s", @@ -2209,6 +2211,210 @@ "str q2, [x28, #192]" ] }, + "db 0xc4, 0xe2, 0x73, 0x50, 0xc2; {vex} vpdpbssd xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf2 0b01 0x50 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x77, 0x50, 0xc2 ; {vex} vpdpbssd ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf2 0b01 0x50 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x73, 0x51, 0xc2 ; {vex} vpdpbssds xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf2 0b01 0x51 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x77, 0x51, 0xc2 ; {vex} vpdpbssds ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf2 0b01 0x51 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x72, 0x50, 0xc2 ; {vex} vpdpbsud xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0x50 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x76, 0x50, 0xc2 ; {vex} vpdpbsud ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0x50 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x72, 0x51, 0xc2 ; {vex} vpdpbsuds xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0x51 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x76, 0x51, 0xc2 ; {vex} vpdpbsuds ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0x51 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x70, 0x50, 0xc2 ; {vex} vpdpbuud xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0x50 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x74, 0x50, 0xc2 ; {vex} vpdpbuud ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0x50 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x70, 0x51, 0xc2; {vex} vpdpbuuds xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0x51 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x74, 0x51, 0xc2 ; {vex} vpdpbuuds ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0x51 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, "vpdpwssd xmm0, xmm1, xmm2": { "x86InstructionCount": 1, "ExpectedInstructionCount": 5, @@ -2393,6 +2599,30 @@ "str q16, [x28, #192]" ] }, + "db 0xc4, 0xe2, 0x7a, 0x72, 0xd4 ; {vex} vcvtneps2bf16 xmm2, xmm4": { + "ExpectedInstructionCount": 2, + "Comment": [ + "Map 2 0b01 0x72 128-bit" + ], + "ExpectedArm64ASM": [ + "bfcvtn v18.4h, v20.4s", + "stp xzr, xzr, [x28, #224]" + ] + }, + "db 0xc4, 0xe2, 0x7e, 0x72, 0xdc ; {vex} vcvtneps2bf16 xmm3, ymm4": { + "ExpectedInstructionCount": 6, + "Comment": [ + "Map 2 0b01 0x72 256-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x28, #256]", + "bfcvtn v3.4h, v20.4s", + "mov v0.16b, v3.16b", + "bfcvtn2 v0.8h, v2.4s", + "mov v19.16b, v0.16b", + "stp xzr, xzr, [x28, #240]" + ] + }, "vpbroadcastb xmm0, xmm1": { "ExpectedInstructionCount": 2, "Comment": [ @@ -4695,7 +4925,7 @@ "Map 2 0b01 0x96 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3200]", + "ldr q2, [x28, #2992]", "eor v2.16b, v17.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.4s, v16.4s, v18.4s", @@ -4712,7 +4942,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3200]", + "ldr q5, [x28, #2992]", "eor v6.16b, v17.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.4s, v16.4s, v18.4s", @@ -4728,7 +4958,7 @@ "Map 2 0b01 0x96 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3232]", + "ldr q2, [x28, #3024]", "eor v2.16b, v17.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.2d, v16.2d, v18.2d", @@ -4745,7 +4975,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3232]", + "ldr q5, [x28, #3024]", "eor v6.16b, v17.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.2d, v16.2d, v18.2d", @@ -4761,7 +4991,7 @@ "Map 2 0b01 0x97 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3264]", + "ldr q2, [x28, #3056]", "eor v2.16b, v17.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.4s, v16.4s, v18.4s", @@ -4778,7 +5008,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3264]", + "ldr q5, [x28, #3056]", "eor v6.16b, v17.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.4s, v16.4s, v18.4s", @@ -4794,7 +5024,7 @@ "Map 2 0b01 0x97 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3296]", + "ldr q2, [x28, #3088]", "eor v2.16b, v17.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.2d, v16.2d, v18.2d", @@ -4811,7 +5041,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3296]", + "ldr q5, [x28, #3088]", "eor v6.16b, v17.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.2d, v16.2d, v18.2d", @@ -5751,7 +5981,7 @@ "Map 2 0b01 0xa6 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3200]", + "ldr q2, [x28, #2992]", "eor v2.16b, v18.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.4s, v17.4s, v16.4s", @@ -5768,7 +5998,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3200]", + "ldr q5, [x28, #2992]", "eor v6.16b, v18.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.4s, v17.4s, v16.4s", @@ -5784,7 +6014,7 @@ "Map 2 0b01 0xa6 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3232]", + "ldr q2, [x28, #3024]", "eor v2.16b, v18.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.2d, v17.2d, v16.2d", @@ -5801,7 +6031,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3232]", + "ldr q5, [x28, #3024]", "eor v6.16b, v18.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.2d, v17.2d, v16.2d", @@ -5817,7 +6047,7 @@ "Map 2 0b01 0xa7 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3264]", + "ldr q2, [x28, #3056]", "eor v2.16b, v18.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.4s, v17.4s, v16.4s", @@ -5834,7 +6064,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3264]", + "ldr q5, [x28, #3056]", "eor v6.16b, v18.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.4s, v17.4s, v16.4s", @@ -5850,7 +6080,7 @@ "Map 2 0b01 0xa7 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3296]", + "ldr q2, [x28, #3088]", "eor v2.16b, v18.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.2d, v17.2d, v16.2d", @@ -5867,7 +6097,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3296]", + "ldr q5, [x28, #3088]", "eor v6.16b, v18.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.2d, v17.2d, v16.2d", @@ -5877,13 +6107,226 @@ "str q4, [x28, #192]" ] }, + "db 0xc4, 0xe2, 0x78, 0xb0, 0x00 ; vcvtneoph2ps xmm0, [rax]": { + "ExpectedInstructionCount": 4, + "Comment": [ + "Map 2 0b00 0xb0 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x4]", + "uzp2 v2.8h, v2.8h, v2.8h", + "fcvtl v16.4s, v2.4h", + "stp xzr, xzr, [x28, #192]" + ] + }, + "db 0xc4, 0xe2, 0x7c, 0xb0, 0x00 ; vcvtneoph2ps ymm0, [rax]": { + "ExpectedInstructionCount": 6, + "Comment": [ + "Map 2 0b00 0xb0 256-bit" + ], + "ExpectedArm64ASM": [ + "ldp q2, q3, [x4]", + "uzp2 v2.8h, v2.8h, v2.8h", + "fcvtl v16.4s, v2.4h", + "uzp2 v2.8h, v3.8h, v3.8h", + "fcvtl v2.4s, v2.4h", + "str q2, [x28, #192]" + ] + }, + "db 0xc4, 0xe2, 0x79, 0xb0, 0x00 ; vcvtneeph2ps xmm0, [rax]": { + "ExpectedInstructionCount": 4, + "Comment": [ + "Map 2 0b01 0xb0 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x4]", + "uzp1 v2.8h, v2.8h, v2.8h", + "fcvtl v16.4s, v2.4h", + "stp xzr, xzr, [x28, #192]" + ] + }, + "db 0xc4, 0xe2, 0x7d, 0xb0, 0x00 ; vcvtneeph2ps ymm0, [rax]": { + "ExpectedInstructionCount": 6, + "Comment": [ + "Map 2 0b01 0xb0 256-bit" + ], + "ExpectedArm64ASM": [ + "ldp q2, q3, [x4]", + "uzp1 v2.8h, v2.8h, v2.8h", + "fcvtl v16.4s, v2.4h", + "uzp1 v2.8h, v3.8h, v3.8h", + "fcvtl v2.4s, v2.4h", + "str q2, [x28, #192]" + ] + }, + "db 0xc4, 0xe2, 0x7b, 0xb0, 0x00 ; vcvtneobf162ps xmm0, [rax]": { + "ExpectedInstructionCount": 4, + "Comment": [ + "Map 2 0b10 0xb0 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x4]", + "ushr v2.4s, v2.4s, #16", + "shl v16.4s, v2.4s, #16", + "stp xzr, xzr, [x28, #192]" + ] + }, + "db 0xc4, 0xe2, 0x7f, 0xb0, 0x00 ; vcvtneobf162ps ymm0, [rax]": { + "ExpectedInstructionCount": 6, + "Comment": [ + "Map 2 0b10 0xb0 256-bit" + ], + "ExpectedArm64ASM": [ + "ldp q2, q3, [x4]", + "ushr v2.4s, v2.4s, #16", + "shl v16.4s, v2.4s, #16", + "ushr v3.4s, v3.4s, #16", + "shl v3.4s, v3.4s, #16", + "str q3, [x28, #192]" + ] + }, + "db 0xc4, 0xe2, 0x7a, 0xb0, 0x00 ; vcvtneebf162ps xmm0, [rax]": { + "ExpectedInstructionCount": 3, + "Comment": [ + "Map 2 0b11 0xb0 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x4]", + "shl v16.4s, v2.4s, #16", + "stp xzr, xzr, [x28, #192]" + ] + }, + "db 0xc4, 0xe2, 0x7e, 0xb0, 0x00 ; vcvtneebf162ps ymm0, [rax]": { + "ExpectedInstructionCount": 4, + "Comment": [ + "Map 2 0b11 0xb0 256-bit" + ], + "ExpectedArm64ASM": [ + "ldp q2, q3, [x4]", + "shl v16.4s, v2.4s, #16", + "shl v3.4s, v3.4s, #16", + "str q3, [x28, #192]" + ] + }, + "db 0xc4, 0xe2, 0x79, 0xb1, 0x00 ; vbcstnesh2ps xmm0, [rax]": { + "ExpectedInstructionCount": 4, + "Comment": [ + "Map 2 0b01 0xb1 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr h2, [x4]", + "fcvt s2, h2", + "dup v16.4s, v2.s[0]", + "stp xzr, xzr, [x28, #192]" + ] + }, + "db 0xc4, 0xe2, 0x7d, 0xb1, 0x00 ; vbcstnesh2ps ymm0, [rax]": { + "ExpectedInstructionCount": 4, + "Comment": [ + "Map 2 0b01 0xb1 256-bit" + ], + "ExpectedArm64ASM": [ + "ldr h2, [x4]", + "fcvt s2, h2", + "dup v16.4s, v2.s[0]", + "str q16, [x28, #192]" + ] + }, + "db 0xc4, 0xe2, 0x7a, 0xb1, 0x00 ; vbcstnebf162ps xmm0, [rax]": { + "ExpectedInstructionCount": 4, + "Comment": [ + "Map 2 0b10 0xb1 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr h2, [x4]", + "shl v2.4s, v2.4s, #16", + "dup v16.4s, v2.s[0]", + "stp xzr, xzr, [x28, #192]" + ] + }, + "db 0xc4, 0xe2, 0x7e, 0xb1, 0x00 ; vbcstnebf162ps ymm0, [rax]": { + "ExpectedInstructionCount": 4, + "Comment": [ + "Map 2 0b10 0xb1 256-bit" + ], + "ExpectedArm64ASM": [ + "ldr h2, [x4]", + "shl v2.4s, v2.4s, #16", + "dup v16.4s, v2.s[0]", + "str q16, [x28, #192]" + ] + }, + "vpmadd52luq xmm0, xmm1, xmm2": { + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xb4 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "vpmadd52luq ymm0, ymm1, ymm2": { + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xb4 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "vpmadd52huq xmm0, xmm1, xmm2": { + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xb5 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "vpmadd52huq ymm0, ymm1, ymm2": { + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xb5 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, "vfmaddsub231ps xmm0, xmm1, xmm2": { "ExpectedInstructionCount": 5, "Comment": [ "Map 2 0b01 0xb6 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3200]", + "ldr q2, [x28, #2992]", "eor v2.16b, v16.16b, v2.16b", "mov v16.16b, v2.16b", "fmla v16.4s, v17.4s, v18.4s", @@ -5899,7 +6342,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3200]", + "ldr q5, [x28, #2992]", "eor v6.16b, v16.16b, v5.16b", "mov v16.16b, v6.16b", "fmla v16.4s, v17.4s, v18.4s", @@ -5914,7 +6357,7 @@ "Map 2 0b01 0xb6 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3232]", + "ldr q2, [x28, #3024]", "eor v2.16b, v16.16b, v2.16b", "mov v16.16b, v2.16b", "fmla v16.2d, v17.2d, v18.2d", @@ -5930,7 +6373,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3232]", + "ldr q5, [x28, #3024]", "eor v6.16b, v16.16b, v5.16b", "mov v16.16b, v6.16b", "fmla v16.2d, v17.2d, v18.2d", @@ -5945,7 +6388,7 @@ "Map 2 0b01 0xb7 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3264]", + "ldr q2, [x28, #3056]", "eor v2.16b, v16.16b, v2.16b", "mov v16.16b, v2.16b", "fmla v16.4s, v17.4s, v18.4s", @@ -5961,7 +6404,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3264]", + "ldr q5, [x28, #3056]", "eor v6.16b, v16.16b, v5.16b", "mov v16.16b, v6.16b", "fmla v16.4s, v17.4s, v18.4s", @@ -5976,7 +6419,7 @@ "Map 2 0b01 0xb7 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3296]", + "ldr q2, [x28, #3088]", "eor v2.16b, v16.16b, v2.16b", "mov v16.16b, v2.16b", "fmla v16.2d, v17.2d, v18.2d", @@ -5992,7 +6435,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3296]", + "ldr q5, [x28, #3088]", "eor v6.16b, v16.16b, v5.16b", "mov v16.16b, v6.16b", "fmla v16.2d, v17.2d, v18.2d", @@ -6001,6 +6444,210 @@ "str q2, [x28, #192]" ] }, + "db 0xc4, 0xe2, 0x72, 0xd2, 0xc2 ; {vex} vpdpwsud xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0xd2 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x76, 0xd2, 0xc2 ; {vex} vpdpwsud ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0xd2 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x72, 0xd3, 0xc2 ; {vex} vpdpwsuds xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0xd3 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x76, 0xd3, 0xc2 ; {vex} vpdpwsuds ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0xd3 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x71, 0xd2, 0xc2 ; {vex} vpdpwusd xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0x66 0b01 0xd2 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x75, 0xd2, 0xc2 ; {vex} vpdpwusd ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0x66 0b01 0xd2 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x71, 0xd3, 0xc2 ; {vex} vpdpwusds xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0x66 0b01 0xd3 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x75, 0xd3, 0xc2 ; {vex} vpdpwusds ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0x66 0b01 0xd3 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x70, 0xd2, 0xc2 ; {vex} vpdpwuud xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xd2 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x74, 0xd2, 0xc2 ; {vex} vpdpwuud ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xd2 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x70, 0xd3, 0xc2 ; {vex} vpdpwuuds xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xd3 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x74, 0xd3, 0xc2 ; {vex} vpdpwuuds ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xd3 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, "vaesimc xmm0, xmm1": { "ExpectedInstructionCount": 2, "Comment": [ diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_AFP.json b/unittests/InstructionCountCI/AVX128/VEX_map2_AFP.json index 8853999291..e5f98f7711 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map2_AFP.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map2_AFP.json @@ -8,7 +8,7 @@ "SVE256", "SVE128" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vfmadd132ss xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_DOTPROD.json b/unittests/InstructionCountCI/AVX128/VEX_map2_DOTPROD.json index 025454ec3f..3ac6084c63 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map2_DOTPROD.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map2_DOTPROD.json @@ -12,7 +12,7 @@ "SVE256", "I8MM" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vpdpbusd xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_I8MM.json b/unittests/InstructionCountCI/AVX128/VEX_map2_I8MM.json index 6a341e68db..5d744a6909 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map2_I8MM.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map2_I8MM.json @@ -11,7 +11,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vpdpbusd xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json b/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json index 7c7f9a56c6..89892a7783 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json @@ -10,7 +10,7 @@ "FLAGM2", "SVE256" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vmovntdqa xmm0, [rax]": { @@ -2844,7 +2844,7 @@ "Map 2 0b01 0x96 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3200]", + "ldr q2, [x28, #2992]", "eor v2.16b, v17.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.4s, v16.4s, v18.4s", @@ -2861,7 +2861,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3200]", + "ldr q5, [x28, #2992]", "eor v6.16b, v17.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.4s, v16.4s, v18.4s", @@ -2877,7 +2877,7 @@ "Map 2 0b01 0x96 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3232]", + "ldr q2, [x28, #3024]", "eor v2.16b, v17.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.2d, v16.2d, v18.2d", @@ -2894,7 +2894,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3232]", + "ldr q5, [x28, #3024]", "eor v6.16b, v17.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.2d, v16.2d, v18.2d", @@ -2910,7 +2910,7 @@ "Map 2 0b01 0x97 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3264]", + "ldr q2, [x28, #3056]", "eor v2.16b, v17.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.4s, v16.4s, v18.4s", @@ -2927,7 +2927,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3264]", + "ldr q5, [x28, #3056]", "eor v6.16b, v17.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.4s, v16.4s, v18.4s", @@ -2943,7 +2943,7 @@ "Map 2 0b01 0x97 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3296]", + "ldr q2, [x28, #3088]", "eor v2.16b, v17.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.2d, v16.2d, v18.2d", @@ -2960,7 +2960,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3296]", + "ldr q5, [x28, #3088]", "eor v6.16b, v17.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.2d, v16.2d, v18.2d", @@ -3880,7 +3880,7 @@ "Map 2 0b01 0xa6 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3200]", + "ldr q2, [x28, #2992]", "eor v2.16b, v18.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.4s, v17.4s, v16.4s", @@ -3897,7 +3897,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3200]", + "ldr q5, [x28, #2992]", "eor v6.16b, v18.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.4s, v17.4s, v16.4s", @@ -3913,7 +3913,7 @@ "Map 2 0b01 0xa6 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3232]", + "ldr q2, [x28, #3024]", "eor v2.16b, v18.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.2d, v17.2d, v16.2d", @@ -3930,7 +3930,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3232]", + "ldr q5, [x28, #3024]", "eor v6.16b, v18.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.2d, v17.2d, v16.2d", @@ -3946,7 +3946,7 @@ "Map 2 0b01 0xa7 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3264]", + "ldr q2, [x28, #3056]", "eor v2.16b, v18.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.4s, v17.4s, v16.4s", @@ -3963,7 +3963,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3264]", + "ldr q5, [x28, #3056]", "eor v6.16b, v18.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.4s, v17.4s, v16.4s", @@ -3979,7 +3979,7 @@ "Map 2 0b01 0xa7 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3296]", + "ldr q2, [x28, #3088]", "eor v2.16b, v18.16b, v2.16b", "mov v0.16b, v2.16b", "fmla v0.2d, v17.2d, v16.2d", @@ -3996,7 +3996,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3296]", + "ldr q5, [x28, #3088]", "eor v6.16b, v18.16b, v5.16b", "mov v0.16b, v6.16b", "fmla v0.2d, v17.2d, v16.2d", @@ -4012,7 +4012,7 @@ "Map 2 0b01 0xb6 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3200]", + "ldr q2, [x28, #2992]", "eor v2.16b, v16.16b, v2.16b", "mov v16.16b, v2.16b", "fmla v16.4s, v17.4s, v18.4s", @@ -4028,7 +4028,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3200]", + "ldr q5, [x28, #2992]", "eor v6.16b, v16.16b, v5.16b", "mov v16.16b, v6.16b", "fmla v16.4s, v17.4s, v18.4s", @@ -4043,7 +4043,7 @@ "Map 2 0b01 0xb6 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3232]", + "ldr q2, [x28, #3024]", "eor v2.16b, v16.16b, v2.16b", "mov v16.16b, v2.16b", "fmla v16.2d, v17.2d, v18.2d", @@ -4059,7 +4059,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3232]", + "ldr q5, [x28, #3024]", "eor v6.16b, v16.16b, v5.16b", "mov v16.16b, v6.16b", "fmla v16.2d, v17.2d, v18.2d", @@ -4074,7 +4074,7 @@ "Map 2 0b01 0xb7 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3264]", + "ldr q2, [x28, #3056]", "eor v2.16b, v16.16b, v2.16b", "mov v16.16b, v2.16b", "fmla v16.4s, v17.4s, v18.4s", @@ -4090,7 +4090,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3264]", + "ldr q5, [x28, #3056]", "eor v6.16b, v16.16b, v5.16b", "mov v16.16b, v6.16b", "fmla v16.4s, v17.4s, v18.4s", @@ -4105,7 +4105,7 @@ "Map 2 0b01 0xb7 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3296]", + "ldr q2, [x28, #3088]", "eor v2.16b, v16.16b, v2.16b", "mov v16.16b, v2.16b", "fmla v16.2d, v17.2d, v18.2d", @@ -4121,7 +4121,7 @@ "ldr q2, [x28, #192]", "ldr q3, [x28, #208]", "ldr q4, [x28, #224]", - "ldr q5, [x28, #3296]", + "ldr q5, [x28, #3088]", "eor v6.16b, v16.16b, v5.16b", "mov v16.16b, v6.16b", "fmla v16.2d, v17.2d, v18.2d", diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json b/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json index 4f12dc3c1a..bbba5921e4 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json @@ -11,7 +11,7 @@ "SVE256", "SVEBITPERM" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vtestps xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map3.json b/unittests/InstructionCountCI/AVX128/VEX_map3.json index 321dfaf633..afbb9ee92c 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map3.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map3.json @@ -7,7 +7,7 @@ "SVE256", "SVE128" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vpermq ymm0, ymm1, 1": { @@ -338,7 +338,7 @@ "Map 3 0b01 0x02 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3360]", + "ldr q2, [x28, #3152]", "tbx v16.16b, {v17.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" ] @@ -349,7 +349,7 @@ "Map 3 0b01 0x02 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3376]", + "ldr q2, [x28, #3168]", "tbx v16.16b, {v17.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" ] @@ -370,7 +370,7 @@ "Map 3 0b01 0x02 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3392]", + "ldr q2, [x28, #3184]", "tbx v16.16b, {v17.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" ] @@ -392,7 +392,7 @@ "Map 3 0b01 0x02 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3408]", + "ldr q2, [x28, #3200]", "tbx v16.16b, {v17.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" ] @@ -413,7 +413,7 @@ "Map 3 0b01 0x02 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3424]", + "ldr q2, [x28, #3216]", "tbx v16.16b, {v17.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" ] @@ -424,7 +424,7 @@ "Map 3 0b01 0x02 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3440]", + "ldr q2, [x28, #3232]", "tbx v16.16b, {v17.16b}, v2.16b", "stp xzr, xzr, [x28, #192]" ] @@ -3494,7 +3494,7 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "ldr q3, [x28, #3344]", + "ldr q3, [x28, #3136]", "mov v16.16b, v17.16b", "aese v16.16b, v2.16b", "tbl v16.16b, {v16.16b}, v3.16b", @@ -3508,7 +3508,7 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "ldr q3, [x28, #3344]", + "ldr q3, [x28, #3136]", "mov v16.16b, v17.16b", "aese v16.16b, v2.16b", "tbl v16.16b, {v16.16b}, v3.16b", diff --git a/unittests/InstructionCountCI/AVX128/VEX_map3_SVE128.json b/unittests/InstructionCountCI/AVX128/VEX_map3_SVE128.json index e56a25fc01..34d9637edf 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map3_SVE128.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map3_SVE128.json @@ -8,7 +8,7 @@ "AFP", "SVE256" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vblendvps xmm0, xmm1, xmm2, xmm3": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map_group.json b/unittests/InstructionCountCI/AVX128/VEX_map_group.json index b5f7de271a..8a00fa9f11 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map_group.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map_group.json @@ -9,7 +9,7 @@ "SVE256", "SVE128" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vpsrlw xmm0, xmm1, 0": { diff --git a/unittests/InstructionCountCI/Atomics.json b/unittests/InstructionCountCI/Atomics.json index 42de4dfe35..bd91224051 100644 --- a/unittests/InstructionCountCI/Atomics.json +++ b/unittests/InstructionCountCI/Atomics.json @@ -9,7 +9,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "lock add byte [rax], cl": { diff --git a/unittests/InstructionCountCI/Crypto/H0F38.json b/unittests/InstructionCountCI/Crypto/H0F38.json index 5d64faa7db..72f2090024 100644 --- a/unittests/InstructionCountCI/Crypto/H0F38.json +++ b/unittests/InstructionCountCI/Crypto/H0F38.json @@ -9,7 +9,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "sha1nexte xmm0, xmm1": { @@ -32,7 +32,7 @@ "0x66 0x0f 0x38 0xca" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q2, [x0, #432]", "tbl v3.16b, {v16.16b}, v2.16b", "tbl v4.16b, {v17.16b}, v2.16b", @@ -41,7 +41,7 @@ ] }, "sha256rnds2 xmm0, xmm1": { - "ExpectedInstructionCount": 10, + "ExpectedInstructionCount": 9, "Comment": [ "0x66 0x0f 0x38 0xcb" ], @@ -50,11 +50,10 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v16.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v16.4s, v2.4s" ] }, @@ -80,6 +79,54 @@ "sha256su1 v16.4s, v2.4s, v3.4s" ] }, + "db 0xc4, 0xe2, 0x77, 0xcb, 0xc2 ; vsha512rnds2 ymm0, ymm1, xmm2": { + "ExpectedInstructionCount": 8, + "Comment": [ + "0xf2 0x0f 0x38 0xcb" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x7f, 0xcc, 0xc1 ; vsha512msg1 ymm0, xmm1": { + "ExpectedInstructionCount": 8, + "Comment": [ + "0xf2 0x0f 0x38 0xcc" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x7f, 0xcd, 0xc1 ; vsha512msg2 ymm0, ymm1": { + "ExpectedInstructionCount": 8, + "Comment": [ + "0xf2 0x0f 0x38 0xcd" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, "aesimc xmm0, xmm1": { "ExpectedInstructionCount": 1, "Comment": [ diff --git a/unittests/InstructionCountCI/Crypto/H0F38_SVE128.json b/unittests/InstructionCountCI/Crypto/H0F38_SVE128.json index c9f78bebad..a3ad362d21 100644 --- a/unittests/InstructionCountCI/Crypto/H0F38_SVE128.json +++ b/unittests/InstructionCountCI/Crypto/H0F38_SVE128.json @@ -9,7 +9,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "sha1nexte xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Crypto/H0F3A.json b/unittests/InstructionCountCI/Crypto/H0F3A.json index 59b9a1cd74..03a3493bca 100644 --- a/unittests/InstructionCountCI/Crypto/H0F3A.json +++ b/unittests/InstructionCountCI/Crypto/H0F3A.json @@ -9,7 +9,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "pclmulqdq xmm0, xmm1, 00000b": { @@ -56,7 +56,7 @@ "0x66 0x0f 0x3a 0xdf" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3344]", + "ldr q2, [x28, #3136]", "movi v3.2d, #0x0", "mov v16.16b, v17.16b", "aese v16.16b, v3.16b", @@ -69,7 +69,7 @@ "0x66 0x0f 0x3a 0xdf" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3344]", + "ldr q2, [x28, #3136]", "movi v3.2d, #0x0", "mov v16.16b, v17.16b", "aese v16.16b, v3.16b", @@ -85,9 +85,9 @@ "0x66 0x0f 0x3a 0xcc" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3760]", + "ldr q2, [x28, #3552]", "movi v3.2d, #0x0", - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q4, [x0, #432]", "tbl v5.16b, {v16.16b}, v4.16b", "tbl v6.16b, {v17.16b}, v4.16b", @@ -102,9 +102,9 @@ "0x66 0x0f 0x3a 0xcc" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3776]", + "ldr q2, [x28, #3568]", "movi v3.2d, #0x0", - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q4, [x0, #432]", "tbl v5.16b, {v16.16b}, v4.16b", "tbl v6.16b, {v17.16b}, v4.16b", @@ -119,9 +119,9 @@ "0x66 0x0f 0x3a 0xcc" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3792]", + "ldr q2, [x28, #3584]", "movi v3.2d, #0x0", - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q4, [x0, #432]", "tbl v5.16b, {v16.16b}, v4.16b", "tbl v6.16b, {v17.16b}, v4.16b", @@ -136,9 +136,9 @@ "0x66 0x0f 0x3a 0xcc" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3808]", + "ldr q2, [x28, #3600]", "movi v3.2d, #0x0", - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q4, [x0, #432]", "tbl v5.16b, {v16.16b}, v4.16b", "tbl v6.16b, {v17.16b}, v4.16b", diff --git a/unittests/InstructionCountCI/DDD.json b/unittests/InstructionCountCI/DDD.json index daaa237c6a..5dc7610b68 100644 --- a/unittests/InstructionCountCI/DDD.json +++ b/unittests/InstructionCountCI/DDD.json @@ -10,7 +10,7 @@ "AFP", "RPRES" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Comment": [ "These 3DNow! instructions are optimal assuming that FEX doesn't SRA MMX registers", diff --git a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json index b5a6eb3138..609496082a 100644 --- a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json +++ b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json @@ -8,7 +8,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Comment": [ "Instructions that explicitly push against the limits of ARM's loadstore instructions" diff --git a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json index 949505a92f..06b8cecd70 100644 --- a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json +++ b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json @@ -8,7 +8,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Comment": [ "Instructions that explicitly push against the limits of ARM's loadstore instructions" diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst.json b/unittests/InstructionCountCI/FEXOpt/MultiInst.json index 440f553d79..7f30c54f5f 100644 --- a/unittests/InstructionCountCI/FEXOpt/MultiInst.json +++ b/unittests/InstructionCountCI/FEXOpt/MultiInst.json @@ -13,36 +13,12 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Comment": [ "These are instruction combinations that could be more optimal if FEX optimized for them" ], "Instructions": { - "cpuid constant": { - "x86InstructionCount": 2, - "ExpectedInstructionCount": 11, - "Comment": [ - "CPUID function call with constant function id" - ], - "x86Insts": [ - "mov rax, 0", - "cpuid" - ], - "ExpectedArm64ASM": [ - "mov w4, #0x0", - "isb", - "mov w20, #0x16", - "mov w6, #0x6547", - "movk w6, #0x756e, lsl #16", - "mov w21, #0x746e", - "movk w21, #0x6c65, lsl #16", - "mov w5, #0x6e69", - "movk w5, #0x4965, lsl #16", - "mov x7, x21", - "mov x4, x20" - ] - }, "xgetbv constant": { "x86InstructionCount": 2, "ExpectedInstructionCount": 3, @@ -1720,6 +1696,44 @@ "stp q14, q2, [x28, #192]", "add sp, sp, #0xa0 (160)" ] + }, + "cmp with memory and dead flags keeps the load": { + "x86InstructionCount": 2, + "ExpectedInstructionCount": 5, + "Comment": [ + "Compare against memory with the flags overwritten before any read.", + "The compare can go but the load has to stay: it may fault, and HotSpot's C1", + "null check is exactly this shape (cmp rax, [reg] with dead flags)." + ], + "x86Insts": [ + "cmp rax, [rdx]", + "add qword [rsi + 0x128], 1" + ], + "ExpectedArm64ASM": [ + "ldr x20, [x5]", + "ldr x27, [x10, #296]", + "adds x26, x27, #0x1 (1)", + "str x26, [x10, #296]", + "cfinv" + ] + }, + "test with memory and dead flags keeps the load": { + "x86InstructionCount": 2, + "ExpectedInstructionCount": 5, + "Comment": [ + "Same as the dead compare, test against memory: the shape of a HotSpot C2 safepoint poll." + ], + "x86Insts": [ + "test rax, [rdx]", + "add qword [rsi + 0x128], 1" + ], + "ExpectedArm64ASM": [ + "ldr x20, [x5]", + "ldr x27, [x10, #296]", + "adds x26, x27, #0x1 (1)", + "str x26, [x10, #296]", + "cfinv" + ] } } } diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json b/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json index beb34f35a7..5a04e84d2c 100644 --- a/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json +++ b/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json @@ -11,7 +11,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Comment": [ "These are instruction combinations that could be more optimal if FEX optimized for them" @@ -46,6 +46,26 @@ "subs w26, w4, w20", "mov x4, x26" ] + }, + "cmp with memory and dead flags keeps the load": { + "x86InstructionCount": 2, + "ExpectedInstructionCount": 5, + "Comment": [ + "Compare against memory with the flags overwritten before any read.", + "The compare can go but the load has to stay: it may fault, and HotSpot's C1", + "null check is exactly this shape (cmp rax, [reg] with dead flags)." + ], + "x86Insts": [ + "cmp eax, [edx]", + "add dword [esi + 0x128], 1" + ], + "ExpectedArm64ASM": [ + "ldr w20, [x5]", + "ldr w27, [x10, #296]", + "adds w26, w27, #0x1 (1)", + "str w26, [x10, #296]", + "cfinv" + ] } } } diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst_AFP.json b/unittests/InstructionCountCI/FEXOpt/MultiInst_AFP.json index 8d1957d3b1..0c71334579 100644 --- a/unittests/InstructionCountCI/FEXOpt/MultiInst_AFP.json +++ b/unittests/InstructionCountCI/FEXOpt/MultiInst_AFP.json @@ -9,7 +9,7 @@ "SVE256", "RPRES" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Comment": [ "These are instruction combinations that could be more optimal if FEX optimized for them" diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO.json b/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO.json index 0ec4f93768..8ae8b2e007 100644 --- a/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO.json +++ b/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO.json @@ -14,7 +14,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Comment": [ "These are instruction combinations that could be more optimal if FEX optimized for them" @@ -77,6 +77,31 @@ "stlurh w4, [x7, #24]", "stlurb w6, [x7, #26]" ] + }, + "cmp with memory and dead flags keeps the load": { + "x86InstructionCount": 2, + "ExpectedInstructionCount": 10, + "Comment": [ + "Compare against memory with the flags overwritten before any read.", + "The compare can go but the load has to stay: it may fault, and HotSpot's C1", + "null check is exactly this shape (cmp rax, [reg] with dead flags)." + ], + "x86Insts": [ + "cmp rax, [rdx]", + "add qword [rsi + 0x128], 1" + ], + "ExpectedArm64ASM": [ + "ldapur x20, [x5]", + "nop", + "add x21, x10, #0x128 (296)", + "ldapur x27, [x21]", + "nop", + "adds x26, x27, #0x1 (1)", + "add x21, x10, #0x128 (296)", + "nop", + "stlur x26, [x21]", + "cfinv" + ] } } } diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json b/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json index e91168a816..30b00ed10e 100644 --- a/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json +++ b/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json @@ -14,7 +14,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Comment": [ "These are instruction combinations that could be more optimal if FEX optimized for them" diff --git a/unittests/InstructionCountCI/FEXOpt/Peephole.json b/unittests/InstructionCountCI/FEXOpt/Peephole.json new file mode 100644 index 0000000000..ecd3253ee1 --- /dev/null +++ b/unittests/InstructionCountCI/FEXOpt/Peephole.json @@ -0,0 +1,128 @@ +{ + "Features": { + "Bitness": 64, + "EnabledHostFeatures": [ + "CRYPTO" + ], + "DisabledHostFeatures": [ + "AFP", + "FLAGM", + "FLAGM2", + "SVE128", + "SVE256", + "I8MM", + "DOTPROD" + ], + "BinaryCacheVersion": 43 + }, + "Comment": [ + "This file tracks the translations for the 'peephole' optimizations in FEX.", + "Peephole optimizations are small targetted optimizations that recognize", + "specific patterns in x86 code and specialize the translation accordingly." + ], + "Instructions": { + "vpcmpeqd + vpgatherdd": { + "x86InstructionCount": 2, + "ExpectedInstructionCount": 32, + "Comment": [ + "Setting the mask to all-ones using vpcmpeqd, and then performing the gather operation.", + "This is an idiom emitted by Clang for an unmasked gather.", + "https://godbolt.org/z/4devEvfKf" + ], + "x86Insts": [ + "vpcmpeqd ymm2, ymm2, ymm2", + "vpgatherdd ymm0, [ymm1*4 + rax], ymm2" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x28, #224]", + "cmeq v18.4s, v18.4s, v18.4s", + "cmeq v2.4s, v2.4s, v2.4s", + "ldr q3, [x28, #192]", + "ldr q4, [x28, #208]", + "smov x0, v17.s[0]", + "add x1, x4, w0, sxtw #2", + "ld1 {v16.s}[0], [x1]", + "smov x0, v17.s[1]", + "add x1, x4, w0, sxtw #2", + "ld1 {v16.s}[1], [x1]", + "smov x0, v17.s[2]", + "add x1, x4, w0, sxtw #2", + "ld1 {v16.s}[2], [x1]", + "smov x0, v17.s[3]", + "add x1, x4, w0, sxtw #2", + "ld1 {v16.s}[3], [x1]", + "smov x0, v4.s[0]", + "add x1, x4, w0, sxtw #2", + "ld1 {v3.s}[0], [x1]", + "smov x0, v4.s[1]", + "add x1, x4, w0, sxtw #2", + "ld1 {v3.s}[1], [x1]", + "smov x0, v4.s[2]", + "add x1, x4, w0, sxtw #2", + "ld1 {v3.s}[2], [x1]", + "smov x0, v4.s[3]", + "add x1, x4, w0, sxtw #2", + "ld1 {v3.s}[3], [x1]", + "movi v18.2d, #0x0", + "stp xzr, xzr, [x28, #224]", + "str q3, [x28, #192]" + ] + }, + "sha256rnds2 + pshufd + sha256rnds2": { + "x86InstructionCount": 3, + "ExpectedInstructionCount": 13, + "Comment": [ + "This idiom is used by OpenSSL and other crypto libraries, and can be translated more efficiently since the ARM64 SHA instructions do four rounds of SHA, not just two." + ], + "x86Insts": [ + "sha256rnds2 xmm2, xmm1", + "pshufd xmm0, xmm0, 0xe", + "sha256rnds2 xmm1, xmm2" + ], + "ExpectedArm64ASM": [ + "zip2 v2.2d, v17.2d, v18.2d", + "rev64 v2.4s, v2.4s", + "zip1 v3.2d, v17.2d, v18.2d", + "rev64 v3.4s, v3.4s", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", + "rev64 v18.4s, v2.4s", + "dup v2.4s, v16.s[0]", + "ext v16.16b, v16.16b, v2.16b, #8", + "zip1 v2.2d, v3.2d, v4.2d", + "rev64 v17.4s, v2.4s" + ] + }, + "sha256rnds2 + psrldq + sha256rnds2": { + "x86InstructionCount": 4, + "ExpectedInstructionCount": 14, + "Comment": [ + "The same as the pshufd form, with psrldq 8 and an unrelated instruction between." + ], + "x86Insts": [ + "sha256rnds2 xmm2, xmm1", + "psrldq xmm0, 8", + "paddd xmm5, xmm7", + "sha256rnds2 xmm1, xmm2" + ], + "ExpectedArm64ASM": [ + "zip2 v2.2d, v17.2d, v18.2d", + "rev64 v2.4s, v2.4s", + "zip1 v3.2d, v17.2d, v18.2d", + "rev64 v3.4s, v3.4s", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", + "rev64 v18.4s, v2.4s", + "movi v2.2d, #0x0", + "ext v16.16b, v16.16b, v2.16b, #8", + "add v21.4s, v21.4s, v23.4s", + "zip1 v2.2d, v3.2d, v4.2d", + "rev64 v17.4s, v2.4s" + ] + } + } +} diff --git a/unittests/InstructionCountCI/FEXOpt/Peephole_SVE128.json b/unittests/InstructionCountCI/FEXOpt/Peephole_SVE128.json new file mode 100644 index 0000000000..7308bd36d3 --- /dev/null +++ b/unittests/InstructionCountCI/FEXOpt/Peephole_SVE128.json @@ -0,0 +1,49 @@ +{ + "Features": { + "Bitness": 64, + "EnabledHostFeatures": [ + "SVE128" + ], + "DisabledHostFeatures": [ + "AFP", + "FLAGM", + "FLAGM2", + "SVE256" + ], + "BinaryCacheVersion": 43 + }, + "Comment": [ + "This file tracks the translations for the 'peephole' optimizations in FEX.", + "Peephole optimizations are small targetted optimizations that recognize", + "specific patterns in x86 code and specialize the translation accordingly." + ], + "Instructions": { + "vpcmpeqd + vpgatherdd": { + "x86InstructionCount": 2, + "ExpectedInstructionCount": 12, + "Comment": [ + "Setting the mask to all-ones using vpcmpeqd, and then performing the gather operation.", + "This is an idiom emitted by Clang for an unmasked gather.", + "https://godbolt.org/z/4devEvfKf" + ], + "x86Insts": [ + "vpcmpeqd ymm2, ymm2, ymm2", + "vpgatherdd ymm0, [ymm1*4 + rax], ymm2" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x28, #224]", + "cmeq v18.4s, v18.4s, v18.4s", + "cmeq v2.4s, v2.4s, v2.4s", + "ldr q3, [x28, #192]", + "ldr q4, [x28, #208]", + "mrs x20, nzcv", + "ld1w {z16.s}, p6/z, [x4, z17.s, sxtw #2]", + "ld1w {z3.s}, p6/z, [x4, z4.s, sxtw #2]", + "movi v18.2d, #0x0", + "msr nzcv, x20", + "stp xzr, xzr, [x28, #224]", + "str q3, [x28, #192]" + ] + } + } +} diff --git a/unittests/InstructionCountCI/FEXOpt/libnss.json b/unittests/InstructionCountCI/FEXOpt/libnss.json index 181ccae9fb..6127cc6c43 100644 --- a/unittests/InstructionCountCI/FEXOpt/libnss.json +++ b/unittests/InstructionCountCI/FEXOpt/libnss.json @@ -12,13 +12,13 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Comment": [], "Instructions": { "libnss3 sha": { "x86InstructionCount": 168, - "ExpectedInstructionCount": 521, + "ExpectedInstructionCount": 405, "Comment": [ "This block of code comes from libnss3 which causes panic spilling in FEX's RA.", "This code is hit in steamwebhelper calling in to this function.", @@ -230,11 +230,10 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v19.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v16.s[0]", "ext v16.16b, v16.16b, v2.16b, #8", @@ -242,11 +241,10 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v20.2d, v17.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "ext v16.16b, v22.16b, v21.16b, #4", "add v24.4s, v24.4s, v16.4s", @@ -262,23 +260,14 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v16.s[0]", "ext v16.16b, v16.16b, v2.16b, #8", - "zip2 v2.2d, v20.2d, v17.2d", - "rev64 v2.4s, v2.4s", - "zip1 v3.2d, v20.2d, v17.2d", - "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "zip1 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "ext v16.16b, v21.16b, v24.16b, #4", "add v23.4s, v23.4s, v16.4s", @@ -294,23 +283,14 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v16.s[0]", "ext v16.16b, v16.16b, v2.16b, #8", - "zip2 v2.2d, v20.2d, v17.2d", - "rev64 v2.4s, v2.4s", - "zip1 v3.2d, v20.2d, v17.2d", - "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "zip1 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "ext v16.16b, v24.16b, v23.16b, #4", "add v22.4s, v22.4s, v16.4s", @@ -326,23 +306,14 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v16.s[0]", "ext v16.16b, v16.16b, v2.16b, #8", - "zip2 v2.2d, v20.2d, v17.2d", - "rev64 v2.4s, v2.4s", - "zip1 v3.2d, v20.2d, v17.2d", - "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "zip1 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "ext v16.16b, v23.16b, v22.16b, #4", "add v21.4s, v21.4s, v16.4s", @@ -358,23 +329,14 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v16.s[0]", "ext v16.16b, v16.16b, v2.16b, #8", - "zip2 v2.2d, v20.2d, v17.2d", - "rev64 v2.4s, v2.4s", - "zip1 v3.2d, v20.2d, v17.2d", - "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "zip1 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "ext v16.16b, v22.16b, v21.16b, #4", "add v24.4s, v24.4s, v16.4s", @@ -390,23 +352,14 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v16.s[0]", "ext v16.16b, v16.16b, v2.16b, #8", - "zip2 v2.2d, v20.2d, v17.2d", - "rev64 v2.4s, v2.4s", - "zip1 v3.2d, v20.2d, v17.2d", - "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "zip1 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "ext v16.16b, v21.16b, v24.16b, #4", "add v23.4s, v23.4s, v16.4s", @@ -422,23 +375,14 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v16.s[0]", "ext v16.16b, v16.16b, v2.16b, #8", - "zip2 v2.2d, v20.2d, v17.2d", - "rev64 v2.4s, v2.4s", - "zip1 v3.2d, v20.2d, v17.2d", - "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "zip1 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "ext v16.16b, v24.16b, v23.16b, #4", "add v22.4s, v22.4s, v16.4s", @@ -454,23 +398,14 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v16.s[0]", "ext v16.16b, v16.16b, v2.16b, #8", - "zip2 v2.2d, v20.2d, v17.2d", - "rev64 v2.4s, v2.4s", - "zip1 v3.2d, v20.2d, v17.2d", - "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "zip1 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "ext v16.16b, v23.16b, v22.16b, #4", "add v21.4s, v21.4s, v16.4s", @@ -486,23 +421,14 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v16.s[0]", "ext v16.16b, v16.16b, v2.16b, #8", - "zip2 v2.2d, v20.2d, v17.2d", - "rev64 v2.4s, v2.4s", - "zip1 v3.2d, v20.2d, v17.2d", - "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "zip1 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "ext v16.16b, v22.16b, v21.16b, #4", "add v24.4s, v24.4s, v16.4s", @@ -518,23 +444,14 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v16.s[0]", "ext v16.16b, v16.16b, v2.16b, #8", - "zip2 v2.2d, v20.2d, v17.2d", - "rev64 v2.4s, v2.4s", - "zip1 v3.2d, v20.2d, v17.2d", - "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "zip1 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "ext v16.16b, v21.16b, v24.16b, #4", "add v23.4s, v23.4s, v16.4s", @@ -550,23 +467,14 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v16.s[0]", "ext v16.16b, v16.16b, v2.16b, #8", - "zip2 v2.2d, v20.2d, v17.2d", - "rev64 v2.4s, v2.4s", - "zip1 v3.2d, v20.2d, v17.2d", - "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "zip1 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "ext v16.16b, v24.16b, v23.16b, #4", "add v22.4s, v22.4s, v16.4s", @@ -582,23 +490,14 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v16.s[0]", "ext v16.16b, v16.16b, v2.16b, #8", - "zip2 v2.2d, v20.2d, v17.2d", - "rev64 v2.4s, v2.4s", - "zip1 v3.2d, v20.2d, v17.2d", - "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "zip1 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "ext v16.16b, v23.16b, v22.16b, #4", "ldr q2, [x29, x20, sxtx]", @@ -619,34 +518,24 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v16.s[0]", "ext v16.16b, v16.16b, v2.16b, #8", - "zip2 v2.2d, v20.2d, v17.2d", - "rev64 v2.4s, v2.4s", - "zip1 v3.2d, v20.2d, v17.2d", - "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "zip1 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "mov v16.16b, v23.16b", "zip2 v2.2d, v17.2d, v20.2d", "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v23.s[0]", "ext v16.16b, v23.16b, v2.16b, #8", @@ -654,22 +543,20 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v20.2d, v17.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "mov v16.16b, v22.16b", "zip2 v2.2d, v17.2d, v20.2d", "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v22.s[0]", "ext v16.16b, v22.16b, v2.16b, #8", @@ -677,22 +564,20 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v20.2d, v17.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "mov v16.16b, v21.16b", "zip2 v2.2d, v17.2d, v20.2d", "rev64 v2.4s, v2.4s", "zip1 v3.2d, v17.2d, v20.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v20.4s, v2.4s", "dup v2.4s, v21.s[0]", "ext v16.16b, v21.16b, v2.16b, #8", @@ -700,11 +585,10 @@ "rev64 v2.4s, v2.4s", "zip1 v3.2d, v20.2d, v17.2d", "rev64 v3.4s, v3.4s", - "dup v4.2d, v16.d[0]", - "mov v5.16b, v2.16b", - "sha256h q5, q3, v4.4s", - "sha256h2 q3, q2, v4.4s", - "zip2 v2.2d, v3.2d, v5.2d", + "mov v4.16b, v2.16b", + "sha256h q4, q3, v16.4s", + "sha256h2 q3, q2, v16.4s", + "zip2 v2.2d, v3.2d, v4.2d", "rev64 v17.4s, v2.4s", "add v20.4s, v20.4s, v18.4s", "add v17.4s, v17.4s, v19.4s", diff --git a/unittests/InstructionCountCI/FlagM/Atomics.json b/unittests/InstructionCountCI/FlagM/Atomics.json index d8ae3dbee6..53f23d16b1 100644 --- a/unittests/InstructionCountCI/FlagM/Atomics.json +++ b/unittests/InstructionCountCI/FlagM/Atomics.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "lock add byte [rax], cl": { diff --git a/unittests/InstructionCountCI/FlagM/FlagOpts.json b/unittests/InstructionCountCI/FlagM/FlagOpts.json index fc6e981c26..c5c69c5401 100644 --- a/unittests/InstructionCountCI/FlagM/FlagOpts.json +++ b/unittests/InstructionCountCI/FlagM/FlagOpts.json @@ -9,7 +9,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "Chained add": { diff --git a/unittests/InstructionCountCI/FlagM/H0F38.json b/unittests/InstructionCountCI/FlagM/H0F38.json index c500eb466b..6ab199726b 100644 --- a/unittests/InstructionCountCI/FlagM/H0F38.json +++ b/unittests/InstructionCountCI/FlagM/H0F38.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "ptest xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks.json b/unittests/InstructionCountCI/FlagM/HotBlocks.json index d35521c683..272c36d4a7 100644 --- a/unittests/InstructionCountCI/FlagM/HotBlocks.json +++ b/unittests/InstructionCountCI/FlagM/HotBlocks.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "The Witcher 3": { @@ -892,7 +892,7 @@ "Comes from vcruntime140.dll wcsstr" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json index 4f71c0db6f..8086af435c 100644 --- a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json +++ b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "Sonic Mania movie player": { diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json b/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json index e8df7c2b55..253891eb17 100644 --- a/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json +++ b/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json @@ -10,7 +10,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "FMOD scalar loop": { diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_TSO_32Bit.json b/unittests/InstructionCountCI/FlagM/HotBlocks_TSO_32Bit.json index d3742d21cf..7fe149d6a9 100644 --- a/unittests/InstructionCountCI/FlagM/HotBlocks_TSO_32Bit.json +++ b/unittests/InstructionCountCI/FlagM/HotBlocks_TSO_32Bit.json @@ -13,7 +13,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "The Sims 1 hot block": { diff --git a/unittests/InstructionCountCI/FlagM/Primary.json b/unittests/InstructionCountCI/FlagM/Primary.json index 9ebce0470a..c4fa55fc39 100644 --- a/unittests/InstructionCountCI/FlagM/Primary.json +++ b/unittests/InstructionCountCI/FlagM/Primary.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "add bl, cl": { diff --git a/unittests/InstructionCountCI/FlagM/PrimaryGroup.json b/unittests/InstructionCountCI/FlagM/PrimaryGroup.json index 2798899b27..c92f07b64c 100644 --- a/unittests/InstructionCountCI/FlagM/PrimaryGroup.json +++ b/unittests/InstructionCountCI/FlagM/PrimaryGroup.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "add al, 1": { diff --git a/unittests/InstructionCountCI/FlagM/Primary_32Bit.json b/unittests/InstructionCountCI/FlagM/Primary_32Bit.json index 171633568e..b8e80ad8bf 100644 --- a/unittests/InstructionCountCI/FlagM/Primary_32Bit.json +++ b/unittests/InstructionCountCI/FlagM/Primary_32Bit.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "push es": { diff --git a/unittests/InstructionCountCI/FlagM/Secondary.json b/unittests/InstructionCountCI/FlagM/Secondary.json index e52f176c4a..9e2184d1f8 100644 --- a/unittests/InstructionCountCI/FlagM/Secondary.json +++ b/unittests/InstructionCountCI/FlagM/Secondary.json @@ -11,7 +11,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "ucomiss xmm0, xmm1": { @@ -1610,7 +1610,7 @@ "mov w20, #0xffff", "strb w20, [x28, #1202]", "ldr d2, [x28, #1056]", - "ldr d3, [x28, #3456]", + "ldr d3, [x28, #3248]", "cmlt v2.16b, v2.16b, #0", "and v2.8b, v2.8b, v3.8b", "addp v2.16b, v2.16b, v2.16b", diff --git a/unittests/InstructionCountCI/FlagM/SecondaryGroup.json b/unittests/InstructionCountCI/FlagM/SecondaryGroup.json index e3f9be5656..3d1ddaaddd 100644 --- a/unittests/InstructionCountCI/FlagM/SecondaryGroup.json +++ b/unittests/InstructionCountCI/FlagM/SecondaryGroup.json @@ -11,7 +11,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "sgdt [rax]": { @@ -1276,7 +1276,7 @@ ] }, "fxsave [rax]": { - "ExpectedInstructionCount": 68, + "ExpectedInstructionCount": 70, "Comment": "GROUP15 0x0F 0xAE /0", "ExpectedArm64ASM": [ "ldrh w20, [x28, #1200]", @@ -1294,6 +1294,8 @@ "ldrb w21, [x28, #1040]", "orr x20, x20, x21", "strh w20, [x4, #2]", + "ldr x20, [x28, #1208]", + "str w20, [x4, #8]", "ldrb w20, [x28, #1202]", "strb w20, [x4, #4]", "ldrb w20, [x28, #1051]", @@ -1364,7 +1366,7 @@ ] }, "fxrstor [rax]": { - "ExpectedInstructionCount": 86, + "ExpectedInstructionCount": 88, "Comment": "GROUP15 0x0F 0xAE /1", "ExpectedArm64ASM": [ "ldrh w20, [x4]", @@ -1382,6 +1384,8 @@ "strb w24, [x28, #1050]", "strb w30, [x28, #1054]", "strb w20, [x28, #1040]", + "ldr w20, [x4, #8]", + "str x20, [x28, #1208]", "ldrb w20, [x4, #4]", "strb w20, [x28, #1202]", "mov x20, #0xffffffffffffffff", @@ -1526,12 +1530,12 @@ ] }, "xsave [rax]": { - "ExpectedInstructionCount": 98, + "ExpectedInstructionCount": 100, "Comment": "GROUP15 0x0F 0xAE /4", "ExpectedArm64ASM": [ "ubfx x20, x4, #0, #1", "cbnz x20, #+0x8", - "b #+0xe4", + "b #+0xec", "ldrh w20, [x28, #1200]", "strh w20, [x4]", "ldrb w20, [x28, #1051]", @@ -1547,6 +1551,8 @@ "ldrb w21, [x28, #1040]", "orr x20, x20, x21", "strh w20, [x4, #2]", + "ldr x20, [x28, #1208]", + "str w20, [x4, #8]", "ldrb w20, [x28, #1202]", "strb w20, [x4, #4]", "ldrb w20, [x28, #1051]", @@ -1630,12 +1636,12 @@ ] }, "xsaveopt [rax]": { - "ExpectedInstructionCount": 98, + "ExpectedInstructionCount": 100, "Comment": "GROUP15 0x0F 0xAE /6", "ExpectedArm64ASM": [ "ubfx x20, x4, #0, #1", "cbnz x20, #+0x8", - "b #+0xe4", + "b #+0xec", "ldrh w20, [x28, #1200]", "strh w20, [x4]", "ldrb w20, [x28, #1051]", @@ -1651,6 +1657,8 @@ "ldrb w21, [x28, #1040]", "orr x20, x20, x21", "strh w20, [x4, #2]", + "ldr x20, [x28, #1208]", + "str w20, [x4, #8]", "ldrb w20, [x28, #1202]", "strb w20, [x4, #4]", "ldrb w20, [x28, #1051]", @@ -1741,14 +1749,14 @@ ] }, "xrstor [rax]": { - "ExpectedInstructionCount": 171, + "ExpectedInstructionCount": 174, "Comment": "GROUP15 0x0F 0xAE /5", "ExpectedArm64ASM": [ "sub sp, sp, #0x40 (64)", "ldr x20, [x4, #512]", "ubfx x20, x20, #0, #1", "cbnz x20, #+0x8", - "b #+0x114", + "b #+0x11c", "ldrh w20, [x4]", "strh w20, [x28, #1200]", "ldrh w20, [x4, #2]", @@ -1764,6 +1772,8 @@ "strb w24, [x28, #1050]", "strb w30, [x28, #1054]", "strb w20, [x28, #1040]", + "ldr w20, [x4, #8]", + "str x20, [x28, #1208]", "ldrb w20, [x4, #4]", "strb w20, [x28, #1202]", "mov x20, #0xffffffffffffffff", @@ -1816,7 +1826,7 @@ "and v2.16b, v3.16b, v2.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1056]", - "b #+0x4c", + "b #+0x50", "mov w20, #0x37f", "strh w20, [x28, #1200]", "strb wzr, [x28, #1051]", @@ -1826,6 +1836,7 @@ "strb wzr, [x28, #1050]", "strb wzr, [x28, #1054]", "strb wzr, [x28, #1040]", + "str xzr, [x28, #1208]", "movi v2.2d, #0x0", "str q2, [x28, #1056]", "str q2, [x28, #1072]", diff --git a/unittests/InstructionCountCI/FlagM/SecondaryModRM.json b/unittests/InstructionCountCI/FlagM/SecondaryModRM.json index ddec4d4323..938fb425c8 100644 --- a/unittests/InstructionCountCI/FlagM/SecondaryModRM.json +++ b/unittests/InstructionCountCI/FlagM/SecondaryModRM.json @@ -11,7 +11,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "xgetbv": { @@ -43,8 +43,8 @@ "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x3], #64", "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x3], #64", "mov w1, w7", - "ldr x0, [x28, #1552]", - "ldr x2, [x28, #1568]", + "ldr x0, [x28, #1360]", + "ldr x2, [x28, #1376]", "blr x2", "ldr x25, [x28, #176]", "ldr w4, [x28, #1032]", diff --git a/unittests/InstructionCountCI/FlagM/Secondary_OpSize.json b/unittests/InstructionCountCI/FlagM/Secondary_OpSize.json index 9c34a60f21..19864b5a49 100644 --- a/unittests/InstructionCountCI/FlagM/Secondary_OpSize.json +++ b/unittests/InstructionCountCI/FlagM/Secondary_OpSize.json @@ -11,7 +11,7 @@ "AFP", "FCMA" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "ucomisd xmm0, xmm1": { @@ -38,7 +38,7 @@ "ExpectedInstructionCount": 7, "Comment": "0x66 0x0f 0xd7", "ExpectedArm64ASM": [ - "ldr q2, [x28, #3456]", + "ldr q2, [x28, #3248]", "cmlt v3.16b, v16.16b, #0", "and v2.16b, v3.16b, v2.16b", "addp v2.16b, v2.16b, v2.16b", diff --git a/unittests/InstructionCountCI/FlagM/Secondary_REP.json b/unittests/InstructionCountCI/FlagM/Secondary_REP.json index 8196a5bc92..cd640aa11c 100644 --- a/unittests/InstructionCountCI/FlagM/Secondary_REP.json +++ b/unittests/InstructionCountCI/FlagM/Secondary_REP.json @@ -12,7 +12,7 @@ "AFP", "CSSC" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "popcnt ax, bx": { diff --git a/unittests/InstructionCountCI/FlagM/Secondary_REP_CSSC.json b/unittests/InstructionCountCI/FlagM/Secondary_REP_CSSC.json index 1bfd915c79..8251ec6a26 100644 --- a/unittests/InstructionCountCI/FlagM/Secondary_REP_CSSC.json +++ b/unittests/InstructionCountCI/FlagM/Secondary_REP_CSSC.json @@ -12,7 +12,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "popcnt ax, bx": { diff --git a/unittests/InstructionCountCI/FlagM/VEX_map1.json b/unittests/InstructionCountCI/FlagM/VEX_map1.json index d00f861896..5aa1a2c0f7 100644 --- a/unittests/InstructionCountCI/FlagM/VEX_map1.json +++ b/unittests/InstructionCountCI/FlagM/VEX_map1.json @@ -12,7 +12,7 @@ "RPRES", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vucomiss xmm0, xmm1": { @@ -69,7 +69,7 @@ "Map 1 0b01 0xd7 256-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3456]", + "ldr q2, [x28, #3248]", "cmlt v3.16b, v16.16b, #0", "and v2.16b, v3.16b, v2.16b", "addp v2.16b, v2.16b, v2.16b", @@ -84,7 +84,7 @@ "Map 1 0b01 0xd7 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2552]", + "ldr x0, [x28, #2352]", "ld1b {z2.b}, p7/z, [x0]", "mrs x0, nzcv", "mov z0.d, #0", diff --git a/unittests/InstructionCountCI/FlagM/VEX_map2.json b/unittests/InstructionCountCI/FlagM/VEX_map2.json index 355395727f..96b8086cb6 100644 --- a/unittests/InstructionCountCI/FlagM/VEX_map2.json +++ b/unittests/InstructionCountCI/FlagM/VEX_map2.json @@ -10,7 +10,7 @@ "AFP", "SVEBITPERM" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vtestps xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/FlagM/VEX_map_group.json b/unittests/InstructionCountCI/FlagM/VEX_map_group.json index ceb7c12a5a..9ed3993fb5 100644 --- a/unittests/InstructionCountCI/FlagM/VEX_map_group.json +++ b/unittests/InstructionCountCI/FlagM/VEX_map_group.json @@ -9,7 +9,7 @@ "DisabledHostFeatures": [ "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "blsr eax, ebx": { diff --git a/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json b/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json index 985f7ec359..3afa46c616 100644 --- a/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json +++ b/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "Block1": { @@ -835,8 +835,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -846,23 +846,23 @@ "ldr s3, [x4, #124]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -870,47 +870,47 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #124]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -918,31 +918,31 @@ "ldr s2, [x4, #120]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -950,47 +950,47 @@ "ldr s2, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #120]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -998,31 +998,31 @@ "ldr s2, [x4, #116]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1030,47 +1030,47 @@ "ldr s2, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #116]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1078,31 +1078,31 @@ "ldr s2, [x4, #112]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1110,47 +1110,47 @@ "ldr s2, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #112]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1158,31 +1158,31 @@ "ldr s2, [x4, #108]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1190,47 +1190,47 @@ "ldr s2, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #108]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1238,31 +1238,31 @@ "ldr s2, [x4, #104]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1270,47 +1270,47 @@ "ldr s2, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #104]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1318,31 +1318,31 @@ "ldr s2, [x4, #100]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1350,47 +1350,47 @@ "ldr s2, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #100]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1398,31 +1398,31 @@ "ldr s2, [x4, #96]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1430,47 +1430,47 @@ "ldr s2, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #96]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1478,31 +1478,31 @@ "ldr s2, [x4, #92]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1510,47 +1510,47 @@ "ldr s2, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #92]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #32]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1558,31 +1558,31 @@ "ldr s2, [x4, #88]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1590,47 +1590,47 @@ "ldr s2, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #88]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1638,31 +1638,31 @@ "ldr s2, [x4, #84]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1670,47 +1670,47 @@ "ldr s2, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #84]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #40]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1718,31 +1718,31 @@ "ldr s2, [x4, #80]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1750,47 +1750,47 @@ "ldr s2, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #80]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1798,31 +1798,31 @@ "ldr s2, [x4, #76]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1830,47 +1830,47 @@ "ldr s2, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #76]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #48]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1878,31 +1878,31 @@ "ldr s2, [x4, #72]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1910,47 +1910,47 @@ "ldr s2, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #72]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1958,31 +1958,31 @@ "ldr s2, [x4, #68]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1990,47 +1990,47 @@ "ldr s2, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #68]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #56]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2038,31 +2038,31 @@ "ldr s2, [x4, #64]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2070,24 +2070,24 @@ "ldr s2, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #64]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2097,23 +2097,23 @@ "ldr s3, [x7, #60]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2121,31 +2121,31 @@ "ldur s2, [x9, #-68]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-128]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2153,47 +2153,47 @@ "ldur s2, [x9, #-128]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-68]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2201,31 +2201,31 @@ "ldur s2, [x9, #-72]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-124]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2233,47 +2233,47 @@ "ldur s2, [x9, #-124]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-72]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2281,31 +2281,31 @@ "ldur s2, [x9, #-76]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-120]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2313,47 +2313,47 @@ "ldur s2, [x9, #-120]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-76]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2361,31 +2361,31 @@ "ldur s2, [x9, #-80]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-116]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2393,47 +2393,47 @@ "ldur s2, [x9, #-116]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-80]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2441,31 +2441,31 @@ "ldur s2, [x9, #-84]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-112]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2473,47 +2473,47 @@ "ldur s2, [x9, #-112]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-84]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2521,31 +2521,31 @@ "ldur s2, [x9, #-88]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-108]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2553,47 +2553,47 @@ "ldur s2, [x9, #-108]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-88]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2601,31 +2601,31 @@ "ldur s2, [x9, #-92]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-104]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2633,47 +2633,47 @@ "ldur s2, [x9, #-104]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-92]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2681,31 +2681,31 @@ "ldur s2, [x9, #-96]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-100]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2713,47 +2713,47 @@ "ldur s2, [x9, #-100]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-96]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2761,31 +2761,31 @@ "ldur s2, [x9, #-64]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2793,47 +2793,47 @@ "ldur s2, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-64]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2841,31 +2841,31 @@ "ldur s2, [x9, #-60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2873,47 +2873,47 @@ "ldur s2, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-60]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2921,31 +2921,31 @@ "ldur s2, [x9, #-56]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2953,47 +2953,47 @@ "ldur s2, [x9, #-12]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-56]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3001,31 +3001,31 @@ "ldur s2, [x9, #-52]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3033,47 +3033,47 @@ "ldur s2, [x9, #-16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3081,31 +3081,31 @@ "ldur s2, [x9, #-48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3113,47 +3113,47 @@ "ldur s2, [x9, #-20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-48]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3161,31 +3161,31 @@ "ldur s2, [x9, #-44]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3193,47 +3193,47 @@ "ldur s2, [x9, #-24]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3241,31 +3241,31 @@ "ldur s2, [x9, #-40]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3273,47 +3273,47 @@ "ldur s2, [x9, #-28]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-40]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3321,31 +3321,31 @@ "ldur s2, [x9, #-36]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-32]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3353,40 +3353,40 @@ "ldur s2, [x9, #-32]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3395,8 +3395,8 @@ "ldr w4, [x20]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3404,31 +3404,31 @@ "ldur s2, [x9, #-228]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-256]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3436,47 +3436,47 @@ "ldur s2, [x9, #-256]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-228]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3484,31 +3484,31 @@ "ldur s2, [x9, #-232]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-252]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3516,47 +3516,47 @@ "ldur s2, [x9, #-252]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-232]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3564,31 +3564,31 @@ "ldur s2, [x9, #-236]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-248]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3596,47 +3596,47 @@ "ldur s2, [x9, #-248]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-236]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3644,31 +3644,31 @@ "ldur s2, [x9, #-240]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-244]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3676,47 +3676,47 @@ "ldur s2, [x9, #-244]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-240]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3724,31 +3724,31 @@ "ldur s2, [x9, #-224]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-196]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3756,47 +3756,47 @@ "ldur s2, [x9, #-196]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-224]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3804,31 +3804,31 @@ "ldur s2, [x9, #-220]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-200]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3836,47 +3836,47 @@ "ldur s2, [x9, #-200]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-220]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3884,31 +3884,31 @@ "ldur s2, [x9, #-216]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-204]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3916,47 +3916,47 @@ "ldur s2, [x9, #-204]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-216]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3964,31 +3964,31 @@ "ldur s2, [x9, #-212]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-208]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3996,47 +3996,47 @@ "ldur s2, [x9, #-208]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-212]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4044,31 +4044,31 @@ "ldur s2, [x9, #-164]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-192]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4076,47 +4076,47 @@ "ldur s2, [x9, #-192]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-164]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4124,31 +4124,31 @@ "ldur s2, [x9, #-168]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-188]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4156,47 +4156,47 @@ "ldur s2, [x9, #-188]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-168]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4204,31 +4204,31 @@ "ldur s2, [x9, #-172]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-184]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4236,47 +4236,47 @@ "ldur s2, [x9, #-184]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-172]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4284,31 +4284,31 @@ "ldur s2, [x9, #-176]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-180]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4316,47 +4316,47 @@ "ldur s2, [x9, #-180]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-176]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4364,31 +4364,31 @@ "ldur s2, [x9, #-160]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-132]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4396,47 +4396,47 @@ "ldur s2, [x9, #-132]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-160]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4444,31 +4444,31 @@ "ldur s2, [x9, #-156]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-136]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4476,47 +4476,47 @@ "ldur s2, [x9, #-136]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-156]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4524,31 +4524,31 @@ "ldur s2, [x9, #-152]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-140]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4556,47 +4556,47 @@ "ldur s2, [x9, #-140]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-152]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4604,31 +4604,31 @@ "ldur s2, [x9, #-148]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-144]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4636,40 +4636,40 @@ "ldur s2, [x9, #-144]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-148]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4678,8 +4678,8 @@ "ldr w4, [x20]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4692,31 +4692,31 @@ "ldur s2, [x9, #-116]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-128]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4724,48 +4724,48 @@ "ldur s2, [x9, #-128]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-116]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x9, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4773,31 +4773,31 @@ "ldur s2, [x9, #-120]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-124]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4805,48 +4805,48 @@ "ldur s2, [x9, #-124]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-120]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s4, [x9, x20, sxtx]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4854,31 +4854,31 @@ "ldur s2, [x9, #-100]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-112]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4886,39 +4886,39 @@ "ldur s2, [x9, #-100]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-112]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4926,31 +4926,31 @@ "ldur s2, [x9, #-104]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-108]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4958,39 +4958,39 @@ "ldur s2, [x9, #-104]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-108]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4998,31 +4998,31 @@ "ldur s2, [x9, #-84]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-96]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5030,39 +5030,39 @@ "ldur s2, [x9, #-96]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-84]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5070,31 +5070,31 @@ "ldur s2, [x9, #-88]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-92]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5102,39 +5102,39 @@ "ldur s2, [x9, #-92]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-88]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5142,31 +5142,31 @@ "ldur s2, [x9, #-68]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-80]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5174,39 +5174,39 @@ "ldur s2, [x9, #-68]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-80]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5214,8 +5214,8 @@ "ldur s2, [x9, #-72]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5225,23 +5225,23 @@ "ldur s5, [x9, #-76]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5249,39 +5249,39 @@ "ldur s2, [x9, #-72]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-76]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5289,31 +5289,31 @@ "ldur s2, [x9, #-64]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-52]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5321,39 +5321,39 @@ "ldur s2, [x9, #-64]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-52]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5361,31 +5361,31 @@ "ldur s2, [x9, #-60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-56]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5393,39 +5393,39 @@ "ldur s2, [x9, #-60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-56]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5433,31 +5433,31 @@ "ldur s2, [x9, #-48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-36]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5465,39 +5465,39 @@ "ldur s2, [x9, #-36]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-48]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5505,31 +5505,31 @@ "ldur s2, [x9, #-44]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-40]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5537,39 +5537,39 @@ "ldur s2, [x9, #-40]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-44]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5577,31 +5577,31 @@ "ldur s2, [x9, #-32]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-20]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5609,39 +5609,39 @@ "ldur s2, [x9, #-32]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-20]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5649,31 +5649,31 @@ "ldur s2, [x9, #-28]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-24]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5681,39 +5681,39 @@ "ldur s2, [x9, #-28]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-24]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5721,31 +5721,31 @@ "ldur s2, [x9, #-16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5753,40 +5753,40 @@ "ldur s2, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s5, [x9, #-16]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5794,31 +5794,31 @@ "ldur s2, [x9, #-12]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5826,39 +5826,39 @@ "ldur s2, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5868,31 +5868,31 @@ "ldur s2, [x9, #-252]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-256]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5900,48 +5900,48 @@ "ldur s2, [x9, #-256]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-252]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x9, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5949,31 +5949,31 @@ "ldur s2, [x9, #-244]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-248]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5981,39 +5981,39 @@ "ldur s2, [x9, #-244]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-248]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6021,31 +6021,31 @@ "ldur s2, [x9, #-116]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-120]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6053,31 +6053,31 @@ "ldur s2, [x9, #-236]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-240]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6085,39 +6085,39 @@ "ldur s2, [x9, #-240]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-236]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6125,31 +6125,31 @@ "ldur s2, [x9, #-228]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-232]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6157,39 +6157,39 @@ "ldur s2, [x9, #-228]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-232]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6197,31 +6197,31 @@ "ldur s2, [x9, #-100]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-104]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6229,31 +6229,31 @@ "ldur s2, [x9, #-104]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-112]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6261,31 +6261,31 @@ "ldur s2, [x9, #-104]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-108]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6293,31 +6293,31 @@ "ldur s2, [x9, #-100]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-108]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6325,31 +6325,31 @@ "ldur s2, [x9, #-224]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-220]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6357,39 +6357,39 @@ "ldur s2, [x9, #-224]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-220]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6397,31 +6397,31 @@ "ldur s2, [x9, #-216]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-212]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6429,39 +6429,39 @@ "ldur s2, [x9, #-212]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-216]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6469,31 +6469,31 @@ "ldur s2, [x9, #-84]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-88]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6501,31 +6501,31 @@ "ldur s2, [x9, #-208]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-204]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6533,39 +6533,39 @@ "ldur s2, [x9, #-208]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-204]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6573,31 +6573,31 @@ "ldur s2, [x9, #-200]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-196]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6605,39 +6605,39 @@ "ldur s2, [x9, #-196]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s4, [x9, #-200]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6645,31 +6645,31 @@ "ldur s2, [x9, #-68]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldur s5, [x9, #-72]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6677,31 +6677,31 @@ "ldur s5, [x9, #-72]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x9, #-80]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6709,31 +6709,31 @@ "ldur s5, [x9, #-72]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x9, #-76]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6741,23 +6741,23 @@ "ldur s5, [x9, #-76]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6765,31 +6765,31 @@ "ldur s5, [x9, #-188]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x9, #-192]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6797,39 +6797,39 @@ "ldur s5, [x9, #-192]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x9, #-188]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6837,31 +6837,31 @@ "ldur s5, [x9, #-180]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x9, #-184]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6869,39 +6869,39 @@ "ldur s5, [x9, #-180]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x9, #-184]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6909,31 +6909,31 @@ "ldur s5, [x9, #-56]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x9, #-52]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6941,31 +6941,31 @@ "ldur s5, [x9, #-172]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x9, #-176]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6973,39 +6973,39 @@ "ldur s5, [x9, #-176]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x9, #-172]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7013,31 +7013,31 @@ "ldur s5, [x9, #-164]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x9, #-168]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7045,39 +7045,39 @@ "ldur s5, [x9, #-164]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x9, #-168]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7085,32 +7085,32 @@ "ldur s5, [x9, #-40]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x9, #-36]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7118,31 +7118,31 @@ "ldur s5, [x9, #-48]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s7, [x9, #-40]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7150,31 +7150,31 @@ "ldur s5, [x9, #-44]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s7, [x9, #-40]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7182,23 +7182,23 @@ "ldur s5, [x9, #-44]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7206,31 +7206,31 @@ "ldur s5, [x9, #-160]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s7, [x9, #-156]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7238,39 +7238,39 @@ "ldur s5, [x9, #-160]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s7, [x9, #-156]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7278,31 +7278,31 @@ "ldur s5, [x9, #-152]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s7, [x9, #-148]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7310,39 +7310,39 @@ "ldur s5, [x9, #-148]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s7, [x9, #-152]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7350,31 +7350,31 @@ "ldur s5, [x9, #-24]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s7, [x9, #-20]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7382,31 +7382,31 @@ "ldur s5, [x9, #-144]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s7, [x9, #-140]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7415,8 +7415,8 @@ "ldur s5, [x9, #-144]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -7424,31 +7424,31 @@ "ldur s7, [x9, #-140]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7456,31 +7456,31 @@ "ldur s5, [x9, #-136]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s7, [x9, #-132]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7488,40 +7488,40 @@ "ldur s5, [x9, #-132]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s7, [x9, #-136]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7529,32 +7529,32 @@ "ldur s3, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldur s5, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7562,31 +7562,31 @@ "ldur s3, [x9, #-16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldur s8, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7594,31 +7594,31 @@ "ldur s3, [x9, #-12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldur s8, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7626,23 +7626,23 @@ "ldur s3, [x9, #-12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7668,31 +7668,31 @@ "ldur s3, [x9, #-80]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldur s8, [x9, #-96]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7702,31 +7702,31 @@ "ldur s3, [x9, #-80]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldur s8, [x9, #-88]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7736,31 +7736,31 @@ "ldur s3, [x9, #-72]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldur s8, [x9, #-88]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7770,31 +7770,31 @@ "ldur s3, [x9, #-72]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldur s8, [x9, #-92]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7804,31 +7804,31 @@ "ldur s3, [x9, #-76]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldur s8, [x9, #-92]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7838,31 +7838,31 @@ "ldur s3, [x9, #-76]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldur s8, [x9, #-84]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7872,23 +7872,23 @@ "ldur s3, [x9, #-84]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7900,31 +7900,31 @@ "ldur s2, [x9, #-32]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -7932,31 +7932,31 @@ "ldur s2, [x9, #-64]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-32]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -7964,31 +7964,31 @@ "ldur s2, [x9, #-48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-32]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -7996,31 +7996,31 @@ "ldur s2, [x9, #-24]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8028,31 +8028,31 @@ "ldur s2, [x9, #-48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8060,31 +8060,31 @@ "ldur s2, [x9, #-56]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8092,31 +8092,31 @@ "ldur s2, [x9, #-24]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8124,31 +8124,31 @@ "ldur s2, [x9, #-56]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8156,31 +8156,31 @@ "ldur s2, [x9, #-40]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8188,31 +8188,31 @@ "ldur s2, [x9, #-28]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8220,31 +8220,31 @@ "ldur s2, [x9, #-40]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8252,31 +8252,31 @@ "ldur s2, [x9, #-60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8284,31 +8284,31 @@ "ldur s2, [x9, #-28]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8316,31 +8316,31 @@ "ldur s2, [x9, #-60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8348,31 +8348,31 @@ "ldur s2, [x9, #-44]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8380,31 +8380,31 @@ "ldur s2, [x9, #-20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8412,31 +8412,31 @@ "ldur s2, [x9, #-44]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8444,31 +8444,31 @@ "ldur s2, [x9, #-52]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8476,23 +8476,23 @@ "ldur s2, [x9, #-20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8500,31 +8500,31 @@ "ldur s2, [x9, #-52]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8532,23 +8532,23 @@ "ldur s2, [x9, #-20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8556,16 +8556,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", diff --git a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json index 6bd9ab5e7e..5256308817 100644 --- a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json +++ b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "Block1": { @@ -96,55 +96,55 @@ "ldr s2, [x7]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x7, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x5, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -152,31 +152,31 @@ "ldr s7, [x7, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x5, #8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -184,16 +184,16 @@ "ldr s9, [x4]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -201,8 +201,8 @@ "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -210,24 +210,24 @@ "ldr s2, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -235,16 +235,16 @@ "ldr s5, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -252,8 +252,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -261,8 +261,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -270,8 +270,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -279,8 +279,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -288,104 +288,104 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s8, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -393,16 +393,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -410,16 +410,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -427,16 +427,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -444,16 +444,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -461,8 +461,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -555,30 +555,30 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q3, [x28, #3744]", + "ldr q3, [x28, #3536]", "bic v2.16b, v2.16b, v3.16b", "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", - "ldr q4, [x28, #3744]", + "ldr q4, [x28, #3536]", "bic v3.16b, v3.16b, v4.16b", "mov w27, #0x0", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -599,29 +599,29 @@ "ldr s2, [x5, #4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q3, [x28, #3744]", + "ldr q3, [x28, #3536]", "bic v2.16b, v2.16b, v3.16b", "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", - "ldr q5, [x28, #3744]", + "ldr q5, [x28, #3536]", "bic v3.16b, v3.16b, v5.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -642,29 +642,29 @@ "ldr s2, [x5, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q3, [x28, #3744]", + "ldr q3, [x28, #3536]", "bic v2.16b, v2.16b, v3.16b", "ldr s3, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", - "ldr q6, [x28, #3744]", + "ldr q6, [x28, #3536]", "bic v3.16b, v3.16b, v6.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -685,8 +685,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -694,47 +694,47 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1904]", - "ldr x3, [x28, #1912]", + "ldr x0, [x28, #1704]", + "ldr x3, [x28, #1712]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -815,32 +815,32 @@ "ldr s2, [x7]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x5, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x7, #4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x5]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -849,48 +849,48 @@ "ldr s6, [x5, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -898,16 +898,16 @@ "ldr s8, [x8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -915,32 +915,32 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s5, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -948,8 +948,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -957,8 +957,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -966,16 +966,16 @@ "ldr s5, [x8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -984,32 +984,32 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1024,15 +1024,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -1118,8 +1118,8 @@ "ldr d2, [x20]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1132,23 +1132,23 @@ "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1156,15 +1156,15 @@ "ldr s2, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d2, d0", @@ -1240,24 +1240,24 @@ "ldr s2, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1267,8 +1267,8 @@ "str w5, [x8, #56]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -1276,16 +1276,16 @@ "ldr s3, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1294,23 +1294,23 @@ "ldr s4, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1318,24 +1318,24 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s4, [x9]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1343,31 +1343,31 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s4, [x9]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1375,55 +1375,55 @@ "ldr s2, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s4, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s4, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1431,48 +1431,48 @@ "ldr s2, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s4, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1484,8 +1484,8 @@ "str w9, [x8, #20]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1494,8 +1494,8 @@ "ldr s3, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -1503,8 +1503,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -1599,24 +1599,24 @@ "ldr s2, [x7]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x6, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1626,208 +1626,208 @@ "ldr s3, [x7, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x6]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x6]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x7, #8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x7]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x6, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x7, #4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x6, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x6, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x7, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -1837,8 +1837,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -1922,80 +1922,80 @@ "ldr s2, [x6, #4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x6]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x6, #8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x5]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x5, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -2003,80 +2003,80 @@ "ldr s6, [x5, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s6, [x5]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s6, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s5, [x5, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -2084,24 +2084,24 @@ "ldr s5, [x5, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2109,24 +2109,24 @@ "ldr s4, [x4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2141,15 +2141,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -2225,8 +2225,8 @@ "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -2234,8 +2234,8 @@ "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -2247,16 +2247,16 @@ "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", "str s8, [x8, #40]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d8, d0", @@ -2334,8 +2334,8 @@ "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -2343,8 +2343,8 @@ "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -2356,16 +2356,16 @@ "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", "str s8, [x8, #40]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d8, d0", diff --git a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json index 13e1ccbf5f..093ff427fd 100644 --- a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json +++ b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "Block1": { @@ -934,31 +934,31 @@ "ldr s2, [x7, #4228]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4104]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -966,31 +966,31 @@ "ldr s2, [x7, #4224]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4108]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -998,31 +998,31 @@ "ldr s2, [x7, #4220]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4112]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1030,31 +1030,31 @@ "ldr s2, [x7, #4216]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4116]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1062,31 +1062,31 @@ "ldr s2, [x7, #4212]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4120]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1094,31 +1094,31 @@ "ldr s2, [x7, #4208]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4124]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1126,31 +1126,31 @@ "ldr s2, [x7, #4204]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4128]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1158,31 +1158,31 @@ "ldr s2, [x7, #4200]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4132]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1190,31 +1190,31 @@ "ldr s2, [x7, #4196]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4136]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1222,31 +1222,31 @@ "ldr s2, [x7, #4192]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4140]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1254,31 +1254,31 @@ "ldr s2, [x7, #4188]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4144]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1286,31 +1286,31 @@ "ldr s2, [x7, #4184]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4148]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1318,31 +1318,31 @@ "ldr s2, [x7, #4180]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4152]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1350,31 +1350,31 @@ "ldr s2, [x7, #4176]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4156]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1382,31 +1382,31 @@ "ldr s2, [x7, #4172]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4160]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1414,31 +1414,31 @@ "ldr s2, [x7, #4168]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #4164]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1446,32 +1446,32 @@ "ldr s2, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -1479,32 +1479,32 @@ "ldr s4, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -1512,32 +1512,32 @@ "ldr s6, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -1545,31 +1545,31 @@ "ldr s8, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -1577,31 +1577,31 @@ "ldr s8, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -1609,31 +1609,31 @@ "ldr s8, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -1641,31 +1641,31 @@ "ldr s8, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -1673,31 +1673,31 @@ "ldr s8, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -1706,8 +1706,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1716,24 +1716,24 @@ "ldr s3, [x20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1741,8 +1741,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1751,23 +1751,23 @@ "ldr s3, [x20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1775,8 +1775,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1785,23 +1785,23 @@ "ldr s3, [x20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1809,24 +1809,24 @@ "ldr s2, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1835,23 +1835,23 @@ "ldr s3, [x20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1859,24 +1859,24 @@ "ldr s2, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1885,23 +1885,23 @@ "ldr s3, [x20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1909,24 +1909,24 @@ "ldr s2, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1935,23 +1935,23 @@ "ldr s3, [x20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -1959,24 +1959,24 @@ "ldr s2, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1985,23 +1985,23 @@ "ldr s3, [x20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2009,24 +2009,24 @@ "ldr s2, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2035,23 +2035,23 @@ "ldr s3, [x20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2059,32 +2059,32 @@ "ldr s2, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -2092,32 +2092,32 @@ "ldr s4, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -2125,32 +2125,32 @@ "ldr s6, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2158,31 +2158,31 @@ "ldr s8, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2191,8 +2191,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2201,24 +2201,24 @@ "ldr s3, [x20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2227,8 +2227,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2237,24 +2237,24 @@ "ldr s4, [x20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2262,8 +2262,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2272,24 +2272,24 @@ "ldr s5, [x20]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2297,24 +2297,24 @@ "ldr s2, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s6, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2323,24 +2323,24 @@ "ldr s6, [x20]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2348,32 +2348,32 @@ "ldr s2, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s7, [x8, #100]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2381,31 +2381,31 @@ "ldr s8, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2413,31 +2413,31 @@ "ldr s8, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2445,31 +2445,31 @@ "ldr s8, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #112]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2477,23 +2477,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2501,39 +2501,39 @@ "ldr s2, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s7, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2541,39 +2541,39 @@ "ldr s2, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s7, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2581,39 +2581,39 @@ "ldr s2, [x8, #112]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s7, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2621,32 +2621,32 @@ "ldr s2, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s6, [x8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -2654,31 +2654,31 @@ "ldr s7, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2687,8 +2687,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2697,24 +2697,24 @@ "ldr s6, [x20]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2722,16 +2722,16 @@ "ldr s2, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2740,24 +2740,24 @@ "ldr s7, [x20]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2765,31 +2765,31 @@ "ldr s2, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2797,31 +2797,31 @@ "ldr s8, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2829,31 +2829,31 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2861,39 +2861,39 @@ "ldr s2, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s8, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2901,31 +2901,31 @@ "ldr s2, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s8, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2933,31 +2933,31 @@ "ldr s8, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2965,31 +2965,31 @@ "ldr s8, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2997,39 +2997,39 @@ "ldr s2, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s8, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3037,31 +3037,31 @@ "ldr s2, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s8, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -3069,31 +3069,31 @@ "ldr s8, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -3101,31 +3101,31 @@ "ldr s8, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3133,39 +3133,39 @@ "ldr s2, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s8, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3173,31 +3173,31 @@ "ldr s2, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s8, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -3205,16 +3205,16 @@ "ldr s8, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3223,24 +3223,24 @@ "ldr s8, [x20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3248,31 +3248,31 @@ "ldr s2, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3280,39 +3280,39 @@ "ldr s2, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3320,31 +3320,31 @@ "ldr s2, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3352,39 +3352,39 @@ "ldr s2, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3392,31 +3392,31 @@ "ldr s2, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3424,39 +3424,39 @@ "ldr s2, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3464,31 +3464,31 @@ "ldr s2, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #100]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3496,39 +3496,39 @@ "ldr s2, [x8, #100]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3536,31 +3536,31 @@ "ldr s2, [x8, #112]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3568,39 +3568,39 @@ "ldr s2, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #112]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3608,31 +3608,31 @@ "ldr s2, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3640,39 +3640,39 @@ "ldr s2, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3680,31 +3680,31 @@ "ldr s2, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3712,39 +3712,39 @@ "ldr s2, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3752,8 +3752,8 @@ "ldr s2, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", @@ -3761,23 +3761,23 @@ "ldr s2, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3785,17 +3785,17 @@ "ldr s2, [x8, #160]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q9, [x28, #3744]", + "ldr q9, [x28, #3536]", "eor v2.16b, v2.16b, v9.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3803,31 +3803,31 @@ "ldr s2, [x8, #140]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3835,49 +3835,49 @@ "ldr s2, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q9, [x28, #3744]", + "ldr q9, [x28, #3536]", "eor v2.16b, v2.16b, v9.16b", "ldr s9, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3885,8 +3885,8 @@ "ldr s2, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", @@ -3894,23 +3894,23 @@ "ldr s2, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3918,31 +3918,31 @@ "ldr s2, [x8, #184]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3950,47 +3950,47 @@ "ldr s2, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -3998,17 +3998,17 @@ "ldr s2, [x8, #152]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q9, [x28, #3744]", + "ldr q9, [x28, #3536]", "eor v2.16b, v2.16b, v9.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4016,31 +4016,31 @@ "ldr s2, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4048,33 +4048,33 @@ "ldr s2, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q9, [x28, #3744]", + "ldr q9, [x28, #3536]", "eor v2.16b, v2.16b, v9.16b", "ldr s9, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d9, d0", @@ -4082,39 +4082,39 @@ "ldr s9, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4122,31 +4122,31 @@ "ldr s2, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4154,47 +4154,47 @@ "ldr s2, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d9, [x8, #272]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4202,31 +4202,31 @@ "ldr s2, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4234,17 +4234,17 @@ "ldr s2, [x8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q9, [x28, #3744]", + "ldr q9, [x28, #3536]", "eor v2.16b, v2.16b, v9.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4254,34 +4254,34 @@ "ldr s2, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str s2, [x8, #176]", - "ldr q2, [x28, #3744]", + "ldr q2, [x28, #3536]", "eor v2.16b, v9.16b, v2.16b", "ldr s9, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4289,24 +4289,24 @@ "ldr s2, [x7, #4104]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4228]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4315,23 +4315,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4339,24 +4339,24 @@ "ldr s2, [x7, #4108]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4224]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4365,23 +4365,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4389,24 +4389,24 @@ "ldr s2, [x7, #4112]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4220]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4415,23 +4415,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4439,24 +4439,24 @@ "ldr s2, [x7, #4116]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4216]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4465,23 +4465,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4489,24 +4489,24 @@ "ldr s2, [x7, #4120]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4212]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4515,23 +4515,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4539,24 +4539,24 @@ "ldr s2, [x7, #4124]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4208]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4565,23 +4565,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4589,24 +4589,24 @@ "ldr s2, [x7, #4128]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4204]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4615,23 +4615,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4639,24 +4639,24 @@ "ldr s2, [x7, #4132]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4200]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4665,23 +4665,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4689,24 +4689,24 @@ "ldr s2, [x7, #4136]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4196]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4715,23 +4715,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4739,24 +4739,24 @@ "ldr s2, [x7, #4140]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4192]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4765,23 +4765,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4789,24 +4789,24 @@ "ldr s2, [x7, #4144]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4188]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4815,23 +4815,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4839,24 +4839,24 @@ "ldr s2, [x7, #4148]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4184]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4865,23 +4865,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4889,24 +4889,24 @@ "ldr s2, [x7, #4152]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4180]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4915,23 +4915,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4939,24 +4939,24 @@ "ldr s2, [x7, #4156]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4176]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4965,23 +4965,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -4989,24 +4989,24 @@ "ldr s2, [x7, #4160]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4172]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5015,23 +5015,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5039,24 +5039,24 @@ "ldr s2, [x7, #4164]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x7, #4168]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5065,23 +5065,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5089,31 +5089,31 @@ "ldr s2, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5121,31 +5121,31 @@ "ldr s2, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5153,31 +5153,31 @@ "ldr s2, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5185,31 +5185,31 @@ "ldr s2, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5217,31 +5217,31 @@ "ldr s2, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5249,31 +5249,31 @@ "ldr s2, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5281,31 +5281,31 @@ "ldr s2, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5313,31 +5313,31 @@ "ldr s2, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5345,24 +5345,24 @@ "ldr s2, [x8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5371,23 +5371,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5395,24 +5395,24 @@ "ldr s2, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5421,23 +5421,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5445,24 +5445,24 @@ "ldr s2, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5471,23 +5471,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5495,24 +5495,24 @@ "ldr s2, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5521,23 +5521,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5545,24 +5545,24 @@ "ldr s2, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5571,23 +5571,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5595,24 +5595,24 @@ "ldr s2, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5621,23 +5621,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5645,24 +5645,24 @@ "ldr s2, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5671,23 +5671,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5695,24 +5695,24 @@ "ldr s2, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5721,23 +5721,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5745,31 +5745,31 @@ "ldr s2, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5777,31 +5777,31 @@ "ldr s2, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5809,31 +5809,31 @@ "ldr s2, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5841,31 +5841,31 @@ "ldr s2, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5873,39 +5873,39 @@ "ldr s2, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5913,39 +5913,39 @@ "ldr s2, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5953,39 +5953,39 @@ "ldr s2, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5993,24 +5993,24 @@ "ldr s2, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6019,23 +6019,23 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6043,31 +6043,31 @@ "ldr s2, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #100]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6075,31 +6075,31 @@ "ldr s2, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6107,31 +6107,31 @@ "ldr s2, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6139,31 +6139,31 @@ "ldr s2, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #112]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6171,40 +6171,40 @@ "ldr s2, [x8, #100]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s9, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6212,40 +6212,40 @@ "ldr s2, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6253,40 +6253,40 @@ "ldr s2, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6294,47 +6294,47 @@ "ldr s2, [x8, #112]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6342,32 +6342,32 @@ "ldr s2, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -6375,31 +6375,31 @@ "ldr s4, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6408,24 +6408,24 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6433,31 +6433,31 @@ "ldr s2, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6465,32 +6465,32 @@ "ldr s2, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -6498,31 +6498,31 @@ "ldr s4, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6531,24 +6531,24 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6556,31 +6556,31 @@ "ldr s2, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6588,32 +6588,32 @@ "ldr s2, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -6621,31 +6621,31 @@ "ldr s4, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6654,24 +6654,24 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6679,31 +6679,31 @@ "ldr s2, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6711,32 +6711,32 @@ "ldr s2, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -6744,31 +6744,31 @@ "ldr s4, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6777,8 +6777,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6786,16 +6786,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6803,31 +6803,31 @@ "ldr s2, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6835,32 +6835,32 @@ "ldr s2, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -6868,23 +6868,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6892,32 +6892,32 @@ "ldr s2, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -6925,23 +6925,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -6949,32 +6949,32 @@ "ldr s2, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -6982,23 +6982,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -7006,32 +7006,32 @@ "ldr s2, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -7039,23 +7039,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -7063,32 +7063,32 @@ "ldr s2, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #100]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -7096,23 +7096,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -7120,32 +7120,32 @@ "ldr s2, [x8, #112]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -7153,23 +7153,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -7177,32 +7177,32 @@ "ldr s2, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -7210,23 +7210,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -7234,32 +7234,32 @@ "ldr s2, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -7267,23 +7267,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -7291,32 +7291,32 @@ "ldr s2, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7324,32 +7324,32 @@ "ldr s5, [x8, #196]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7357,48 +7357,48 @@ "ldr s8, [x8, #188]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7406,31 +7406,31 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s10, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s10", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7438,23 +7438,23 @@ "ldr s8, [x8, #180]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7462,31 +7462,31 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s10, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s10", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7494,31 +7494,31 @@ "ldr s8, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s10, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s10", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7526,17 +7526,17 @@ "ldr s8, [x8, #148]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", - "ldr q10, [x28, #3744]", + "ldr q10, [x28, #3536]", "eor v8.16b, v8.16b, v10.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7544,32 +7544,32 @@ "ldr s8, [x8, #272]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s10, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s10", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7577,39 +7577,39 @@ "ldr s8, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s11, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s11", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v11.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v11.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7617,17 +7617,17 @@ "ldr s8, [x8, #156]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", - "ldr q11, [x28, #3744]", + "ldr q11, [x28, #3536]", "eor v8.16b, v8.16b, v11.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7635,39 +7635,39 @@ "ldr s8, [x8, #136]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s11, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s11", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v11.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v11.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7675,42 +7675,42 @@ "ldr s8, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", - "ldr q11, [x28, #3744]", + "ldr q11, [x28, #3536]", "eor v8.16b, v8.16b, v11.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -7718,55 +7718,55 @@ "ldr s7, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "ldr s11, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s11", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v11.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v11.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -7774,48 +7774,48 @@ "ldr s9, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7823,55 +7823,55 @@ "ldr s8, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s9, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "ldr s11, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s11", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v11.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v11.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -7879,32 +7879,32 @@ "ldr s9, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "ldr s11, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s11", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v11.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v11.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -7914,8 +7914,8 @@ "add w4, w5, w4, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -7923,24 +7923,24 @@ "ldr s4, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -7948,18 +7948,18 @@ "ldr s7, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", - "ldr q9, [x28, #3744]", + "ldr q9, [x28, #3536]", "eor v7.16b, v7.16b, v9.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -7967,23 +7967,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -7991,31 +7991,31 @@ "ldr s7, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -8023,16 +8023,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -8050,8 +8050,8 @@ "ldr s4, [x8, #164]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -8059,8 +8059,8 @@ "ldr s4, [x8, #168]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -8068,8 +8068,8 @@ "ldr s4, [x8, #172]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", @@ -8077,8 +8077,8 @@ "ldr s4, [x8, #176]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", @@ -8088,8 +8088,8 @@ "ldr s4, [x8, #184]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v11.16b, v0.16b", @@ -8107,18 +8107,18 @@ "movi v2.2d, #0x0", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1024]", - "ldr q2, [x28, #3744]", + "ldr q2, [x28, #3536]", "eor v2.16b, v3.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8126,28 +8126,28 @@ "ldr s2, [x8, #200]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q3, [x28, #3744]", + "ldr q3, [x28, #3536]", "eor v2.16b, v2.16b, v3.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1152]", "strb wzr, [x28, #1049]", - "ldr q2, [x28, #3744]", + "ldr q2, [x28, #3536]", "eor v2.16b, v6.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8155,17 +8155,17 @@ "ldr s2, [x8, #192]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q3, [x28, #3744]", + "ldr q3, [x28, #3536]", "eor v2.16b, v2.16b, v3.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8173,28 +8173,28 @@ "ldr s2, [x8, #188]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q3, [x28, #3744]", + "ldr q3, [x28, #3536]", "eor v2.16b, v2.16b, v3.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1344]", "strb wzr, [x28, #1049]", - "ldr q2, [x28, #3744]", + "ldr q2, [x28, #3536]", "eor v2.16b, v11.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8202,60 +8202,60 @@ "ldr s2, [x8, #180]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q3, [x28, #3744]", + "ldr q3, [x28, #3536]", "eor v2.16b, v2.16b, v3.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1472]", "strb wzr, [x28, #1049]", - "ldr q2, [x28, #3744]", + "ldr q2, [x28, #3536]", "eor v2.16b, v10.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1536]", "strb wzr, [x28, #1049]", - "ldr q2, [x28, #3744]", + "ldr q2, [x28, #3536]", "eor v2.16b, v9.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1600]", "strb wzr, [x28, #1049]", - "ldr q2, [x28, #3744]", + "ldr q2, [x28, #3536]", "eor v2.16b, v8.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1664]", - "ldr q2, [x28, #3744]", + "ldr q2, [x28, #3536]", "eor v2.16b, v7.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8915,31 +8915,31 @@ "ldr s2, [x4, #64]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #68]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -8947,24 +8947,24 @@ "ldr s3, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8972,24 +8972,24 @@ "ldr s2, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -8997,24 +8997,24 @@ "ldr s3, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9022,24 +9022,24 @@ "ldr s2, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -9047,24 +9047,24 @@ "ldr s3, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9072,24 +9072,24 @@ "ldr s2, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -9097,24 +9097,24 @@ "ldr s3, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9122,24 +9122,24 @@ "ldr s2, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -9147,24 +9147,24 @@ "ldr s3, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9172,24 +9172,24 @@ "ldr s2, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -9197,24 +9197,24 @@ "ldr s3, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9222,24 +9222,24 @@ "ldr s2, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -9247,24 +9247,24 @@ "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9272,24 +9272,24 @@ "ldr s2, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -9297,24 +9297,24 @@ "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9322,15 +9322,15 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d4, d0", @@ -9338,16 +9338,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -9355,8 +9355,8 @@ "ldr s3, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -9364,31 +9364,31 @@ "ldr s3, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s5, [x4, #68]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -9396,24 +9396,24 @@ "ldr s5, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -9421,24 +9421,24 @@ "ldr s3, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -9446,24 +9446,24 @@ "ldr s5, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -9471,24 +9471,24 @@ "ldr s3, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -9496,24 +9496,24 @@ "ldr s5, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -9521,24 +9521,24 @@ "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -9546,15 +9546,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -9564,15 +9564,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9580,15 +9580,15 @@ "ldr s2, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", @@ -9596,15 +9596,15 @@ "ldr s3, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d4, d0", @@ -9612,15 +9612,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9628,23 +9628,23 @@ "ldr s2, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d4, d0", @@ -9652,16 +9652,16 @@ "ldr s4, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x4, #64]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -9670,16 +9670,16 @@ "ldr d6, [x20]", "str x30, [sp, #-16]!", "fmov d0, d6", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -9687,8 +9687,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -9697,16 +9697,16 @@ "ldr d7, [x20]", "str x30, [sp, #-16]!", "fmov d0, d7", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -9714,8 +9714,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -9724,16 +9724,16 @@ "ldr d8, [x20]", "str x30, [sp, #-16]!", "fmov d0, d8", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -9741,15 +9741,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -9757,63 +9757,63 @@ "ldr d3, [x8, #40]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr d9, [x8, #24]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -9821,63 +9821,63 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr d9, [x8, #128]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -9885,63 +9885,63 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr d9, [x8, #128]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -9949,16 +9949,16 @@ "ldr d3, [x8, #32]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9966,8 +9966,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9975,31 +9975,31 @@ "ldr d3, [x8, #24]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10007,8 +10007,8 @@ "ldr s2, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10017,23 +10017,23 @@ "ldr d3, [x20]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10041,15 +10041,15 @@ "ldr s2, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", @@ -10057,15 +10057,15 @@ "ldr s3, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d4, d0", @@ -10073,15 +10073,15 @@ "ldr s4, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d5, d0", @@ -10089,15 +10089,15 @@ "ldr s5, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d9, d0", @@ -10107,16 +10107,16 @@ "ldr d9, [x21]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", @@ -10124,8 +10124,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10134,16 +10134,16 @@ "ldr d3, [x21]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -10151,8 +10151,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10161,16 +10161,16 @@ "ldr d4, [x21]", "str x30, [sp, #-16]!", "fmov d0, d4", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -10178,15 +10178,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10194,24 +10194,24 @@ "ldr d2, [x8, #24]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #144]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10219,39 +10219,39 @@ "ldr d10, [x8, #40]", "str x30, [sp, #-16]!", "fmov d0, d10", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d10, [x20]", "str x30, [sp, #-16]!", "fmov d0, d10", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10259,32 +10259,32 @@ "ldr d2, [x8, #24]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d10, [x8, #32]", "str x30, [sp, #-16]!", "fmov d0, d10", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10292,47 +10292,47 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #40]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10340,87 +10340,87 @@ "ldr d2, [x8, #24]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #32]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #144]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #40]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10428,15 +10428,15 @@ "ldr s2, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d5, d0", @@ -10444,15 +10444,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10460,15 +10460,15 @@ "ldr s2, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d5, d0", @@ -10476,15 +10476,15 @@ "ldr s5, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d10, d0", @@ -10492,15 +10492,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10508,15 +10508,15 @@ "ldr s2, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d5, d0", @@ -10524,15 +10524,15 @@ "ldr s5, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d5, d0", @@ -10540,15 +10540,15 @@ "ldr s5, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d5, d0", @@ -10556,15 +10556,15 @@ "ldr s5, [x4, #68]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d5, d0", @@ -10572,79 +10572,79 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #136]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #24]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #40]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10652,87 +10652,87 @@ "ldr d2, [x8, #160]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #32]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #24]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #152]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #40]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10740,87 +10740,87 @@ "ldr d2, [x8, #32]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #136]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #24]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #40]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10828,48 +10828,48 @@ "ldr d2, [x8, #32]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr d7, [x8, #136]", "str x30, [sp, #-16]!", "fmov d0, d7", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr d7, [x8, #24]", "str x30, [sp, #-16]!", "fmov d0, d7", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -10877,24 +10877,24 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr d7, [x8, #40]", "str x30, [sp, #-16]!", "fmov d0, d7", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -10902,16 +10902,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -10919,16 +10919,16 @@ "ldr d5, [x8, #8]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10936,40 +10936,40 @@ "ldr d5, [x8, #24]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x8, #152]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10979,23 +10979,23 @@ "ldr d5, [x21]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -11003,31 +11003,31 @@ "ldr s2, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d5, [x20]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -11035,87 +11035,87 @@ "ldr s2, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s5, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -11123,15 +11123,15 @@ "ldr s7, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d8, d0", @@ -11139,39 +11139,39 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr d8, [x20]", "str x30, [sp, #-16]!", "fmov d0, d8", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -11179,63 +11179,63 @@ "ldr d7, [x8, #32]", "str x30, [sp, #-16]!", "fmov d0, d7", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -11243,16 +11243,16 @@ "ldr d7, [x8, #32]", "str x30, [sp, #-16]!", "fmov d0, d7", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -11260,47 +11260,47 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -11308,31 +11308,31 @@ "ldr s2, [x8, #180]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #192]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -11340,24 +11340,24 @@ "ldr s4, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #176]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -11366,23 +11366,23 @@ "ldr d7, [x20]", "str x30, [sp, #-16]!", "fmov d0, d7", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -11390,31 +11390,31 @@ "ldr s6, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -11422,15 +11422,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -11438,31 +11438,31 @@ "ldr s6, [x8, #196]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #208]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -11470,15 +11470,15 @@ "ldr s8, [x8, #152]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d9, d0", @@ -11486,15 +11486,15 @@ "ldr s9, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d10, d0", @@ -11502,8 +11502,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -11512,23 +11512,23 @@ "ldr d9, [x20]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -11536,23 +11536,23 @@ "ldr s8, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d10, d0", @@ -11560,15 +11560,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -11576,23 +11576,23 @@ "ldr d9, [x8, #48]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -11600,15 +11600,15 @@ "ldr s8, [x8, #168]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d9, d0", @@ -11616,15 +11616,15 @@ "ldr s9, [x8, #184]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d10, d0", @@ -11632,15 +11632,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -11648,15 +11648,15 @@ "ldr s8, [x8, #136]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d9, d0", @@ -11664,15 +11664,15 @@ "ldr s9, [x8, #160]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d10, d0", @@ -11680,8 +11680,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -11690,23 +11690,23 @@ "ldr d9, [x20]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -11714,23 +11714,23 @@ "ldr s8, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d10, d0", @@ -11738,15 +11738,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -11754,23 +11754,23 @@ "ldr d9, [x8, #48]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -11778,15 +11778,15 @@ "ldr s8, [x8, #144]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d9, d0", @@ -11794,15 +11794,15 @@ "ldr s9, [x8, #200]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d10, d0", @@ -11810,15 +11810,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -11826,15 +11826,15 @@ "ldr s8, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d9, d0", @@ -11842,15 +11842,15 @@ "ldr s9, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d10, d0", @@ -11858,8 +11858,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -11868,23 +11868,23 @@ "ldr d9, [x20]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -11892,23 +11892,23 @@ "ldr s8, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d10, d0", @@ -11916,15 +11916,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -11932,23 +11932,23 @@ "ldr d9, [x8, #48]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -11956,23 +11956,23 @@ "ldr s8, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d10, d0", @@ -11980,15 +11980,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -11996,23 +11996,23 @@ "ldr d9, [x8, #128]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -12020,31 +12020,31 @@ "ldr d8, [x8, #200]", "str x30, [sp, #-16]!", "fmov d0, d8", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr d9, [x8, #144]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -12052,24 +12052,24 @@ "ldr d8, [x8, #40]", "str x30, [sp, #-16]!", "fmov d0, d8", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr d9, [x8, #32]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -12078,23 +12078,23 @@ "ldr d9, [x20]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -12102,23 +12102,23 @@ "ldr s8, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d10, d0", @@ -12126,15 +12126,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -12142,23 +12142,23 @@ "ldr d9, [x8, #48]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -12166,31 +12166,31 @@ "ldr d8, [x8, #184]", "str x30, [sp, #-16]!", "fmov d0, d8", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr d9, [x8, #168]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -12198,24 +12198,24 @@ "ldr d8, [x8, #160]", "str x30, [sp, #-16]!", "fmov d0, d8", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr d9, [x8, #136]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -12224,23 +12224,23 @@ "ldr d9, [x20]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -12248,23 +12248,23 @@ "ldr s8, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d10, d0", @@ -12272,15 +12272,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -12288,23 +12288,23 @@ "ldr d9, [x8, #48]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -12312,15 +12312,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -12328,24 +12328,24 @@ "ldr d6, [x8, #152]", "str x30, [sp, #-16]!", "fmov d0, d6", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr d7, [x8, #208]", "str x30, [sp, #-16]!", "fmov d0, d7", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -12354,23 +12354,23 @@ "ldr d7, [x20]", "str x30, [sp, #-16]!", "fmov d0, d7", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -12378,31 +12378,31 @@ "ldr s6, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -12410,15 +12410,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -12427,16 +12427,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -12444,8 +12444,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -12454,23 +12454,23 @@ "ldr d3, [x20]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -12478,16 +12478,16 @@ "ldr s2, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -12496,8 +12496,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -12509,8 +12509,8 @@ "mov x4, x26", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -12518,15 +12518,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -12534,33 +12534,33 @@ "ldr s2, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q3, [x28, #3744]", + "ldr q3, [x28, #3536]", "eor v3.16b, v2.16b, v3.16b", "ldr s4, [x4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12568,34 +12568,34 @@ "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", - "ldr q5, [x28, #3744]", + "ldr q5, [x28, #3536]", "eor v5.16b, v4.16b, v5.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12603,34 +12603,34 @@ "ldr s3, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s5, [x8, #100]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", - "ldr q6, [x28, #3744]", + "ldr q6, [x28, #3536]", "eor v6.16b, v5.16b, v6.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12638,34 +12638,34 @@ "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s6, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", - "ldr q7, [x28, #3744]", + "ldr q7, [x28, #3536]", "eor v7.16b, v6.16b, v7.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12673,34 +12673,34 @@ "ldr s3, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s7, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", - "ldr q8, [x28, #3744]", + "ldr q8, [x28, #3536]", "eor v8.16b, v7.16b, v8.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12708,34 +12708,34 @@ "ldr s3, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s8, [x8, #112]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", - "ldr q9, [x28, #3744]", + "ldr q9, [x28, #3536]", "eor v9.16b, v8.16b, v9.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12743,33 +12743,33 @@ "ldr s3, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s9, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", - "ldr q10, [x28, #3744]", + "ldr q10, [x28, #3536]", "eor v9.16b, v9.16b, v10.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12777,33 +12777,33 @@ "ldr s3, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s9, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", - "ldr q10, [x28, #3744]", + "ldr q10, [x28, #3536]", "eor v9.16b, v9.16b, v10.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12811,33 +12811,33 @@ "ldr s3, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s9, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", - "ldr q10, [x28, #3744]", + "ldr q10, [x28, #3536]", "eor v9.16b, v9.16b, v10.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12845,31 +12845,31 @@ "ldr s3, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s9, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12877,31 +12877,31 @@ "ldr s3, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s9, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12909,31 +12909,31 @@ "ldr s3, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s9, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12941,23 +12941,23 @@ "ldr s3, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12965,23 +12965,23 @@ "ldr s3, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12989,23 +12989,23 @@ "ldr s3, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -13013,23 +13013,23 @@ "ldr s3, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -13037,23 +13037,23 @@ "ldr s3, [x4, #64]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -13061,23 +13061,23 @@ "ldr s3, [x4, #68]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -13085,31 +13085,31 @@ "ldr s2, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #72]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -13117,31 +13117,31 @@ "ldr s3, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x4, #76]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -13149,31 +13149,31 @@ "ldr s4, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x4, #80]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -13181,31 +13181,31 @@ "ldr s5, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #84]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -13213,31 +13213,31 @@ "ldr s6, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x4, #88]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -13245,31 +13245,31 @@ "ldr s7, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #92]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -13277,15 +13277,15 @@ "ldr s8, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d9, d0", @@ -13293,23 +13293,23 @@ "ldr s9, [x4, #96]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -13317,15 +13317,15 @@ "ldr s8, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d9, d0", @@ -13333,23 +13333,23 @@ "ldr s9, [x4, #100]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -13357,31 +13357,31 @@ "ldr s8, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #104]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -13389,23 +13389,23 @@ "ldr s9, [x4, #108]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -13413,31 +13413,31 @@ "ldr s8, [x4, #112]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr d9, [x8, #128]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -13445,31 +13445,31 @@ "ldr s8, [x4, #116]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr d9, [x8, #24]", "str x30, [sp, #-16]!", "fmov d0, d9", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -13477,23 +13477,23 @@ "ldr s8, [x4, #120]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -13501,23 +13501,23 @@ "ldr s7, [x4, #124]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -13525,23 +13525,23 @@ "ldr s6, [x4, #128]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -13549,23 +13549,23 @@ "ldr s5, [x4, #132]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -13573,23 +13573,23 @@ "ldr s4, [x4, #136]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -13597,23 +13597,23 @@ "ldr s3, [x4, #140]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -14307,31 +14307,31 @@ "ldr s2, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -14339,23 +14339,23 @@ "ldr s3, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -14363,23 +14363,23 @@ "ldr s3, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -14395,31 +14395,31 @@ "ldr s2, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -14427,23 +14427,23 @@ "ldr s3, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -14451,23 +14451,23 @@ "ldr s3, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -14477,31 +14477,31 @@ "ldr s2, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -14511,23 +14511,23 @@ "ldr s4, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -14537,23 +14537,23 @@ "ldr s5, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -14563,23 +14563,23 @@ "ldr s6, [x8, #140]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14589,23 +14589,23 @@ "ldr s6, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14615,23 +14615,23 @@ "ldr s6, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14641,23 +14641,23 @@ "ldr s6, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14667,23 +14667,23 @@ "ldr s6, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14693,24 +14693,24 @@ "ldr s6, [x8, #100]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -14720,31 +14720,31 @@ "ldr s2, [x8, #148]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s6, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14752,31 +14752,31 @@ "ldr s6, [x8, #152]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -14784,31 +14784,31 @@ "ldr s7, [x8, #156]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -14816,31 +14816,31 @@ "ldr s8, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -14848,31 +14848,31 @@ "ldr s8, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -14880,31 +14880,31 @@ "ldr s8, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -14912,31 +14912,31 @@ "ldr s8, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -14944,31 +14944,31 @@ "ldr s8, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -14976,31 +14976,31 @@ "ldr s8, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15038,23 +15038,23 @@ "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15062,23 +15062,23 @@ "ldr s8, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15086,23 +15086,23 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15110,31 +15110,31 @@ "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15142,31 +15142,31 @@ "ldr s8, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15174,31 +15174,31 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15206,31 +15206,31 @@ "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15238,31 +15238,31 @@ "ldr s8, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15270,31 +15270,31 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15332,23 +15332,23 @@ "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15356,23 +15356,23 @@ "ldr s8, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15380,23 +15380,23 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15404,31 +15404,31 @@ "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15436,31 +15436,31 @@ "ldr s8, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15468,31 +15468,31 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15500,31 +15500,31 @@ "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15532,31 +15532,31 @@ "ldr s8, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15564,31 +15564,31 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -15626,24 +15626,24 @@ "ldr s3, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -15651,24 +15651,24 @@ "ldr s2, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -15676,23 +15676,23 @@ "ldr s2, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -15700,31 +15700,31 @@ "ldr s2, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -15732,31 +15732,31 @@ "ldr s2, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -15764,31 +15764,31 @@ "ldr s2, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -15796,31 +15796,31 @@ "ldr s2, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -15828,31 +15828,31 @@ "ldr s2, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -15860,31 +15860,31 @@ "ldr s2, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -15927,31 +15927,31 @@ "ldr s2, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -15959,23 +15959,23 @@ "ldr s3, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -15983,23 +15983,23 @@ "ldr s3, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -16015,31 +16015,31 @@ "ldr s2, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -16047,23 +16047,23 @@ "ldr s3, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -16071,23 +16071,23 @@ "ldr s3, [x8, #100]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -16097,31 +16097,31 @@ "ldr s2, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -16131,23 +16131,23 @@ "ldr s4, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -16157,23 +16157,23 @@ "ldr s5, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -16183,23 +16183,23 @@ "ldr s6, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -16209,23 +16209,23 @@ "ldr s6, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -16235,23 +16235,23 @@ "ldr s6, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -16261,23 +16261,23 @@ "ldr s6, [x8, #112]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -16287,23 +16287,23 @@ "ldr s6, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -16313,16 +16313,16 @@ "ldr s6, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -16330,8 +16330,8 @@ "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -16341,31 +16341,31 @@ "ldr s2, [x8, #148]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s6, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -16373,31 +16373,31 @@ "ldr s6, [x8, #152]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -16405,31 +16405,31 @@ "ldr s7, [x8, #156]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16437,31 +16437,31 @@ "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16469,31 +16469,31 @@ "ldr s8, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16501,31 +16501,31 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16533,31 +16533,31 @@ "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16565,31 +16565,31 @@ "ldr s8, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16597,31 +16597,31 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16659,23 +16659,23 @@ "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16683,23 +16683,23 @@ "ldr s8, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16707,23 +16707,23 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16731,31 +16731,31 @@ "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16763,31 +16763,31 @@ "ldr s8, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16795,31 +16795,31 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16827,31 +16827,31 @@ "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16859,31 +16859,31 @@ "ldr s8, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16891,31 +16891,31 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16953,23 +16953,23 @@ "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -16977,23 +16977,23 @@ "ldr s8, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -17001,23 +17001,23 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -17025,31 +17025,31 @@ "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -17057,31 +17057,31 @@ "ldr s8, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -17089,31 +17089,31 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -17121,31 +17121,31 @@ "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -17153,31 +17153,31 @@ "ldr s8, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -17185,31 +17185,31 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -17248,24 +17248,24 @@ "ldr s3, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -17273,24 +17273,24 @@ "ldr s2, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -17298,23 +17298,23 @@ "ldr s2, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -17322,31 +17322,31 @@ "ldr s2, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -17354,31 +17354,31 @@ "ldr s2, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -17386,31 +17386,31 @@ "ldr s2, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -17418,31 +17418,31 @@ "ldr s2, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -17450,31 +17450,31 @@ "ldr s2, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #136]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -17482,31 +17482,31 @@ "ldr s2, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -19605,8 +19605,8 @@ "stp w7, w21, [x8, #-8]!", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -20013,12 +20013,12 @@ "mov x8, x26", "str s2, [x8, #16]", "uxtb w7, w4", - "ldr q2, [x28, #3520]", + "ldr q2, [x28, #3312]", "str w7, [x8, #56]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -20027,8 +20027,8 @@ "movi v2.2d, #0x0", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -20061,24 +20061,24 @@ "ldr d3, [x20]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -20107,15 +20107,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -20471,8 +20471,8 @@ "str w7, [x8, #-4]!", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -20713,31 +20713,31 @@ "ldr s2, [x7, #12]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -20745,24 +20745,24 @@ "ldr s3, [x7]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -20770,24 +20770,24 @@ "ldur s2, [x7, #-12]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -20795,24 +20795,24 @@ "ldur s3, [x7, #-24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -20820,24 +20820,24 @@ "ldur s2, [x7, #-36]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -20845,8 +20845,8 @@ "ldr s3, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -20854,31 +20854,31 @@ "ldr s3, [x7]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s5, [x7, #24]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -20886,15 +20886,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -20902,8 +20902,8 @@ "ldr s3, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -20911,8 +20911,8 @@ "ldur s3, [x7, #-12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20927,15 +20927,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -20945,8 +20945,8 @@ "ldr s3, [x7, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20960,15 +20960,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -20976,8 +20976,8 @@ "ldr s8, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -20987,15 +20987,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -21003,8 +21003,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -21012,8 +21012,8 @@ "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21023,31 +21023,31 @@ "ldr s2, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -21055,15 +21055,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21073,15 +21073,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21089,23 +21089,23 @@ "ldr s2, [x7, #24]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -21113,23 +21113,23 @@ "ldr s3, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -21137,15 +21137,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21155,31 +21155,31 @@ "ldr s2, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -21187,15 +21187,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21203,8 +21203,8 @@ "ldr s2, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -21213,23 +21213,23 @@ "ldr d3, [x14]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21237,8 +21237,8 @@ "ldr s2, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -21247,23 +21247,23 @@ "ldr d3, [x14]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21271,8 +21271,8 @@ "ldr s2, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -21281,23 +21281,23 @@ "ldr d3, [x14]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21305,15 +21305,15 @@ "ldr s2, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -21321,24 +21321,24 @@ "ldr s3, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21346,23 +21346,23 @@ "ldr s2, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21370,15 +21370,15 @@ "ldr s2, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -21386,24 +21386,24 @@ "ldr s3, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21411,23 +21411,23 @@ "ldr s2, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21435,15 +21435,15 @@ "ldr s2, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -21451,24 +21451,24 @@ "ldr s3, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21476,23 +21476,23 @@ "ldr s2, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21500,8 +21500,8 @@ "ldr s2, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -21510,23 +21510,23 @@ "ldr d3, [x14]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21534,8 +21534,8 @@ "ldr s2, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -21544,23 +21544,23 @@ "ldr d3, [x14]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21568,8 +21568,8 @@ "ldr s2, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -21578,23 +21578,23 @@ "ldr d3, [x14]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21602,8 +21602,8 @@ "ldr s2, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -21612,23 +21612,23 @@ "ldr d3, [x14]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21636,8 +21636,8 @@ "ldr s2, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -21646,23 +21646,23 @@ "ldr d3, [x14]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21670,8 +21670,8 @@ "ldr s2, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -21680,23 +21680,23 @@ "ldr d3, [x14]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21704,27 +21704,27 @@ "ldr s2, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q3, [x28, #3744]", + "ldr q3, [x28, #3536]", "eor v2.16b, v2.16b, v3.16b", "add x14, x28, x20, lsl #4", "ldr q3, [x14, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -21734,24 +21734,24 @@ "ldr d4, [x14]", "str x30, [sp, #-16]!", "fmov d0, d4", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21759,36 +21759,36 @@ "ldr s2, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q5, [x28, #3744]", + "ldr q5, [x28, #3536]", "eor v2.16b, v2.16b, v5.16b", "mov w14, #0x7b90", "movk w14, #0xa7, lsl #16", "ldr d5, [x14]", "str x30, [sp, #-16]!", "fmov d0, d5", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -21799,23 +21799,23 @@ "ldr d6, [x14]", "str x30, [sp, #-16]!", "fmov d0, d6", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21823,35 +21823,35 @@ "ldr s2, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q6, [x28, #3744]", + "ldr q6, [x28, #3536]", "eor v2.16b, v2.16b, v6.16b", "mov w15, #0x7b80", "movk w15, #0xa7, lsl #16", "ldr d6, [x15]", "str x30, [sp, #-16]!", "fmov d0, d6", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -21861,23 +21861,23 @@ "ldr d6, [x16]", "str x30, [sp, #-16]!", "fmov d0, d6", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21885,15 +21885,15 @@ "ldr s2, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21901,31 +21901,31 @@ "ldr s2, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr d6, [x14]", "str x30, [sp, #-16]!", "fmov d0, d6", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -21933,36 +21933,36 @@ "ldr s6, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", "str s7, [x8, #64]", "strb wzr, [x28, #1049]", - "ldr q7, [x28, #3744]", + "ldr q7, [x28, #3536]", "eor v7.16b, v6.16b, v7.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -21973,27 +21973,27 @@ "mov x5, x26", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", "str s7, [x8, #68]", "strb wzr, [x28, #1049]", - "ldr q7, [x28, #3744]", + "ldr q7, [x28, #3536]", "eor v2.16b, v2.16b, v7.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22001,33 +22001,33 @@ "ldr s2, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q5, [x28, #3744]", + "ldr q5, [x28, #3536]", "eor v5.16b, v2.16b, v5.16b", "ldr d7, [x15]", "str x30, [sp, #-16]!", "fmov d0, d7", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -22035,23 +22035,23 @@ "ldr d7, [x16]", "str x30, [sp, #-16]!", "fmov d0, d7", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22059,31 +22059,31 @@ "ldur s2, [x4, #-28]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s7, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22091,31 +22091,31 @@ "ldur s2, [x4, #-24]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s7, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22123,31 +22123,31 @@ "ldr s2, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s7, [x4, #-20]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22155,31 +22155,31 @@ "ldur s2, [x4, #-16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s7, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22187,31 +22187,31 @@ "ldur s2, [x4, #-12]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s7, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22219,31 +22219,31 @@ "ldur s2, [x4, #-8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s7, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22251,31 +22251,31 @@ "ldr s2, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s7, [x4, #-4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22283,31 +22283,31 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s7, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22315,31 +22315,31 @@ "ldr s2, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s7, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22347,31 +22347,31 @@ "ldr s2, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s7, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22379,31 +22379,31 @@ "ldr s2, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s7, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22411,31 +22411,31 @@ "ldr s2, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s7, [x8, #100]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -22699,8 +22699,8 @@ "ldr s2, [x8, #156]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -22718,24 +22718,24 @@ "ldr s3, [x20, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #152]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -22743,79 +22743,79 @@ "ldr s4, [x20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #160]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x11]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #136]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22823,8 +22823,8 @@ "ldr s2, [x8, #168]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -22832,24 +22832,24 @@ "ldr s3, [x20, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #164]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -22857,79 +22857,79 @@ "ldr s4, [x20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #172]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x11]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #140]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22937,8 +22937,8 @@ "ldr s2, [x8, #180]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -22946,24 +22946,24 @@ "ldr s3, [x20, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #176]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -22971,16 +22971,16 @@ "ldr s4, [x20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -22988,32 +22988,32 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #184]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x10]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -23024,31 +23024,31 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #144]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -23056,8 +23056,8 @@ "ldr s2, [x8, #100]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -23065,24 +23065,24 @@ "ldr s3, [x20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -23090,32 +23090,32 @@ "ldr s5, [x20, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s5, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -23123,32 +23123,32 @@ "ldr s6, [x20, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -23156,8 +23156,8 @@ "ldr s3, [x8, #112]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -23165,24 +23165,24 @@ "ldr s6, [x20]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -23190,32 +23190,32 @@ "ldr s8, [x20, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s8, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -23223,32 +23223,32 @@ "ldr s9, [x20, #8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -23256,8 +23256,8 @@ "ldr s6, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -23265,24 +23265,24 @@ "ldr s8, [x20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s8, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -23290,32 +23290,32 @@ "ldr s9, [x20, #4]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s8, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -23323,31 +23323,31 @@ "ldr s9, [x20, #8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -23356,16 +23356,16 @@ "ldr s6, [x20, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -23373,55 +23373,55 @@ "ldr s8, [x20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s8, [x11]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -23430,16 +23430,16 @@ "ldr s6, [x20, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -23447,63 +23447,63 @@ "ldr s8, [x20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s8, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x11]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -23511,8 +23511,8 @@ "ldr s6, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -23520,24 +23520,24 @@ "ldr s8, [x20, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s8, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -23545,16 +23545,16 @@ "ldr s9, [x20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -23562,32 +23562,32 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s8, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x10]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -23598,8 +23598,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -23609,8 +23609,8 @@ "ldr w11, [x8, #16]", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -23619,24 +23619,24 @@ "ldr s6, [x20]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s6, [x11]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -23644,8 +23644,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -23653,16 +23653,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s4, [x11]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -23670,8 +23670,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -23679,16 +23679,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -23697,24 +23697,24 @@ "ldr s2, [x20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x11]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -23722,55 +23722,55 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x11]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -23778,8 +23778,8 @@ "ldr s2, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -23787,16 +23787,16 @@ "ldr s3, [x20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -23804,24 +23804,24 @@ "ldr s3, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -23829,47 +23829,47 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x11]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -23877,32 +23877,32 @@ "ldr s2, [x8, #208]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -23910,23 +23910,23 @@ "ldr s2, [x8, #212]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -23934,23 +23934,23 @@ "ldr s2, [x8, #216]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -23958,8 +23958,8 @@ "ldr s2, [x8, #192]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -23967,24 +23967,24 @@ "ldr s4, [x20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "add w20, w7, w4", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -23996,8 +23996,8 @@ "ldr s2, [x8, #196]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -24005,24 +24005,24 @@ "ldr s4, [x20, #4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "add w20, w7, w4", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24032,31 +24032,31 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s4, [x8, #200]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24065,23 +24065,23 @@ "ldr s2, [x8, #232]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24089,23 +24089,23 @@ "ldr s2, [x8, #236]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24113,23 +24113,23 @@ "ldr s2, [x8, #240]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24137,8 +24137,8 @@ "ldr s2, [x8, #220]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -24146,24 +24146,24 @@ "ldr s4, [x20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "add w20, w7, w9", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24171,8 +24171,8 @@ "ldr s2, [x8, #224]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -24180,24 +24180,24 @@ "ldr s4, [x20, #4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "add w20, w7, w9", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24205,8 +24205,8 @@ "ldr s2, [x8, #228]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -24214,24 +24214,24 @@ "ldr s4, [x20, #8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "add w20, w7, w9", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24239,23 +24239,23 @@ "ldr s2, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24263,23 +24263,23 @@ "ldr s2, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24287,23 +24287,23 @@ "ldr s2, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24312,32 +24312,32 @@ "ldr s2, [x20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s4, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "add w20, w7, w4", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24345,8 +24345,8 @@ "ldr s2, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -24354,24 +24354,24 @@ "ldr s4, [x20, #4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "add w20, w7, w4", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24381,31 +24381,31 @@ "ldr s2, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s4, [x4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24414,23 +24414,23 @@ "ldr s2, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24438,23 +24438,23 @@ "ldr s2, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24462,23 +24462,23 @@ "ldr s2, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24487,32 +24487,32 @@ "ldr s2, [x20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "add w20, w7, w4", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24520,8 +24520,8 @@ "ldr s2, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -24529,24 +24529,24 @@ "ldr s3, [x20, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "add w20, w7, w4", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24556,31 +24556,31 @@ "ldr s2, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24864,23 +24864,23 @@ "ldr s2, [x11]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24888,8 +24888,8 @@ "ldr s2, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -24898,23 +24898,23 @@ "ldr d3, [x20]", "str x30, [sp, #-16]!", "fmov d0, d3", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -24922,8 +24922,8 @@ "ldr s2, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -25234,24 +25234,24 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", "str s3, [x8, #72]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", "str s3, [x8, #88]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -25262,48 +25262,48 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", "str s3, [x8, #76]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", "str s3, [x8, #80]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", "str s3, [x8, #84]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", "str s3, [x8, #92]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", "str s3, [x8, #96]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -25313,15 +25313,15 @@ "ldr s2, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", diff --git a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json index d0f0218b5a..40e84fc15e 100644 --- a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json +++ b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json @@ -10,7 +10,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "Block1": { @@ -543,8 +543,8 @@ "ldr s2, [x7, #4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -552,8 +552,8 @@ "ldr s3, [x7, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -561,8 +561,8 @@ "ldr s4, [x7, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -570,8 +570,8 @@ "ldr s5, [x7, #32]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -579,87 +579,87 @@ "ldr s6, [x7, #36]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #68]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #64]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "ldr s10, [x4, #100]", "str x30, [sp, #-16]!", "fmov s0, s10", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -667,31 +667,31 @@ "ldr s9, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "ldr s10, [x4, #96]", "str x30, [sp, #-16]!", "fmov s0, s10", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -699,39 +699,39 @@ "ldr s9, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "ldr s10, [x8]", "str x30, [sp, #-16]!", "fmov s0, s10", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -739,39 +739,39 @@ "ldr s9, [x8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "ldr s10, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s10", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -779,23 +779,23 @@ "ldr s9, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -803,23 +803,23 @@ "ldr s9, [x8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -828,23 +828,23 @@ "ldr s9, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -852,23 +852,23 @@ "ldr s7, [x8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -876,79 +876,79 @@ "ldr s7, [x4, #68]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #64]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #100]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "ldr s10, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s10", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -956,31 +956,31 @@ "ldr s9, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "ldr s10, [x4, #96]", "str x30, [sp, #-16]!", "fmov s0, s10", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -988,39 +988,39 @@ "ldr s9, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "ldr s10, [x8]", "str x30, [sp, #-16]!", "fmov s0, s10", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -1028,39 +1028,39 @@ "ldr s9, [x8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "ldr s10, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s10", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -1068,23 +1068,23 @@ "ldr s9, [x8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -1092,23 +1092,23 @@ "ldr s9, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -1116,23 +1116,23 @@ "ldr s9, [x8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -1140,23 +1140,23 @@ "ldr s7, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -1164,55 +1164,55 @@ "ldr s7, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #76]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #72]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -1220,39 +1220,39 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -1260,39 +1260,39 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -1300,55 +1300,55 @@ "ldr s7, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #108]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #104]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -1356,55 +1356,55 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "ldr s10, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s10", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -1412,24 +1412,24 @@ "ldr s8, [x8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -1437,31 +1437,31 @@ "ldr s9, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -1469,31 +1469,31 @@ "ldr s7, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -1501,31 +1501,31 @@ "ldr s7, [x8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -1533,31 +1533,31 @@ "ldr s7, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -1565,31 +1565,31 @@ "ldr s7, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -1597,55 +1597,55 @@ "ldr s7, [x4, #76]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #72]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -1653,55 +1653,55 @@ "ldr s8, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "ldr s10, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s10", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v10.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v10.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -1709,55 +1709,55 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -1765,55 +1765,55 @@ "ldr s7, [x4, #108]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #104]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s9, s0", @@ -1821,31 +1821,31 @@ "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -1853,16 +1853,16 @@ "ldr s8, [x8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -1870,23 +1870,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -1894,31 +1894,31 @@ "ldr s7, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -1926,31 +1926,31 @@ "ldr s7, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -1958,31 +1958,31 @@ "ldr s7, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -1990,31 +1990,31 @@ "ldr s7, [x8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -2022,55 +2022,55 @@ "ldr s7, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #84]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #80]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2078,39 +2078,39 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2118,39 +2118,39 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -2158,55 +2158,55 @@ "ldr s7, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #116]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #112]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2214,39 +2214,39 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2254,16 +2254,16 @@ "ldr s8, [x8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -2271,23 +2271,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -2295,31 +2295,31 @@ "ldr s7, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -2327,31 +2327,31 @@ "ldr s7, [x8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -2359,31 +2359,31 @@ "ldr s7, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -2391,31 +2391,31 @@ "ldr s7, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -2423,55 +2423,55 @@ "ldr s7, [x4, #84]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #80]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2479,39 +2479,39 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2519,16 +2519,16 @@ "ldr s8, [x8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -2536,23 +2536,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -2560,55 +2560,55 @@ "ldr s7, [x4, #116]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #112]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2616,39 +2616,39 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x8]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v9.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -2656,39 +2656,39 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -2696,31 +2696,31 @@ "ldr s5, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -2728,31 +2728,31 @@ "ldr s5, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -2760,31 +2760,31 @@ "ldr s5, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -2792,31 +2792,31 @@ "ldr s5, [x8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -2824,95 +2824,95 @@ "ldr s5, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #92]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x4, #88]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -2921,16 +2921,16 @@ "ldr s7, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -2938,103 +2938,103 @@ "ldr s7, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x4, #124]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x4, #120]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -3042,8 +3042,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -3051,23 +3051,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -3075,31 +3075,31 @@ "ldr s6, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -3107,23 +3107,23 @@ "ldr s6, [x8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -3131,31 +3131,31 @@ "ldr s6, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -3163,23 +3163,23 @@ "ldr s6, [x8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -3187,79 +3187,79 @@ "ldr s5, [x4, #92]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x4, #88]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -3267,8 +3267,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -3276,111 +3276,111 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x4, #124]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #120]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -3388,16 +3388,16 @@ "ldr s6, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -3405,55 +3405,55 @@ "ldr s6, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -3461,15 +3461,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -3477,31 +3477,31 @@ "ldr s5, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -3509,111 +3509,111 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #112]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -3621,15 +3621,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -3637,23 +3637,23 @@ "ldr s7, [x8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -3662,15 +3662,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -3678,23 +3678,23 @@ "ldr s4, [x8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -3702,111 +3702,111 @@ "ldr s4, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #112]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -3814,15 +3814,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -3830,15 +3830,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -3847,15 +3847,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -3863,119 +3863,119 @@ "ldr s4, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -3983,39 +3983,39 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -4023,15 +4023,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -4040,23 +4040,23 @@ "ldr s7, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -4064,15 +4064,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -4080,119 +4080,119 @@ "ldr s4, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -4200,31 +4200,31 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -4232,23 +4232,23 @@ "ldr s7, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -4256,15 +4256,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -4272,23 +4272,23 @@ "ldr s4, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -4296,103 +4296,103 @@ "ldr s4, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -4400,15 +4400,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -4416,23 +4416,23 @@ "ldr s7, [x8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -4441,15 +4441,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -4457,23 +4457,23 @@ "ldr s4, [x8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -4481,111 +4481,111 @@ "ldr s4, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -4593,15 +4593,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -4609,15 +4609,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -4626,15 +4626,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -4642,111 +4642,111 @@ "ldr s4, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #100]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -4754,39 +4754,39 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -4794,15 +4794,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -4811,23 +4811,23 @@ "ldr s7, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -4835,15 +4835,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -4851,31 +4851,31 @@ "ldr s4, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -4883,31 +4883,31 @@ "ldr s4, [x8, #100]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -4915,63 +4915,63 @@ "ldr s4, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -4979,39 +4979,39 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -5019,31 +5019,31 @@ "ldr s3, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -5051,23 +5051,23 @@ "ldr s3, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5075,31 +5075,31 @@ "ldr s2, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -5555,119 +5555,119 @@ "ldr s2, [x7, #4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x7, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x7, #8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x4, #64]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #68]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #64]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -5675,31 +5675,31 @@ "ldr s7, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #68]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -5707,55 +5707,55 @@ "ldr s7, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #96]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #100]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -5763,31 +5763,31 @@ "ldr s8, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #96]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -5795,31 +5795,31 @@ "ldr s8, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #100]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -5827,15 +5827,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -5843,23 +5843,23 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -5868,15 +5868,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -5884,23 +5884,23 @@ "ldr s5, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -5908,31 +5908,31 @@ "ldr s5, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -5940,31 +5940,31 @@ "ldr s5, [x8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -5972,31 +5972,31 @@ "ldr s5, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6004,31 +6004,31 @@ "ldr s5, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6036,79 +6036,79 @@ "ldr s5, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #72]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #76]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #72]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -6116,31 +6116,31 @@ "ldr s7, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #76]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -6148,55 +6148,55 @@ "ldr s7, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #104]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #108]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -6204,31 +6204,31 @@ "ldr s8, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #104]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -6236,31 +6236,31 @@ "ldr s8, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #108]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -6268,15 +6268,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -6284,23 +6284,23 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -6309,15 +6309,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6325,23 +6325,23 @@ "ldr s5, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6349,79 +6349,79 @@ "ldr s5, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -6429,8 +6429,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -6438,23 +6438,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6462,79 +6462,79 @@ "ldr s5, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -6543,8 +6543,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -6552,23 +6552,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6576,79 +6576,79 @@ "ldr s5, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #80]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #84]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #80]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -6656,31 +6656,31 @@ "ldr s7, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #84]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -6688,55 +6688,55 @@ "ldr s7, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #112]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #116]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -6744,31 +6744,31 @@ "ldr s8, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #112]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -6776,31 +6776,31 @@ "ldr s8, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #116]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -6808,15 +6808,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -6824,23 +6824,23 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -6849,15 +6849,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6865,23 +6865,23 @@ "ldr s5, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6889,71 +6889,71 @@ "ldr s5, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -6961,23 +6961,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -6985,71 +6985,71 @@ "ldr s5, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -7057,23 +7057,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7081,79 +7081,79 @@ "ldr s5, [x4, #88]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x4, #92]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #88]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -7161,31 +7161,31 @@ "ldr s7, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #92]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -7193,55 +7193,55 @@ "ldr s7, [x4, #120]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "ldr s8, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #124]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7249,31 +7249,31 @@ "ldr s8, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #120]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7281,31 +7281,31 @@ "ldr s8, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "ldr s9, [x4, #124]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7313,15 +7313,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7329,23 +7329,23 @@ "ldr s8, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -7354,15 +7354,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7370,23 +7370,23 @@ "ldr s5, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7394,79 +7394,79 @@ "ldr s5, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -7475,8 +7475,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -7484,23 +7484,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7508,79 +7508,79 @@ "ldr s5, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -7588,8 +7588,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -7597,71 +7597,71 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7669,31 +7669,31 @@ "ldr s5, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7701,31 +7701,31 @@ "ldr s5, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -7733,47 +7733,47 @@ "ldr s5, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -7781,31 +7781,31 @@ "ldr s6, [x8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #128]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -7814,23 +7814,23 @@ "ldr s6, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7839,15 +7839,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7855,31 +7855,31 @@ "ldr s3, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s6, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7888,15 +7888,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7904,31 +7904,31 @@ "ldr s3, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7936,31 +7936,31 @@ "ldr s3, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -7968,31 +7968,31 @@ "ldr s3, [x8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -8000,31 +8000,31 @@ "ldr s3, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -8032,31 +8032,31 @@ "ldr s3, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -8064,79 +8064,79 @@ "ldr s3, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -8144,31 +8144,31 @@ "ldr s5, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -8176,55 +8176,55 @@ "ldr s5, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #136]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -8232,31 +8232,31 @@ "ldr s6, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -8264,31 +8264,31 @@ "ldr s6, [x8, #136]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -8296,15 +8296,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -8312,23 +8312,23 @@ "ldr s6, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -8337,15 +8337,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -8353,23 +8353,23 @@ "ldr s3, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -8377,31 +8377,31 @@ "ldr s3, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -8409,31 +8409,31 @@ "ldr s3, [x8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -8441,31 +8441,31 @@ "ldr s3, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -8473,31 +8473,31 @@ "ldr s3, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -8505,71 +8505,71 @@ "ldr s3, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #112]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -8577,87 +8577,87 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #112]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #36]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -8665,23 +8665,23 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8689,55 +8689,55 @@ "ldr s2, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s4, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s4, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -8745,31 +8745,31 @@ "ldr s4, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -8777,31 +8777,31 @@ "ldr s4, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -8809,23 +8809,23 @@ "ldr s4, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -8833,23 +8833,23 @@ "ldr s4, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -8857,23 +8857,23 @@ "ldr s4, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8881,23 +8881,23 @@ "ldr s2, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8905,31 +8905,31 @@ "ldr s2, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8937,31 +8937,31 @@ "ldr s2, [x8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -8969,31 +8969,31 @@ "ldr s2, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9001,31 +9001,31 @@ "ldr s2, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9033,79 +9033,79 @@ "ldr s2, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #100]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -9113,31 +9113,31 @@ "ldr s4, [x8, #100]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -9145,55 +9145,55 @@ "ldr s4, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #140]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -9201,31 +9201,31 @@ "ldr s5, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #124]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -9233,31 +9233,31 @@ "ldr s5, [x8, #132]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #140]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -9265,15 +9265,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -9281,23 +9281,23 @@ "ldr s5, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -9306,15 +9306,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9322,23 +9322,23 @@ "ldr s2, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9346,31 +9346,31 @@ "ldr s2, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9378,31 +9378,31 @@ "ldr s2, [x8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9410,31 +9410,31 @@ "ldr s2, [x8, #12]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -9442,31 +9442,31 @@ "ldr s2, [x8, #4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10648,8 +10648,8 @@ "ldr s2, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10659,8 +10659,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10669,23 +10669,23 @@ "ldr s3, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10693,47 +10693,47 @@ "ldr s2, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10741,47 +10741,47 @@ "ldr s2, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x9]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10789,47 +10789,47 @@ "ldr s2, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -10837,8 +10837,8 @@ "ldur s2, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10851,20 +10851,20 @@ "ldr s3, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", "add x23, x28, x22, lsl #4", - "ldr q4, [x28, #3744]", + "ldr q4, [x28, #3536]", "eor v3.16b, v3.16b, v4.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -10872,61 +10872,61 @@ "ldur s3, [x11, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldur s4, [x5, #-8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldur s4, [x11, #-4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w22, w22, #0x7 (7)", "and w22, w22, #0x7", "add x12, x28, x22, lsl #4", - "ldr q5, [x28, #3744]", + "ldr q5, [x28, #3536]", "eor v4.16b, v4.16b, v5.16b", "ldur s5, [x5, #-4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldur s5, [x11, #-8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -10935,8 +10935,8 @@ "ldur s6, [x5, #-8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -10944,15 +10944,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -10960,31 +10960,31 @@ "ldur s5, [x5, #-4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x11, #-4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -10992,31 +10992,31 @@ "ldr s5, [x11]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x5]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -11024,33 +11024,33 @@ "ldr s5, [x11, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", - "ldr q6, [x28, #3744]", + "ldr q6, [x28, #3536]", "eor v5.16b, v5.16b, v6.16b", "ldr s6, [x5, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -11058,31 +11058,31 @@ "ldr s5, [x11]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x5]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -11090,31 +11090,31 @@ "ldr s5, [x5, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x11, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -11122,32 +11122,32 @@ "ldur s5, [x7, #-8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x10, #-8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x7, #-4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -11156,8 +11156,8 @@ "ldur s7, [x10, #-4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -11165,15 +11165,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -11181,31 +11181,31 @@ "ldur s6, [x10, #-8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldur s7, [x7, #-8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -11213,31 +11213,31 @@ "ldur s6, [x10, #-4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldur s7, [x7, #-4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -11245,31 +11245,31 @@ "ldr s6, [x7]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x10]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -11277,31 +11277,31 @@ "ldr s6, [x7, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x10, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -11309,31 +11309,31 @@ "ldr s6, [x10]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x7]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -11341,31 +11341,31 @@ "ldr s6, [x10, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x7, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -11373,15 +11373,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -11389,23 +11389,23 @@ "ldr s6, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -11413,31 +11413,31 @@ "ldr s6, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -11445,31 +11445,31 @@ "ldr s6, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -11478,15 +11478,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -11494,23 +11494,23 @@ "ldr s3, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -11518,31 +11518,31 @@ "ldr s3, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -11550,31 +11550,31 @@ "ldr s3, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -11582,95 +11582,95 @@ "ldr s3, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -11678,47 +11678,47 @@ "ldr s5, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -11726,87 +11726,87 @@ "ldr s3, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -11814,39 +11814,39 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -11854,64 +11854,64 @@ "ldr s3, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -11919,31 +11919,31 @@ "ldr s6, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -11951,47 +11951,47 @@ "ldr s5, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -11999,95 +11999,95 @@ "ldr s3, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -12095,47 +12095,47 @@ "ldr s5, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12143,8 +12143,8 @@ "ldr s3, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -12152,16 +12152,16 @@ "ldr s4, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -12169,27 +12169,27 @@ "ldr s4, [x9, #12]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr w9, [x8, #48]", - "ldr q5, [x28, #3744]", + "ldr q5, [x28, #3536]", "eor v4.16b, v4.16b, v5.16b", "ldr s5, [x9, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -12197,8 +12197,8 @@ "ldr s5, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -12206,23 +12206,23 @@ "ldr s6, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -12230,8 +12230,8 @@ "ldr s5, [x9, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -12239,24 +12239,24 @@ "ldr s6, [x9, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr w9, [x8, #48]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -12264,8 +12264,8 @@ "ldr s5, [x9]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -12273,23 +12273,23 @@ "ldr s6, [x9]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -12297,35 +12297,35 @@ "ldr s5, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr w9, [x8, #48]", - "ldr q6, [x28, #3744]", + "ldr q6, [x28, #3536]", "eor v5.16b, v5.16b, v6.16b", "ldr s6, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr w9, [x8, #36]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -12333,8 +12333,8 @@ "ldr s5, [x9]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -12342,23 +12342,23 @@ "ldr s6, [x9]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -12366,8 +12366,8 @@ "ldr s5, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -12375,24 +12375,24 @@ "ldr s6, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr w9, [x8, #112]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -12400,55 +12400,55 @@ "ldr s5, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x6, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x9, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x6, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -12456,31 +12456,31 @@ "ldr s6, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x6, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -12488,31 +12488,31 @@ "ldr s6, [x9, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x6, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -12520,31 +12520,31 @@ "ldr s6, [x9]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x6]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -12552,31 +12552,31 @@ "ldr s6, [x6, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -12584,31 +12584,31 @@ "ldr s6, [x9]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x6]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -12616,8 +12616,8 @@ "ldr s6, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -12625,23 +12625,23 @@ "ldr s7, [x6, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -12649,15 +12649,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -12665,23 +12665,23 @@ "ldr s6, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -12689,31 +12689,31 @@ "ldr s6, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -12721,31 +12721,31 @@ "ldr s6, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -12755,15 +12755,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12771,23 +12771,23 @@ "ldr s3, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12795,31 +12795,31 @@ "ldr s3, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12827,31 +12827,31 @@ "ldr s3, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -12860,95 +12860,95 @@ "ldr s3, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -12956,47 +12956,47 @@ "ldr s5, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -13004,87 +13004,87 @@ "ldr s3, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -13093,8 +13093,8 @@ "ldr s5, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -13102,8 +13102,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -13112,8 +13112,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -13122,16 +13122,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "sub w6, w6, #0x10 (16)", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -13143,8 +13143,8 @@ "ldr s3, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -13152,16 +13152,16 @@ "ldr s4, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -13169,8 +13169,8 @@ "ldr s4, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -13178,16 +13178,16 @@ "ldr s5, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -13199,8 +13199,8 @@ "ldr s5, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -13208,39 +13208,39 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -13248,47 +13248,47 @@ "ldr s5, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -13296,95 +13296,95 @@ "ldr s3, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -13392,47 +13392,47 @@ "ldr s5, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -13811,8 +13811,8 @@ "ldr s2, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -13822,8 +13822,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -13832,23 +13832,23 @@ "ldr s3, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -13856,47 +13856,47 @@ "ldr s2, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -13904,47 +13904,47 @@ "ldr s2, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x9]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -13952,47 +13952,47 @@ "ldr s2, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -14000,8 +14000,8 @@ "ldur s2, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -14014,20 +14014,20 @@ "ldr s3, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "add w22, w20, #0x7 (7)", "and w22, w22, #0x7", "add x23, x28, x22, lsl #4", - "ldr q4, [x28, #3744]", + "ldr q4, [x28, #3536]", "eor v3.16b, v3.16b, v4.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -14035,32 +14035,32 @@ "ldur s3, [x5, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldur s4, [x11, #-8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldur s4, [x11, #-4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -14069,8 +14069,8 @@ "ldur s5, [x5, #-4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -14078,16 +14078,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldur s5, [x11, #-8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -14096,8 +14096,8 @@ "ldur s6, [x5, #-8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -14105,15 +14105,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -14121,31 +14121,31 @@ "ldur s5, [x11, #-4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x5, #-4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -14153,31 +14153,31 @@ "ldr s5, [x11]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x5]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -14185,31 +14185,31 @@ "ldr s5, [x11, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x5, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -14217,31 +14217,31 @@ "ldr s5, [x11]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x5]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -14249,31 +14249,31 @@ "ldr s5, [x11, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x5, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -14281,32 +14281,32 @@ "ldur s5, [x7, #-8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x10, #-8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldur s6, [x7, #-4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -14315,8 +14315,8 @@ "ldur s7, [x10, #-4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -14324,15 +14324,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14340,31 +14340,31 @@ "ldur s6, [x10, #-8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldur s7, [x7, #-8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14372,31 +14372,31 @@ "ldur s6, [x10, #-4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldur s7, [x7, #-4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14404,31 +14404,31 @@ "ldr s6, [x7]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x10]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14436,31 +14436,31 @@ "ldr s6, [x7, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x10, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14468,31 +14468,31 @@ "ldr s6, [x10]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x7]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14500,31 +14500,31 @@ "ldr s6, [x10, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x7, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14532,15 +14532,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14548,23 +14548,23 @@ "ldr s6, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14572,31 +14572,31 @@ "ldr s6, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14604,31 +14604,31 @@ "ldr s6, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -14637,15 +14637,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -14653,23 +14653,23 @@ "ldr s3, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -14677,31 +14677,31 @@ "ldr s3, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -14709,31 +14709,31 @@ "ldr s3, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -14741,95 +14741,95 @@ "ldr s3, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -14837,47 +14837,47 @@ "ldr s5, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -14885,87 +14885,87 @@ "ldr s3, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -14973,39 +14973,39 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -15013,96 +15013,96 @@ "ldr s3, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr w9, [x8, #36]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -15110,47 +15110,47 @@ "ldr s5, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -15158,95 +15158,95 @@ "ldr s3, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -15254,47 +15254,47 @@ "ldr s5, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -15302,8 +15302,8 @@ "ldr s3, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -15311,16 +15311,16 @@ "ldr s4, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -15328,8 +15328,8 @@ "ldr s4, [x9, #12]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -15337,16 +15337,16 @@ "ldr s5, [x9, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -15354,8 +15354,8 @@ "ldr s5, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -15363,24 +15363,24 @@ "ldr s6, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr w9, [x8, #36]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -15388,8 +15388,8 @@ "ldr s5, [x9, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -15397,24 +15397,24 @@ "ldr s6, [x9, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr w9, [x8, #36]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -15422,8 +15422,8 @@ "ldr s5, [x9]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -15431,24 +15431,24 @@ "ldr s6, [x9]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr w9, [x8, #36]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -15456,8 +15456,8 @@ "ldr s5, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -15465,24 +15465,24 @@ "ldr s6, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr w9, [x8, #36]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -15490,8 +15490,8 @@ "ldr s5, [x9]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -15499,24 +15499,24 @@ "ldr s6, [x9]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr w9, [x8, #36]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -15524,8 +15524,8 @@ "ldr s5, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -15533,24 +15533,24 @@ "ldr s6, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr w9, [x8, #112]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -15558,55 +15558,55 @@ "ldr s5, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x6, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x9, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x6, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -15614,31 +15614,31 @@ "ldr s6, [x9, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x6, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -15646,31 +15646,31 @@ "ldr s6, [x9, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x6, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -15678,31 +15678,31 @@ "ldr s6, [x6]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x9]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -15710,31 +15710,31 @@ "ldr s6, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x6, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -15742,31 +15742,31 @@ "ldr s6, [x9]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x6]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -15774,8 +15774,8 @@ "ldr s6, [x9, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -15783,23 +15783,23 @@ "ldr s7, [x6, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -15807,15 +15807,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -15823,23 +15823,23 @@ "ldr s6, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -15847,31 +15847,31 @@ "ldr s6, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -15879,31 +15879,31 @@ "ldr s6, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -15913,15 +15913,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -15929,23 +15929,23 @@ "ldr s3, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -15953,31 +15953,31 @@ "ldr s3, [x8, #68]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #72]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -15985,31 +15985,31 @@ "ldr s3, [x8, #76]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #80]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -16018,95 +16018,95 @@ "ldr s3, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -16114,47 +16114,47 @@ "ldr s5, [x8, #104]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #108]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -16162,87 +16162,87 @@ "ldr s3, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -16250,24 +16250,24 @@ "ldr s5, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -16277,8 +16277,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -16286,8 +16286,8 @@ "add w10, w10, #0x10 (16)", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -16299,8 +16299,8 @@ "ldr s3, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -16308,16 +16308,16 @@ "ldr s4, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -16325,8 +16325,8 @@ "ldr s4, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -16334,16 +16334,16 @@ "ldr s5, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -16351,8 +16351,8 @@ "ldr s5, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -16365,8 +16365,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -16374,31 +16374,31 @@ "ldr s6, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -16406,47 +16406,47 @@ "ldr s5, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s3, s0", @@ -16454,95 +16454,95 @@ "ldr s3, [x8, #84]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #88]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #92]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #96]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s5, s0", @@ -16550,47 +16550,47 @@ "ldr s5, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -17032,8 +17032,8 @@ "ldr s2, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17041,16 +17041,16 @@ "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17058,8 +17058,8 @@ "ldr s3, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17067,24 +17067,24 @@ "ldr s4, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17092,8 +17092,8 @@ "ldr s3, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17101,24 +17101,24 @@ "ldr s4, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17126,8 +17126,8 @@ "ldr s3, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17135,31 +17135,31 @@ "ldr s4, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -17168,8 +17168,8 @@ "ldr s2, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17177,16 +17177,16 @@ "ldr s3, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17194,8 +17194,8 @@ "ldr s3, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17203,24 +17203,24 @@ "ldr s4, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17228,8 +17228,8 @@ "ldr s3, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17237,24 +17237,24 @@ "ldr s4, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17262,8 +17262,8 @@ "ldr s3, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17271,31 +17271,31 @@ "ldr s4, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -17304,8 +17304,8 @@ "ldr s2, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17313,16 +17313,16 @@ "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17330,8 +17330,8 @@ "ldr s3, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17339,24 +17339,24 @@ "ldr s4, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17364,8 +17364,8 @@ "ldr s3, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17373,24 +17373,24 @@ "ldr s4, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17398,8 +17398,8 @@ "ldr s3, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17407,31 +17407,31 @@ "ldr s4, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -17440,8 +17440,8 @@ "ldr s2, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17449,16 +17449,16 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17466,8 +17466,8 @@ "ldr s3, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17475,24 +17475,24 @@ "ldr s4, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17500,8 +17500,8 @@ "ldr s3, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17509,24 +17509,24 @@ "ldr s4, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17534,8 +17534,8 @@ "ldr s3, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17543,31 +17543,31 @@ "ldr s4, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -17576,8 +17576,8 @@ "ldr s2, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17585,16 +17585,16 @@ "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17602,8 +17602,8 @@ "ldr s3, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17611,24 +17611,24 @@ "ldr s4, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17636,8 +17636,8 @@ "ldr s3, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17645,24 +17645,24 @@ "ldr s4, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17670,8 +17670,8 @@ "ldr s3, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17679,31 +17679,31 @@ "ldr s4, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -17712,8 +17712,8 @@ "ldr s2, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17721,16 +17721,16 @@ "ldr s3, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17738,8 +17738,8 @@ "ldr s3, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17747,24 +17747,24 @@ "ldr s4, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17772,8 +17772,8 @@ "ldr s3, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17781,24 +17781,24 @@ "ldr s4, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17806,8 +17806,8 @@ "ldr s3, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17815,31 +17815,31 @@ "ldr s4, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -17848,8 +17848,8 @@ "ldr s2, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17857,16 +17857,16 @@ "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17874,8 +17874,8 @@ "ldr s3, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17883,24 +17883,24 @@ "ldr s4, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17908,8 +17908,8 @@ "ldr s3, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17917,24 +17917,24 @@ "ldr s4, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17942,8 +17942,8 @@ "ldr s3, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -17951,31 +17951,31 @@ "ldr s4, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -17984,8 +17984,8 @@ "ldr s2, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -17993,16 +17993,16 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18010,8 +18010,8 @@ "ldr s3, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18019,24 +18019,24 @@ "ldr s4, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18044,8 +18044,8 @@ "ldr s3, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18053,24 +18053,24 @@ "ldr s4, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18078,8 +18078,8 @@ "ldr s3, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18087,31 +18087,31 @@ "ldr s4, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -18120,8 +18120,8 @@ "ldr s2, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18129,16 +18129,16 @@ "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18146,8 +18146,8 @@ "ldr s3, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18155,24 +18155,24 @@ "ldr s4, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18180,8 +18180,8 @@ "ldr s3, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18189,24 +18189,24 @@ "ldr s4, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18214,8 +18214,8 @@ "ldr s3, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18223,31 +18223,31 @@ "ldr s4, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -18256,8 +18256,8 @@ "ldr s2, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18265,16 +18265,16 @@ "ldr s3, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18282,8 +18282,8 @@ "ldr s3, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18291,24 +18291,24 @@ "ldr s4, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18316,8 +18316,8 @@ "ldr s3, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18325,24 +18325,24 @@ "ldr s4, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18350,8 +18350,8 @@ "ldr s3, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18359,31 +18359,31 @@ "ldr s4, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -18392,8 +18392,8 @@ "ldr s2, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18401,16 +18401,16 @@ "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18418,8 +18418,8 @@ "ldr s3, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18427,24 +18427,24 @@ "ldr s4, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18452,8 +18452,8 @@ "ldr s3, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18461,24 +18461,24 @@ "ldr s4, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18486,8 +18486,8 @@ "ldr s3, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18495,24 +18495,24 @@ "ldr s4, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -18520,8 +18520,8 @@ "ldr s3, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18529,16 +18529,16 @@ "ldr s4, [x4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18546,8 +18546,8 @@ "ldr s4, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -18555,24 +18555,24 @@ "ldr s5, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18580,8 +18580,8 @@ "ldr s4, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -18589,24 +18589,24 @@ "ldr s5, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18614,8 +18614,8 @@ "ldr s4, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -18623,24 +18623,24 @@ "ldr s5, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -18648,8 +18648,8 @@ "ldr s4, [x4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -18657,16 +18657,16 @@ "ldr s5, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -18674,8 +18674,8 @@ "ldr s5, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -18683,24 +18683,24 @@ "ldr s6, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -18708,8 +18708,8 @@ "ldr s5, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -18717,24 +18717,24 @@ "ldr s6, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -18742,8 +18742,8 @@ "ldr s5, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -18751,24 +18751,24 @@ "ldr s6, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -18776,8 +18776,8 @@ "ldr s5, [x4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -18785,16 +18785,16 @@ "ldr s6, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -18802,8 +18802,8 @@ "ldr s6, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -18811,24 +18811,24 @@ "ldr s7, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -18836,8 +18836,8 @@ "ldr s6, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -18845,24 +18845,24 @@ "ldr s7, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -18870,8 +18870,8 @@ "ldr s6, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -18879,24 +18879,24 @@ "ldr s7, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -18904,8 +18904,8 @@ "ldr s6, [x4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -18913,16 +18913,16 @@ "ldr s7, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -18930,8 +18930,8 @@ "ldr s7, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -18939,24 +18939,24 @@ "ldr s8, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -18964,8 +18964,8 @@ "ldr s7, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -18973,24 +18973,24 @@ "ldr s8, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -18998,8 +18998,8 @@ "ldr s7, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -19007,24 +19007,24 @@ "ldr s8, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -19032,8 +19032,8 @@ "ldr s7, [x4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -19041,16 +19041,16 @@ "ldr s8, [x4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -19058,8 +19058,8 @@ "ldr s8, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -19067,24 +19067,24 @@ "ldr s9, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -19092,8 +19092,8 @@ "ldr s8, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -19101,24 +19101,24 @@ "ldr s9, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -19126,8 +19126,8 @@ "ldr s8, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -19135,24 +19135,24 @@ "ldr s9, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -19179,8 +19179,8 @@ "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -19188,8 +19188,8 @@ "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -19197,32 +19197,32 @@ "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -19669,8 +19669,8 @@ "ldr s2, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -19678,16 +19678,16 @@ "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -19695,8 +19695,8 @@ "ldr s3, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -19704,24 +19704,24 @@ "ldr s4, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -19729,8 +19729,8 @@ "ldr s3, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -19738,24 +19738,24 @@ "ldr s4, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -19763,8 +19763,8 @@ "ldr s3, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -19772,31 +19772,31 @@ "ldr s4, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -19805,8 +19805,8 @@ "ldr s2, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -19814,16 +19814,16 @@ "ldr s3, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -19831,8 +19831,8 @@ "ldr s3, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -19840,24 +19840,24 @@ "ldr s4, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -19865,8 +19865,8 @@ "ldr s3, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -19874,24 +19874,24 @@ "ldr s4, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -19899,8 +19899,8 @@ "ldr s3, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -19908,31 +19908,31 @@ "ldr s4, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -19941,8 +19941,8 @@ "ldr s2, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -19950,16 +19950,16 @@ "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -19967,8 +19967,8 @@ "ldr s3, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -19976,24 +19976,24 @@ "ldr s4, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20001,8 +20001,8 @@ "ldr s3, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20010,24 +20010,24 @@ "ldr s4, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20035,8 +20035,8 @@ "ldr s3, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20044,31 +20044,31 @@ "ldr s4, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -20077,8 +20077,8 @@ "ldr s2, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20086,16 +20086,16 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20103,8 +20103,8 @@ "ldr s3, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20112,24 +20112,24 @@ "ldr s4, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20137,8 +20137,8 @@ "ldr s3, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20146,24 +20146,24 @@ "ldr s4, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20171,8 +20171,8 @@ "ldr s3, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20180,31 +20180,31 @@ "ldr s4, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -20213,8 +20213,8 @@ "ldr s2, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20222,16 +20222,16 @@ "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20239,8 +20239,8 @@ "ldr s3, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20248,24 +20248,24 @@ "ldr s4, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20273,8 +20273,8 @@ "ldr s3, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20282,24 +20282,24 @@ "ldr s4, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20307,8 +20307,8 @@ "ldr s3, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20316,31 +20316,31 @@ "ldr s4, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -20349,8 +20349,8 @@ "ldr s2, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20358,16 +20358,16 @@ "ldr s3, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20375,8 +20375,8 @@ "ldr s3, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20384,24 +20384,24 @@ "ldr s4, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20409,8 +20409,8 @@ "ldr s3, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20418,24 +20418,24 @@ "ldr s4, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20443,8 +20443,8 @@ "ldr s3, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20452,31 +20452,31 @@ "ldr s4, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -20485,8 +20485,8 @@ "ldr s2, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20494,16 +20494,16 @@ "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20511,8 +20511,8 @@ "ldr s3, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20520,24 +20520,24 @@ "ldr s4, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20545,8 +20545,8 @@ "ldr s3, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20554,24 +20554,24 @@ "ldr s4, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20579,8 +20579,8 @@ "ldr s3, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20588,31 +20588,31 @@ "ldr s4, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -20621,8 +20621,8 @@ "ldr s2, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20630,16 +20630,16 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20647,8 +20647,8 @@ "ldr s3, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20656,24 +20656,24 @@ "ldr s4, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20681,8 +20681,8 @@ "ldr s3, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20690,24 +20690,24 @@ "ldr s4, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20715,8 +20715,8 @@ "ldr s3, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20724,31 +20724,31 @@ "ldr s4, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -20757,8 +20757,8 @@ "ldr s2, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20766,16 +20766,16 @@ "ldr s3, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20783,8 +20783,8 @@ "ldr s3, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20792,24 +20792,24 @@ "ldr s4, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20817,8 +20817,8 @@ "ldr s3, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20826,24 +20826,24 @@ "ldr s4, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20851,8 +20851,8 @@ "ldr s3, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20860,31 +20860,31 @@ "ldr s4, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -20893,8 +20893,8 @@ "ldr s2, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20902,16 +20902,16 @@ "ldr s3, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20919,8 +20919,8 @@ "ldr s3, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20928,24 +20928,24 @@ "ldr s4, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20953,8 +20953,8 @@ "ldr s3, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20962,24 +20962,24 @@ "ldr s4, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -20987,8 +20987,8 @@ "ldr s3, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -20996,31 +20996,31 @@ "ldr s4, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21029,8 +21029,8 @@ "ldr s2, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -21038,16 +21038,16 @@ "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -21055,8 +21055,8 @@ "ldr s3, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -21064,24 +21064,24 @@ "ldr s4, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -21089,8 +21089,8 @@ "ldr s3, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -21098,24 +21098,24 @@ "ldr s4, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -21123,8 +21123,8 @@ "ldr s3, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -21132,24 +21132,24 @@ "ldr s4, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -21157,8 +21157,8 @@ "ldr s3, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -21166,16 +21166,16 @@ "ldr s4, [x4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -21183,8 +21183,8 @@ "ldr s4, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -21192,24 +21192,24 @@ "ldr s5, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -21217,8 +21217,8 @@ "ldr s4, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -21226,24 +21226,24 @@ "ldr s5, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -21251,8 +21251,8 @@ "ldr s4, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -21260,24 +21260,24 @@ "ldr s5, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -21285,8 +21285,8 @@ "ldr s4, [x4]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -21294,16 +21294,16 @@ "ldr s5, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -21311,8 +21311,8 @@ "ldr s5, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -21320,24 +21320,24 @@ "ldr s6, [x4, #28]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -21345,8 +21345,8 @@ "ldr s5, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -21354,24 +21354,24 @@ "ldr s6, [x4, #44]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -21379,8 +21379,8 @@ "ldr s5, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -21388,24 +21388,24 @@ "ldr s6, [x4, #60]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -21413,8 +21413,8 @@ "ldr s5, [x4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -21422,16 +21422,16 @@ "ldr s6, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -21439,8 +21439,8 @@ "ldr s6, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -21448,24 +21448,24 @@ "ldr s7, [x4, #24]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -21473,8 +21473,8 @@ "ldr s6, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -21482,24 +21482,24 @@ "ldr s7, [x4, #40]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -21507,8 +21507,8 @@ "ldr s6, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -21516,24 +21516,24 @@ "ldr s7, [x4, #56]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -21541,8 +21541,8 @@ "ldr s6, [x4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -21550,16 +21550,16 @@ "ldr s7, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -21567,8 +21567,8 @@ "ldr s7, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -21576,24 +21576,24 @@ "ldr s8, [x4, #20]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -21601,8 +21601,8 @@ "ldr s7, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -21610,24 +21610,24 @@ "ldr s8, [x4, #36]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -21635,8 +21635,8 @@ "ldr s7, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -21644,24 +21644,24 @@ "ldr s8, [x4, #52]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -21669,8 +21669,8 @@ "ldr s7, [x4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -21678,16 +21678,16 @@ "ldr s8, [x4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -21695,8 +21695,8 @@ "ldr s8, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -21704,24 +21704,24 @@ "ldr s9, [x4, #16]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -21729,8 +21729,8 @@ "ldr s8, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -21738,24 +21738,24 @@ "ldr s9, [x4, #32]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -21763,8 +21763,8 @@ "ldr s8, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -21772,24 +21772,24 @@ "ldr s9, [x4, #48]", "str x30, [sp, #-16]!", "fmov s0, s9", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v9.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v8.16b", "mov v1.16b, v9.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -21816,8 +21816,8 @@ "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21825,8 +21825,8 @@ "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -21834,32 +21834,32 @@ "strb wzr, [x28, #1049]", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -22111,8 +22111,8 @@ "ldr s2, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -22122,8 +22122,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -22133,24 +22133,24 @@ "ldr s3, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -22160,8 +22160,8 @@ "ldr s4, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -22169,32 +22169,32 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -22203,8 +22203,8 @@ "ldr s5, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -22212,31 +22212,31 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -22244,47 +22244,47 @@ "ldr s4, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -22293,8 +22293,8 @@ "ldur s4, [x13, #-8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -22302,16 +22302,16 @@ "ldr s5, [x13]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -22319,30 +22319,30 @@ "ldur s5, [x13, #-4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "add w22, w22, #0x7 (7)", "and w22, w22, #0x7", "add x13, x28, x22, lsl #4", - "ldr q6, [x28, #3744]", + "ldr q6, [x28, #3536]", "eor v5.16b, v5.16b, v6.16b", "add w14, w4, w10, lsl #2", "ldur s6, [x14, #-4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -22350,8 +22350,8 @@ "ldr s6, [x14]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -22361,8 +22361,8 @@ "ldur s7, [x14, #-8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -22370,15 +22370,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -22387,8 +22387,8 @@ "ldur s6, [x15, #-4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -22396,23 +22396,23 @@ "ldur s7, [x15, #-4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -22421,8 +22421,8 @@ "ldur s6, [x15, #-8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -22430,16 +22430,16 @@ "ldur s7, [x15, #-8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -22447,8 +22447,8 @@ "ldur s7, [x15, #-4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -22458,8 +22458,8 @@ "ldur s8, [x15, #-4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -22467,15 +22467,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -22484,8 +22484,8 @@ "ldur s7, [x15, #-8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -22493,23 +22493,23 @@ "ldur s8, [x15, #-8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -22518,8 +22518,8 @@ "ldur s7, [x15, #-4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -22527,23 +22527,23 @@ "ldur s8, [x15, #-4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -22551,16 +22551,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "add w15, w4, w6, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -22568,24 +22568,24 @@ "ldr s7, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "add w15, w4, w7, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -22594,16 +22594,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w5, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -22611,24 +22611,24 @@ "ldr s4, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w5, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -22636,80 +22636,80 @@ "ldr s4, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "add w15, w4, w10, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -22717,32 +22717,32 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w10, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -22750,96 +22750,96 @@ "ldr s4, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "add w15, w4, w11, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -22847,48 +22847,48 @@ "ldr s6, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w11, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -22897,8 +22897,8 @@ "ldr s4, [x15]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -22906,16 +22906,16 @@ "ldr s5, [x15]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -22923,27 +22923,27 @@ "ldr s5, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", - "ldr q6, [x28, #3744]", + "ldr q6, [x28, #3536]", "eor v5.16b, v5.16b, v6.16b", "add w15, w4, w10, lsl #2", "ldr s6, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -22951,8 +22951,8 @@ "ldr s6, [x15]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -22960,23 +22960,23 @@ "ldr s7, [x15]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -22985,8 +22985,8 @@ "ldr s6, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -22994,23 +22994,23 @@ "ldr s7, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -23019,8 +23019,8 @@ "ldr s6, [x15]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -23028,16 +23028,16 @@ "ldr s7, [x15]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -23045,8 +23045,8 @@ "ldr s7, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -23054,23 +23054,23 @@ "ldr s8, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -23079,8 +23079,8 @@ "ldr s7, [x15]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -23088,23 +23088,23 @@ "ldr s8, [x15]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -23113,8 +23113,8 @@ "ldr s7, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -23122,23 +23122,23 @@ "ldr s8, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -23146,16 +23146,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "add w15, w4, w7, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -23163,24 +23163,24 @@ "ldr s7, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "add w15, w4, w7, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -23189,16 +23189,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w5, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -23206,24 +23206,24 @@ "ldr s4, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w5, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -23231,80 +23231,80 @@ "ldr s4, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "add w15, w4, w10, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -23312,32 +23312,32 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w10, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -23345,82 +23345,82 @@ "ldr s4, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", - "ldr q7, [x28, #3744]", + "ldr q7, [x28, #3536]", "eor v6.16b, v6.16b, v7.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "add w15, w4, w11, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -23429,24 +23429,24 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w11, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -23455,8 +23455,8 @@ "ldr s4, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -23464,16 +23464,16 @@ "ldr s5, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -23481,27 +23481,27 @@ "ldr s5, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", - "ldr q6, [x28, #3744]", + "ldr q6, [x28, #3536]", "eor v5.16b, v5.16b, v6.16b", "add w15, w4, w10, lsl #2", "ldr s6, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -23509,8 +23509,8 @@ "ldr s6, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -23518,23 +23518,23 @@ "ldr s7, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -23543,8 +23543,8 @@ "ldr s6, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -23552,23 +23552,23 @@ "ldr s7, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -23577,8 +23577,8 @@ "ldr s6, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -23586,16 +23586,16 @@ "ldr s7, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -23603,8 +23603,8 @@ "ldr s7, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -23612,23 +23612,23 @@ "ldr s8, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -23637,8 +23637,8 @@ "ldr s7, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -23646,23 +23646,23 @@ "ldr s8, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -23671,8 +23671,8 @@ "ldr s7, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -23680,23 +23680,23 @@ "ldr s8, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -23704,16 +23704,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "add w15, w4, w7, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -23721,24 +23721,24 @@ "ldr s7, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "add w15, w4, w7, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -23747,16 +23747,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w5, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -23764,24 +23764,24 @@ "ldr s4, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w5, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -23789,80 +23789,80 @@ "ldr s4, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "add w15, w4, w10, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -23871,8 +23871,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -23880,16 +23880,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -23897,8 +23897,8 @@ "add w15, w4, w10, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -23908,96 +23908,96 @@ "ldr s2, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w11, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -24005,48 +24005,48 @@ "ldr s4, [x8, #40]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w11, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -24304,8 +24304,8 @@ "ldr s2, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -24315,8 +24315,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -24326,24 +24326,24 @@ "ldr s3, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #52]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -24353,8 +24353,8 @@ "ldr s4, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -24362,32 +24362,32 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #116]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #56]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -24396,8 +24396,8 @@ "ldr s5, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -24405,31 +24405,31 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -24437,47 +24437,47 @@ "ldr s4, [x8, #60]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #120]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -24486,8 +24486,8 @@ "ldur s4, [x13, #-8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -24495,16 +24495,16 @@ "ldr s5, [x13]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -24512,8 +24512,8 @@ "ldur s5, [x13, #-4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -24523,8 +24523,8 @@ "ldur s6, [x13, #-4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -24532,8 +24532,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -24541,8 +24541,8 @@ "ldr s6, [x14]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -24552,8 +24552,8 @@ "ldur s7, [x14, #-8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -24561,15 +24561,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -24578,8 +24578,8 @@ "ldur s6, [x15, #-4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -24587,23 +24587,23 @@ "ldur s7, [x15, #-4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -24612,8 +24612,8 @@ "ldur s6, [x15, #-8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -24621,16 +24621,16 @@ "ldur s7, [x15, #-8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -24638,8 +24638,8 @@ "ldur s7, [x15, #-4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -24649,8 +24649,8 @@ "ldur s8, [x15, #-4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", @@ -24658,15 +24658,15 @@ "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -24675,8 +24675,8 @@ "ldur s7, [x15, #-8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -24684,23 +24684,23 @@ "ldur s8, [x15, #-8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -24709,8 +24709,8 @@ "ldur s7, [x15, #-4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -24718,23 +24718,23 @@ "ldur s8, [x15, #-4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -24742,16 +24742,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "add w15, w4, w6, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -24759,24 +24759,24 @@ "ldr s7, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "add w15, w4, w7, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -24785,16 +24785,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w5, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -24802,24 +24802,24 @@ "ldr s4, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w5, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -24827,80 +24827,80 @@ "ldr s4, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "add w15, w4, w10, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -24908,32 +24908,32 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w10, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -24941,96 +24941,96 @@ "ldr s4, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "add w15, w4, w11, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -25038,48 +25038,48 @@ "ldr s6, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w11, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -25088,8 +25088,8 @@ "ldr s4, [x15]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -25097,16 +25097,16 @@ "ldr s5, [x15]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -25114,8 +25114,8 @@ "ldr s5, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -25123,16 +25123,16 @@ "ldr s6, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -25140,8 +25140,8 @@ "ldr s6, [x15]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -25149,23 +25149,23 @@ "ldr s7, [x15]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -25174,8 +25174,8 @@ "ldr s6, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -25183,23 +25183,23 @@ "ldr s7, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -25208,8 +25208,8 @@ "ldr s6, [x15]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -25217,16 +25217,16 @@ "ldr s7, [x15]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -25234,8 +25234,8 @@ "ldr s7, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -25243,23 +25243,23 @@ "ldr s8, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -25268,8 +25268,8 @@ "ldr s7, [x15]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -25277,23 +25277,23 @@ "ldr s8, [x15]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -25302,8 +25302,8 @@ "ldr s7, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -25311,23 +25311,23 @@ "ldr s8, [x15, #4]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -25335,16 +25335,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "add w15, w4, w7, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -25352,24 +25352,24 @@ "ldr s7, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "add w15, w4, w7, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -25378,16 +25378,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w5, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -25395,24 +25395,24 @@ "ldr s4, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w5, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -25420,80 +25420,80 @@ "ldr s4, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "ldr s7, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "add w15, w4, w10, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -25501,32 +25501,32 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w10, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -25534,82 +25534,82 @@ "ldr s4, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #64]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", - "ldr q7, [x28, #3744]", + "ldr q7, [x28, #3536]", "eor v6.16b, v6.16b, v7.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "add w15, w4, w11, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -25618,24 +25618,24 @@ "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w11, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -25644,8 +25644,8 @@ "ldr s4, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -25653,16 +25653,16 @@ "ldr s5, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", @@ -25670,8 +25670,8 @@ "ldr s5, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -25679,16 +25679,16 @@ "ldr s6, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -25696,8 +25696,8 @@ "ldr s6, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -25705,23 +25705,23 @@ "ldr s7, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -25730,8 +25730,8 @@ "ldr s6, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -25739,23 +25739,23 @@ "ldr s7, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s6, s0", @@ -25764,8 +25764,8 @@ "ldr s6, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -25773,16 +25773,16 @@ "ldr s7, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", @@ -25790,8 +25790,8 @@ "ldr s7, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -25799,23 +25799,23 @@ "ldr s8, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -25824,8 +25824,8 @@ "ldr s7, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -25833,23 +25833,23 @@ "ldr s8, [x15, #8]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -25858,8 +25858,8 @@ "ldr s7, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", @@ -25867,23 +25867,23 @@ "ldr s8, [x15, #12]", "str x30, [sp, #-16]!", "fmov s0, s8", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v8.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v8.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -25891,16 +25891,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "add w15, w4, w7, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -25908,24 +25908,24 @@ "ldr s7, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s7", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "add w15, w4, w7, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v7.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s7, s0", @@ -25934,16 +25934,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w5, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -25951,24 +25951,24 @@ "ldr s4, [x8, #16]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w5, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -25976,80 +25976,80 @@ "ldr s4, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "ldr s6, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s6", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v6.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v7.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", "mov v1.16b, v7.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v6.16b, v0.16b", "add w15, w4, w10, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v6.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -26058,8 +26058,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -26067,16 +26067,16 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -26084,8 +26084,8 @@ "add w15, w4, w10, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -26095,96 +26095,96 @@ "ldr s2, [x8, #20]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #24]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x8, #28]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #32]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w11, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s4, s0", @@ -26192,48 +26192,48 @@ "ldr s4, [x8, #44]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x8, #48]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v5.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", "mov v1.16b, v5.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "add w15, w4, w11, lsl #2", "str x30, [sp, #-16]!", "mov v0.16b, v4.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s8, s0", @@ -26694,8 +26694,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -26704,23 +26704,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -26730,8 +26730,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -26740,23 +26740,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -26768,8 +26768,8 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -26778,23 +26778,23 @@ "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -26806,8 +26806,8 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -26816,23 +26816,23 @@ "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -26850,8 +26850,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -26860,23 +26860,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -26886,8 +26886,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -26896,23 +26896,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -26924,8 +26924,8 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -26934,23 +26934,23 @@ "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -26962,8 +26962,8 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -26972,23 +26972,23 @@ "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -26998,8 +26998,8 @@ "ldur s2, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27008,24 +27008,24 @@ "ldr s3, [x20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -27034,31 +27034,31 @@ "ldr s4, [x21]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27068,8 +27068,8 @@ "ldur s2, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27078,55 +27078,55 @@ "ldr s3, [x22]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27136,8 +27136,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27146,23 +27146,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27172,8 +27172,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27182,23 +27182,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27210,8 +27210,8 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27220,23 +27220,23 @@ "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27248,8 +27248,8 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27258,23 +27258,23 @@ "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27284,24 +27284,24 @@ "ldur s2, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27310,23 +27310,23 @@ "ldr s3, [x23]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27336,47 +27336,47 @@ "ldur s2, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x23]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27386,8 +27386,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27396,23 +27396,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27422,8 +27422,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27432,23 +27432,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27460,8 +27460,8 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27470,23 +27470,23 @@ "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27498,8 +27498,8 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27508,23 +27508,23 @@ "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27534,32 +27534,32 @@ "ldur s2, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x22]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -27568,31 +27568,31 @@ "ldr s4, [x12]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27602,63 +27602,63 @@ "ldur s2, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x22]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27668,8 +27668,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27678,23 +27678,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27704,8 +27704,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27714,23 +27714,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27742,8 +27742,8 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27752,23 +27752,23 @@ "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27780,8 +27780,8 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27790,23 +27790,23 @@ "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27824,8 +27824,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27834,23 +27834,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27860,8 +27860,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27870,23 +27870,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27898,8 +27898,8 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27908,23 +27908,23 @@ "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27936,8 +27936,8 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -27946,23 +27946,23 @@ "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -27972,63 +27972,63 @@ "ldur s2, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x22]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -28038,63 +28038,63 @@ "ldur s2, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x22]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x12]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -28104,8 +28104,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -28114,23 +28114,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -28140,8 +28140,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -28150,23 +28150,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -28178,8 +28178,8 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -28188,23 +28188,23 @@ "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -28216,8 +28216,8 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -28226,23 +28226,23 @@ "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -28252,47 +28252,47 @@ "ldur s2, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x23]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -28302,47 +28302,47 @@ "ldur s2, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x23]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -28351,8 +28351,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -28361,23 +28361,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -28387,8 +28387,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -28397,23 +28397,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -28425,8 +28425,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -28434,23 +28434,23 @@ "ldr s3, [x4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -28462,8 +28462,8 @@ "ldr s2, [x5]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -28472,23 +28472,23 @@ "ldr s3, [x5]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -28496,64 +28496,64 @@ "ldur s2, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x22]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x20]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr w4, [x9, #8]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -28565,63 +28565,63 @@ "ldur s2, [x9, #-4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x20]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldur s3, [x9, #-8]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x21]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v4.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", diff --git a/unittests/InstructionCountCI/FlagM/x87.json b/unittests/InstructionCountCI/FlagM/x87.json index ddb89f012a..6c6dfa1160 100644 --- a/unittests/InstructionCountCI/FlagM/x87.json +++ b/unittests/InstructionCountCI/FlagM/x87.json @@ -11,7 +11,7 @@ "CSSC", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "fadd dword [rax]": { @@ -23,8 +23,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -34,8 +34,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -51,8 +51,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -62,8 +62,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -79,8 +79,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -90,8 +90,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -118,8 +118,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -129,8 +129,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -165,8 +165,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -176,8 +176,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -193,8 +193,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -204,8 +204,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -221,8 +221,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -232,8 +232,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -249,8 +249,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -260,8 +260,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -280,8 +280,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -304,8 +304,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -328,8 +328,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -352,8 +352,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -376,8 +376,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -400,8 +400,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -424,8 +424,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -448,8 +448,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -468,8 +468,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -492,8 +492,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -516,8 +516,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -540,8 +540,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -564,8 +564,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -588,8 +588,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -612,8 +612,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -636,8 +636,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -656,8 +656,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -691,8 +691,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -726,8 +726,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -761,8 +761,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -796,8 +796,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -831,8 +831,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -866,8 +866,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -901,8 +901,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -932,8 +932,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -975,8 +975,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x22, x0", @@ -1016,8 +1016,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -1059,8 +1059,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -1102,8 +1102,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -1145,8 +1145,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -1188,8 +1188,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -1231,8 +1231,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -1270,8 +1270,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1294,8 +1294,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1318,8 +1318,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1342,8 +1342,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1366,8 +1366,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1390,8 +1390,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1414,8 +1414,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1438,8 +1438,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1458,8 +1458,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1482,8 +1482,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1506,8 +1506,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1530,8 +1530,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1554,8 +1554,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1578,8 +1578,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1602,8 +1602,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1626,8 +1626,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1646,8 +1646,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1670,8 +1670,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1694,8 +1694,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1718,8 +1718,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1742,8 +1742,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1766,8 +1766,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1790,8 +1790,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1814,8 +1814,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1834,8 +1834,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1858,8 +1858,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1882,8 +1882,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1906,8 +1906,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1930,8 +1930,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1954,8 +1954,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1978,8 +1978,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2002,8 +2002,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2019,8 +2019,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2048,8 +2048,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2067,8 +2067,8 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2129,7 +2129,7 @@ ] }, "fnstenv [rax]": { - "ExpectedInstructionCount": 29, + "ExpectedInstructionCount": 30, "Comment": [ "0xd9 !11b /6" ], @@ -2159,7 +2159,8 @@ "orr w20, w20, w20, lsl #1", "eor w20, w20, #0xffff", "str w20, [x4, #8]", - "str wzr, [x4, #12]", + "ldr x20, [x28, #1208]", + "str w20, [x4, #12]", "str wzr, [x4, #16]", "str wzr, [x4, #20]", "str wzr, [x4, #24]" @@ -2554,7 +2555,7 @@ "ldrb w20, [x28, #1051]", "add x20, x28, x20, lsl #4", "ldr q2, [x20, #1056]", - "ldr q3, [x28, #3744]", + "ldr q3, [x28, #3536]", "eor v2.16b, v2.16b, v3.16b", "str q2, [x20, #1056]" ] @@ -2568,7 +2569,7 @@ "ldrb w20, [x28, #1051]", "add x20, x28, x20, lsl #4", "ldr q2, [x20, #1056]", - "ldr q3, [x28, #3744]", + "ldr q3, [x28, #3536]", "bic v2.16b, v2.16b, v3.16b", "str q2, [x20, #1056]" ] @@ -2587,8 +2588,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -2680,7 +2681,7 @@ "0xd9 11b 0xe8 /5" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3520]", + "ldr q2, [x28, #3312]", "ldrb w20, [x28, #1051]", "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", @@ -2700,7 +2701,7 @@ "0xd9 11b 0xe9 /5" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3536]", + "ldr q2, [x28, #3328]", "ldrb w20, [x28, #1051]", "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", @@ -2720,7 +2721,7 @@ "0xd9 11b 0xea /5" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3552]", + "ldr q2, [x28, #3344]", "ldrb w20, [x28, #1051]", "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", @@ -2740,7 +2741,7 @@ "0xd9 11b 0xeb /5" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3568]", + "ldr q2, [x28, #3360]", "ldrb w20, [x28, #1051]", "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", @@ -2760,7 +2761,7 @@ "0xd9 11b 0xec /5" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3584]", + "ldr q2, [x28, #3376]", "ldrb w20, [x28, #1051]", "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", @@ -2780,7 +2781,7 @@ "0xd9 11b 0xed /5" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3600]", + "ldr q2, [x28, #3392]", "ldrb w20, [x28, #1051]", "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", @@ -2825,8 +2826,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1872]", - "ldr x3, [x28, #1880]", + "ldr x0, [x28, #1672]", + "ldr x3, [x28, #1680]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2849,8 +2850,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2096]", - "ldr x3, [x28, #2104]", + "ldr x0, [x28, #1896]", + "ldr x3, [x28, #1904]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2874,12 +2875,12 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1888]", - "ldr x3, [x28, #1896]", + "ldr x0, [x28, #1688]", + "ldr x3, [x28, #1696]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q3, [x28, #3520]", + "ldr q3, [x28, #3312]", "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", "strb wzr, [x28, #1050]", @@ -2910,8 +2911,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2128]", - "ldr x3, [x28, #2136]", + "ldr x0, [x28, #1928]", + "ldr x3, [x28, #1936]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2935,15 +2936,15 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1968]", - "ldr x3, [x28, #1976]", + "ldr x0, [x28, #1768]", + "ldr x3, [x28, #1776]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1984]", - "ldr x3, [x28, #1992]", + "ldr x0, [x28, #1784]", + "ldr x3, [x28, #1792]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2978,8 +2979,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2144]", - "ldr x3, [x28, #2152]", + "ldr x0, [x28, #1944]", + "ldr x3, [x28, #1952]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3029,8 +3030,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2160]", - "ldr x3, [x28, #2168]", + "ldr x0, [x28, #1960]", + "ldr x3, [x28, #1968]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3054,8 +3055,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2112]", - "ldr x3, [x28, #2120]", + "ldr x0, [x28, #1912]", + "ldr x3, [x28, #1920]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3079,8 +3080,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1904]", - "ldr x3, [x28, #1912]", + "ldr x0, [x28, #1704]", + "ldr x3, [x28, #1712]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3098,8 +3099,8 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1952]", - "ldr x3, [x28, #1960]", + "ldr x0, [x28, #1752]", + "ldr x3, [x28, #1760]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -3129,8 +3130,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1856]", - "ldr x3, [x28, #1864]", + "ldr x0, [x28, #1656]", + "ldr x3, [x28, #1664]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3153,8 +3154,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2176]", - "ldr x3, [x28, #2184]", + "ldr x0, [x28, #1976]", + "ldr x3, [x28, #1984]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3172,8 +3173,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1920]", - "ldr x3, [x28, #1928]", + "ldr x0, [x28, #1720]", + "ldr x3, [x28, #1728]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3192,8 +3193,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1936]", - "ldr x3, [x28, #1944]", + "ldr x0, [x28, #1736]", + "ldr x3, [x28, #1744]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3210,8 +3211,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3221,8 +3222,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3238,8 +3239,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3249,8 +3250,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3266,8 +3267,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3277,8 +3278,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -3305,8 +3306,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3316,8 +3317,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -3352,8 +3353,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3363,8 +3364,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3380,8 +3381,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3391,8 +3392,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3408,8 +3409,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3419,8 +3420,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3436,8 +3437,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3447,8 +3448,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4087,8 +4088,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -4168,8 +4169,8 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1776]", - "ldr x3, [x28, #1784]", + "ldr x0, [x28, #1576]", + "ldr x3, [x28, #1584]", "blr x0", "ldr x30, [sp], #16", "mov w21, w0", @@ -4195,8 +4196,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1728]", - "ldr x3, [x28, #1736]", + "ldr x0, [x28, #1528]", + "ldr x3, [x28, #1536]", "blr x0", "ldr x30, [sp], #16", "mov w20, w0", @@ -4214,8 +4215,8 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1728]", - "ldr x3, [x28, #1736]", + "ldr x0, [x28, #1528]", + "ldr x3, [x28, #1536]", "blr x0", "ldr x30, [sp], #16", "mov w21, w0", @@ -4900,7 +4901,7 @@ ] }, "fninit": { - "ExpectedInstructionCount": 9, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xe3 /4" ], @@ -4913,7 +4914,8 @@ "strb wzr, [x28, #1049]", "strb wzr, [x28, #1050]", "strb wzr, [x28, #1054]", - "strb wzr, [x28, #1040]" + "strb wzr, [x28, #1040]", + "str xzr, [x28, #1208]" ] }, "fucomi st0, st0": { @@ -4928,8 +4930,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -4966,8 +4968,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5004,8 +5006,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5042,8 +5044,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5080,8 +5082,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5118,8 +5120,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5156,8 +5158,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5194,8 +5196,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5228,8 +5230,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5266,8 +5268,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5304,8 +5306,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5342,8 +5344,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5380,8 +5382,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5418,8 +5420,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5456,8 +5458,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5494,8 +5496,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5525,8 +5527,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5536,8 +5538,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5553,8 +5555,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5564,8 +5566,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5581,8 +5583,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5592,8 +5594,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5620,8 +5622,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5631,8 +5633,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -5667,8 +5669,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5678,8 +5680,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5695,8 +5697,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5706,8 +5708,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5723,8 +5725,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5734,8 +5736,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5751,8 +5753,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5762,8 +5764,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5784,8 +5786,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5808,8 +5810,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5832,8 +5834,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5856,8 +5858,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5880,8 +5882,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5904,8 +5906,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5928,8 +5930,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5952,8 +5954,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5974,8 +5976,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5998,8 +6000,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6022,8 +6024,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6046,8 +6048,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6070,8 +6072,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6094,8 +6096,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6118,8 +6120,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6142,8 +6144,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6164,8 +6166,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6188,8 +6190,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6212,8 +6214,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6236,8 +6238,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6260,8 +6262,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6284,8 +6286,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6308,8 +6310,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6332,8 +6334,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6354,8 +6356,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6378,8 +6380,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6402,8 +6404,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6426,8 +6428,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6450,8 +6452,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6474,8 +6476,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6498,8 +6500,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6522,8 +6524,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6544,8 +6546,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6568,8 +6570,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6592,8 +6594,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6616,8 +6618,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6640,8 +6642,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6664,8 +6666,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6688,8 +6690,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6712,8 +6714,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6734,8 +6736,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6758,8 +6760,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6782,8 +6784,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6806,8 +6808,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6830,8 +6832,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6854,8 +6856,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6878,8 +6880,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6902,8 +6904,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6919,8 +6921,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6948,8 +6950,8 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1792]", - "ldr x3, [x28, #1800]", + "ldr x0, [x28, #1592]", + "ldr x3, [x28, #1600]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -6975,8 +6977,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d2, d0", @@ -6994,8 +6996,8 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d2, d0", @@ -7011,7 +7013,7 @@ ] }, "frstor [rax]": { - "ExpectedInstructionCount": 76, + "ExpectedInstructionCount": 78, "Comment": [ "0xdd !11b /4" ], @@ -7041,6 +7043,8 @@ "and w20, w20, #0xf0f0f0f", "orr w20, w20, w20, lsr #4", "strb w20, [x28, #1202]", + "ldr w20, [x4, #12]", + "str x20, [x28, #1208]", "mov x20, #0xffffffffffffffff", "mov w22, #0xffff", "fmov d2, x20", @@ -7095,7 +7099,7 @@ ] }, "fnsave [rax]": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 81, "Comment": [ "0xdd !11b /6" ], @@ -7126,7 +7130,8 @@ "orr w21, w21, w21, lsl #1", "eor w21, w21, #0xffff", "str w21, [x4, #8]", - "str wzr, [x4, #12]", + "ldr x21, [x28, #1208]", + "str w21, [x4, #12]", "str wzr, [x4, #16]", "str wzr, [x4, #20]", "str wzr, [x4, #24]", @@ -7178,7 +7183,8 @@ "strb wzr, [x28, #1049]", "strb wzr, [x28, #1050]", "strb wzr, [x28, #1054]", - "strb wzr, [x28, #1040]" + "strb wzr, [x28, #1040]", + "str xzr, [x28, #1208]" ] }, "fnstsw [rax]": { @@ -7217,32 +7223,32 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "ldr s3, [x4, #4]", "str x30, [sp, #-16]!", "fmov s0, s3", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "ldr s4, [x4, #8]", "str x30, [sp, #-16]!", "fmov s0, s4", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v4.16b, v0.16b", "ldr s5, [x4, #12]", "str x30, [sp, #-16]!", "fmov s0, s5", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v5.16b, v0.16b", @@ -7786,8 +7792,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -7821,8 +7827,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -7856,8 +7862,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -7891,8 +7897,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -7926,8 +7932,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -7961,8 +7967,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -7996,8 +8002,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -8031,8 +8037,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -8062,8 +8068,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8105,8 +8111,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x22, x0", @@ -8146,8 +8152,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8189,8 +8195,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8232,8 +8238,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8275,8 +8281,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8318,8 +8324,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8361,8 +8367,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8397,8 +8403,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8408,8 +8414,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8425,8 +8431,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8436,8 +8442,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8453,8 +8459,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8464,8 +8470,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -8492,8 +8498,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8503,8 +8509,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8539,8 +8545,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8550,8 +8556,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8567,8 +8573,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8578,8 +8584,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8595,8 +8601,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8606,8 +8612,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8623,8 +8629,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8634,8 +8640,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8654,8 +8660,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8686,8 +8692,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8716,8 +8722,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8748,8 +8754,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8780,8 +8786,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8812,8 +8818,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8844,8 +8850,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8876,8 +8882,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8904,8 +8910,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8936,8 +8942,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8966,8 +8972,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8998,8 +9004,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9030,8 +9036,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9062,8 +9068,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9094,8 +9100,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9126,8 +9132,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9158,8 +9164,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -9201,8 +9207,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9233,8 +9239,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9263,8 +9269,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9295,8 +9301,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9327,8 +9333,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9359,8 +9365,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9391,8 +9397,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9423,8 +9429,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9453,8 +9459,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9485,8 +9491,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9515,8 +9521,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9547,8 +9553,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9579,8 +9585,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9611,8 +9617,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9643,8 +9649,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9675,8 +9681,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9705,8 +9711,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9737,8 +9743,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9767,8 +9773,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9799,8 +9805,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9831,8 +9837,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9863,8 +9869,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9895,8 +9901,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9927,8 +9933,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9957,8 +9963,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9989,8 +9995,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10019,8 +10025,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10051,8 +10057,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10083,8 +10089,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10115,8 +10121,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10147,8 +10153,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10179,8 +10185,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10260,8 +10266,8 @@ "strb w21, [x28, #1040]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1760]", - "ldr x3, [x28, #1768]", + "ldr x0, [x28, #1560]", + "ldr x3, [x28, #1568]", "blr x0", "ldr x30, [sp], #16", "mov w21, w0", @@ -10301,8 +10307,8 @@ "strb w20, [x28, #1040]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1712]", - "ldr x3, [x28, #1720]", + "ldr x0, [x28, #1512]", + "ldr x3, [x28, #1520]", "blr x0", "ldr x30, [sp], #16", "mov w20, w0", @@ -10334,8 +10340,8 @@ "strb w21, [x28, #1040]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1712]", - "ldr x3, [x28, #1720]", + "ldr x0, [x28, #1512]", + "ldr x3, [x28, #1520]", "blr x0", "ldr x30, [sp], #16", "mov w21, w0", @@ -10362,8 +10368,8 @@ "ld1 {v2.h}[4], [x20]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #2016]", - "ldr x3, [x28, #2024]", + "ldr x0, [x28, #1816]", + "ldr x3, [x28, #1824]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10391,8 +10397,8 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #2000]", - "ldr x3, [x28, #2008]", + "ldr x0, [x28, #1800]", + "ldr x3, [x28, #1808]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10546,8 +10552,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10592,8 +10598,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x22, x0", @@ -10636,8 +10642,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10682,8 +10688,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10728,8 +10734,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10774,8 +10780,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10820,8 +10826,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10866,8 +10872,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10908,8 +10914,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10954,8 +10960,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x22, x0", @@ -10998,8 +11004,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -11044,8 +11050,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -11090,8 +11096,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -11136,8 +11142,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -11182,8 +11188,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -11228,8 +11234,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", diff --git a/unittests/InstructionCountCI/FlagM/x87_f64-Crysis2Max-fmodel.json b/unittests/InstructionCountCI/FlagM/x87_f64-Crysis2Max-fmodel.json index a698d05d4a..d8a72481e3 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64-Crysis2Max-fmodel.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64-Crysis2Max-fmodel.json @@ -13,7 +13,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "Block1": { diff --git a/unittests/InstructionCountCI/FlagM/x87_f64-HalfLife.json b/unittests/InstructionCountCI/FlagM/x87_f64-HalfLife.json index 72d1c4640a..5b47f0f88a 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64-HalfLife.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64-HalfLife.json @@ -13,7 +13,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "Block1": { diff --git a/unittests/InstructionCountCI/FlagM/x87_f64-Oblivion.json b/unittests/InstructionCountCI/FlagM/x87_f64-Oblivion.json index 4c65814aab..4c36a971de 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64-Oblivion.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64-Oblivion.json @@ -13,7 +13,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "Block1": { diff --git a/unittests/InstructionCountCI/FlagM/x87_f64-Psychonauts.json b/unittests/InstructionCountCI/FlagM/x87_f64-Psychonauts.json index 98c2afa1b6..3a828973f0 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64-Psychonauts.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64-Psychonauts.json @@ -13,7 +13,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "Block1": { diff --git a/unittests/InstructionCountCI/FlagM/x87_f64.json b/unittests/InstructionCountCI/FlagM/x87_f64.json index c89f265864..d593463101 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64.json @@ -13,7 +13,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "fadd dword [rax]": { @@ -1539,7 +1539,7 @@ ] }, "fnstenv [rax]": { - "ExpectedInstructionCount": 29, + "ExpectedInstructionCount": 30, "Comment": [ "0xd9 !11b /6" ], @@ -1569,7 +1569,8 @@ "orr w20, w20, w20, lsl #1", "eor w20, w20, #0xffff", "str w20, [x4, #8]", - "str wzr, [x4, #12]", + "ldr x20, [x28, #1208]", + "str w20, [x4, #12]", "str wzr, [x4, #16]", "str wzr, [x4, #20]", "str wzr, [x4, #24]" @@ -2231,7 +2232,7 @@ "add x20, x28, x20, lsl #4", "ldr d2, [x20, #1056]", "fmov d0, d2", - "ldr x0, [x28, #3088]", + "ldr x0, [x28, #2888]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2254,7 +2255,7 @@ "ldr d3, [x23, #1056]", "fmov d0, d3", "fmov d1, d2", - "ldr x0, [x28, #3112]", + "ldr x0, [x28, #2912]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2278,7 +2279,7 @@ "add x21, x28, x20, lsl #4", "ldr d2, [x21, #1056]", "fmov d0, d2", - "ldr x0, [x28, #3080]", + "ldr x0, [x28, #2880]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2314,7 +2315,7 @@ "ldr d3, [x22, #1056]", "fmov d0, d3", "fmov d1, d2", - "ldr x0, [x28, #3104]", + "ldr x0, [x28, #2904]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2391,7 +2392,7 @@ "ldr d3, [x20, #1056]", "fmov d0, d3", "fmov d1, d2", - "ldr x0, [x28, #3136]", + "ldr x0, [x28, #2936]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2441,7 +2442,7 @@ "ldr d3, [x20, #1056]", "fmov d0, d3", "fmov d1, d2", - "ldr x0, [x28, #3128]", + "ldr x0, [x28, #2928]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2465,7 +2466,7 @@ "ldr d3, [x23, #1056]", "fmov d0, d3", "fmov d1, d2", - "ldr x0, [x28, #3120]", + "ldr x0, [x28, #2920]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2502,13 +2503,13 @@ "add x21, x28, x20, lsl #4", "ldr d2, [x21, #1056]", "fmov d0, d2", - "ldr x0, [x28, #3064]", + "ldr x0, [x28, #2864]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", "fmov d0, d2", - "ldr x0, [x28, #3072]", + "ldr x0, [x28, #2872]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2555,7 +2556,7 @@ "ldr d3, [x20, #1056]", "fmov d0, d3", "fmov d1, d2", - "ldr x0, [x28, #3096]", + "ldr x0, [x28, #2896]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2573,7 +2574,7 @@ "add x20, x28, x20, lsl #4", "ldr d2, [x20, #1056]", "fmov d0, d2", - "ldr x0, [x28, #3064]", + "ldr x0, [x28, #2864]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2592,7 +2593,7 @@ "add x20, x28, x20, lsl #4", "ldr d2, [x20, #1056]", "fmov d0, d2", - "ldr x0, [x28, #3072]", + "ldr x0, [x28, #2872]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -3488,8 +3489,8 @@ "ld1 {v2.h}[4], [x20]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d2, d0", @@ -3517,8 +3518,8 @@ "ldr d2, [x21, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4161,7 +4162,7 @@ ] }, "fninit": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 18, "Comment": [ "0xdb 11b 0xe3 /4" ], @@ -4182,7 +4183,8 @@ "strb wzr, [x28, #1049]", "strb wzr, [x28, #1050]", "strb wzr, [x28, #1054]", - "strb wzr, [x28, #1040]" + "strb wzr, [x28, #1040]", + "str xzr, [x28, #1208]" ] }, "fucomi st0, st0": { @@ -5497,7 +5499,7 @@ ] }, "frstor [rax]": { - "ExpectedInstructionCount": 141, + "ExpectedInstructionCount": 143, "Comment": [ "0xdd !11b /4" ], @@ -5536,6 +5538,8 @@ "and w20, w20, #0xf0f0f0f", "orr w20, w20, w20, lsr #4", "strb w20, [x28, #1202]", + "ldr w20, [x4, #12]", + "str x20, [x28, #1208]", "mov x20, #0xffffffffffffffff", "mov w22, #0xffff", "fmov d2, x20", @@ -5544,8 +5548,8 @@ "and v3.16b, v3.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", @@ -5557,8 +5561,8 @@ "and v3.16b, v3.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", @@ -5570,8 +5574,8 @@ "and v3.16b, v3.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", @@ -5583,8 +5587,8 @@ "and v3.16b, v3.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", @@ -5596,8 +5600,8 @@ "and v3.16b, v3.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", @@ -5609,8 +5613,8 @@ "and v3.16b, v3.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", @@ -5622,8 +5626,8 @@ "and v2.16b, v3.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d2, d0", @@ -5636,8 +5640,8 @@ "mov v2.h[4], v3.h[0]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d2, d0", @@ -5646,7 +5650,7 @@ ] }, "fnsave [rax]": { - "ExpectedInstructionCount": 143, + "ExpectedInstructionCount": 145, "Comment": [ "0xdd !11b /6" ], @@ -5678,7 +5682,8 @@ "orr w22, w22, w22, lsl #1", "eor w22, w22, #0xffff", "str w22, [x4, #8]", - "str wzr, [x4, #12]", + "ldr x22, [x28, #1208]", + "str w22, [x4, #12]", "str wzr, [x4, #16]", "str wzr, [x4, #20]", "str wzr, [x4, #24]", @@ -5686,8 +5691,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5698,8 +5703,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5710,8 +5715,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5722,8 +5727,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5734,8 +5739,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5746,8 +5751,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5758,8 +5763,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5770,8 +5775,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5793,7 +5798,8 @@ "strb wzr, [x28, #1049]", "strb wzr, [x28, #1050]", "strb wzr, [x28, #1054]", - "strb wzr, [x28, #1040]" + "strb wzr, [x28, #1040]", + "str xzr, [x28, #1208]" ] }, "fnstsw [rax]": { @@ -8215,15 +8221,15 @@ "ld1 {v2.h}[4], [x20]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #2016]", - "ldr x3, [x28, #2024]", + "ldr x0, [x28, #1816]", + "ldr x3, [x28, #1824]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d2, d0", @@ -8251,15 +8257,15 @@ "ldr d2, [x21, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #2000]", - "ldr x3, [x28, #2008]", + "ldr x0, [x28, #1800]", + "ldr x3, [x28, #1808]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", diff --git a/unittests/InstructionCountCI/H0F38.json b/unittests/InstructionCountCI/H0F38.json index 69bbefda39..d693329914 100644 --- a/unittests/InstructionCountCI/H0F38.json +++ b/unittests/InstructionCountCI/H0F38.json @@ -10,7 +10,7 @@ "FLAGM2", "CRYPTO" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "pshufb mm0, mm1": { @@ -674,7 +674,7 @@ "0x66 0x0f 0x38 0x41" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "zip1 v3.8h, v2.8h, v17.8h", "zip2 v2.8h, v2.8h, v17.8h", "umin v2.4s, v3.4s, v2.4s", diff --git a/unittests/InstructionCountCI/H0F3A.json b/unittests/InstructionCountCI/H0F3A.json index 73441990a4..eac8ab220f 100644 --- a/unittests/InstructionCountCI/H0F3A.json +++ b/unittests/InstructionCountCI/H0F3A.json @@ -8,7 +8,7 @@ "AFP", "CRYPTO" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Comment": [ "SSE4.2 string instructions are skipped here.", @@ -328,7 +328,7 @@ "0x66 0x0f 0x3a 0x0c" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3360]", + "ldr q2, [x28, #3152]", "tbx v16.16b, {v17.16b}, v2.16b" ] }, @@ -338,7 +338,7 @@ "0x66 0x0f 0x3a 0x0c" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3376]", + "ldr q2, [x28, #3168]", "tbx v16.16b, {v17.16b}, v2.16b" ] }, @@ -357,7 +357,7 @@ "0x66 0x0f 0x3a 0x0c" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3392]", + "ldr q2, [x28, #3184]", "tbx v16.16b, {v17.16b}, v2.16b" ] }, @@ -377,7 +377,7 @@ "0x66 0x0f 0x3a 0x0c" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3408]", + "ldr q2, [x28, #3200]", "tbx v16.16b, {v17.16b}, v2.16b" ] }, @@ -396,7 +396,7 @@ "0x66 0x0f 0x3a 0x0c" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3424]", + "ldr q2, [x28, #3216]", "tbx v16.16b, {v17.16b}, v2.16b" ] }, @@ -406,7 +406,7 @@ "0x66 0x0f 0x3a 0x0c" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3440]", + "ldr q2, [x28, #3232]", "tbx v16.16b, {v17.16b}, v2.16b" ] }, @@ -475,7 +475,7 @@ "0x66 0x0f 0x3a 0x0e" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2784]", + "ldr x0, [x28, #2584]", "ldr q2, [x0, #3440]", "tbx v16.16b, {v17.16b}, v2.16b" ] diff --git a/unittests/InstructionCountCI/H0F3A_SVE128.json b/unittests/InstructionCountCI/H0F3A_SVE128.json index f5748682bf..41d25c39fe 100644 --- a/unittests/InstructionCountCI/H0F3A_SVE128.json +++ b/unittests/InstructionCountCI/H0F3A_SVE128.json @@ -8,7 +8,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "dpps xmm0, xmm1, 00000000b": { diff --git a/unittests/InstructionCountCI/MOPS/Primary.json b/unittests/InstructionCountCI/MOPS/Primary.json index fcfd9d6835..1be6f772fb 100644 --- a/unittests/InstructionCountCI/MOPS/Primary.json +++ b/unittests/InstructionCountCI/MOPS/Primary.json @@ -11,7 +11,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "rep movsb": { diff --git a/unittests/InstructionCountCI/Primary.json b/unittests/InstructionCountCI/Primary.json index 5b3cfd71b3..4165477fab 100644 --- a/unittests/InstructionCountCI/Primary.json +++ b/unittests/InstructionCountCI/Primary.json @@ -10,7 +10,7 @@ "FLAGM2", "MOPS" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "add bl, cl": { @@ -2463,7 +2463,7 @@ ] }, "db 0x66, 0x8D, 0xC0": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "0x8d", "LEA ax, ax illegal register to register encoding" @@ -2471,14 +2471,16 @@ "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "db 0x8D, 0xC0": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "0x8d", "LEA eax, eax illegal register to register encoding" @@ -2486,14 +2488,16 @@ "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, "db 0x48, 0x8D, 0xC0": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": [ "0x8d", "LEA rax, rax illegal register to register encoding" @@ -2501,9 +2505,11 @@ "ExpectedArm64ASM": [ "mov w20, #0x10000", "str x20, [x28, #24]", + "mov w20, #0x0", "mov w0, #0x401", - "str x0, [x28, #1496]", - "ldr x0, [x28, #3000]", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", "br x0" ] }, diff --git a/unittests/InstructionCountCI/PrimaryGroup.json b/unittests/InstructionCountCI/PrimaryGroup.json index 210cac9bee..00ccad2c53 100644 --- a/unittests/InstructionCountCI/PrimaryGroup.json +++ b/unittests/InstructionCountCI/PrimaryGroup.json @@ -9,7 +9,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Comment": [ "Instructions in this table that are marked optimal don't have their flag calculation part of this assumption", @@ -2780,19 +2780,56 @@ ] }, "div rbx": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 52, "Comment": "GROUP2 0xf7 /6", "ExpectedArm64ASM": [ - "cbz x5, #+0x2c", - "mov x0, x5", - "mov x1, x4", - "mov x2, x6", - "ldr x3, [x28, #3048]", - "str x30, [sp, #-16]!", - "blr x3", - "ldr x30, [sp], #16", - "mov x20, x0", - "mov x22, x1", + "cbz x5, #+0xc0", + "cbz x6, #+0xbc", + "mrs x0, nzcv", + "str w0, [x28, #1032]", + "mov x2, x5", + "cmp x5, x6", + "b.lo #+0xc", + "udiv x20, x5, x6", + "msub x2, x20, x6, x5", + "clz x0, x6", + "lsl x1, x6, x0", + "lsl x2, x2, x0", + "mvn x20, x0", + "lsr x22, x4, #1", + "lsr x22, x22, x20", + "orr x2, x2, x22", + "lsl x3, x4, x0", + "lsr x0, x1, #32", + "udiv x20, x2, x0", + "msub x22, x20, x0, x2", + "mov w0, w1", + "mul x0, x20, x0", + "extr x22, x22, x3, #32", + "subs x0, x0, x22", + "b.ls #+0x14", + "sub x20, x20, #0x1 (1)", + "cmp x0, x1", + "b.ls #+0x8", + "sub x20, x20, #0x1 (1)", + "extr x2, x2, x3, #32", + "msub x2, x20, x1, x2", + "lsr x0, x1, #32", + "udiv x22, x2, x0", + "msub x0, x22, x0, x2", + "mov w2, w1", + "mul x2, x22, x2", + "bfi x3, x0, #32, #32", + "subs x2, x2, x3", + "b.ls #+0x14", + "sub x22, x22, #0x1 (1)", + "cmp x2, x1", + "b.ls #+0x8", + "sub x22, x22, #0x1 (1)", + "orr x20, x22, x20, lsl #32", + "ldr w0, [x28, #1032]", + "msr nzcv, x0", + "msub x22, x20, x6, x4", "b #+0xc", "udiv x20, x4, x6", "msub x22, x20, x6, x4", @@ -2829,21 +2866,67 @@ ] }, "idiv rbx": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 63, "Comment": "GROUP2 0xf7 /7", "ExpectedArm64ASM": [ "asr x0, x4, #63", "eor x0, x0, x5", - "cbz x0, #+0x2c", - "mov x0, x5", - "mov x1, x4", - "mov x2, x6", - "ldr x3, [x28, #3056]", - "str x30, [sp, #-16]!", - "blr x3", - "ldr x30, [sp], #16", - "mov x20, x0", - "mov x22, x1", + "cbz x0, #+0xe4", + "cbz x6, #+0xe0", + "mrs x0, nzcv", + "str w0, [x28, #1032]", + "asr x0, x5, #63", + "eor x3, x4, x0", + "eor x2, x5, x0", + "subs x3, x3, x0", + "sbc x2, x2, x0", + "cmp x6, #0x0 (0)", + "cneg x1, x6, lt", + "cmp x2, x1", + "b.lo #+0xc", + "udiv x20, x2, x1", + "msub x2, x20, x1, x2", + "clz x0, x1", + "lsl x1, x1, x0", + "lsl x2, x2, x0", + "mvn x20, x0", + "lsr x22, x3, #1", + "lsr x22, x22, x20", + "orr x2, x2, x22", + "lsl x3, x3, x0", + "lsr x0, x1, #32", + "udiv x20, x2, x0", + "msub x22, x20, x0, x2", + "mov w0, w1", + "mul x0, x20, x0", + "extr x22, x22, x3, #32", + "subs x0, x0, x22", + "b.ls #+0x14", + "sub x20, x20, #0x1 (1)", + "cmp x0, x1", + "b.ls #+0x8", + "sub x20, x20, #0x1 (1)", + "extr x2, x2, x3, #32", + "msub x2, x20, x1, x2", + "lsr x0, x1, #32", + "udiv x22, x2, x0", + "msub x0, x22, x0, x2", + "mov w2, w1", + "mul x2, x22, x2", + "bfi x3, x0, #32, #32", + "subs x2, x2, x3", + "b.ls #+0x14", + "sub x22, x22, #0x1 (1)", + "cmp x2, x1", + "b.ls #+0x8", + "sub x22, x22, #0x1 (1)", + "orr x20, x22, x20, lsl #32", + "eor x0, x5, x6", + "cmp x0, #0x0 (0)", + "cneg x20, x20, lt", + "ldr w0, [x28, #1032]", + "msr nzcv, x0", + "msub x22, x20, x6, x4", "b #+0xc", "sdiv x20, x4, x6", "msub x22, x20, x6, x4", diff --git a/unittests/InstructionCountCI/Primary_32Bit.json b/unittests/InstructionCountCI/Primary_32Bit.json index f2ef8782be..2a13202ec1 100644 --- a/unittests/InstructionCountCI/Primary_32Bit.json +++ b/unittests/InstructionCountCI/Primary_32Bit.json @@ -9,7 +9,7 @@ "FlagM", "FlagM2" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "push es": { diff --git a/unittests/InstructionCountCI/RPRES/DDD.json b/unittests/InstructionCountCI/RPRES/DDD.json index e1ee21159f..0fd129db6d 100644 --- a/unittests/InstructionCountCI/RPRES/DDD.json +++ b/unittests/InstructionCountCI/RPRES/DDD.json @@ -9,7 +9,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "pfrcpv mm0, mm1": { diff --git a/unittests/InstructionCountCI/RPRES/Secondary.json b/unittests/InstructionCountCI/RPRES/Secondary.json index 091a663b32..4377d6cb51 100644 --- a/unittests/InstructionCountCI/RPRES/Secondary.json +++ b/unittests/InstructionCountCI/RPRES/Secondary.json @@ -9,7 +9,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "rsqrtps xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/RPRES/Secondary_REP_AFP.json b/unittests/InstructionCountCI/RPRES/Secondary_REP_AFP.json index 471f64d908..7fd6d6f38b 100644 --- a/unittests/InstructionCountCI/RPRES/Secondary_REP_AFP.json +++ b/unittests/InstructionCountCI/RPRES/Secondary_REP_AFP.json @@ -9,7 +9,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "rsqrtss xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/RPRES/VEX_map1_AFP.json b/unittests/InstructionCountCI/RPRES/VEX_map1_AFP.json index c6e631c00f..2ad92775da 100644 --- a/unittests/InstructionCountCI/RPRES/VEX_map1_AFP.json +++ b/unittests/InstructionCountCI/RPRES/VEX_map1_AFP.json @@ -8,7 +8,7 @@ "AFP" ], "DisabledHostFeatures": [], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vrsqrtps xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Repeat.json b/unittests/InstructionCountCI/Repeat.json index 7d1608bb92..93ea016aaf 100644 --- a/unittests/InstructionCountCI/Repeat.json +++ b/unittests/InstructionCountCI/Repeat.json @@ -6,7 +6,7 @@ "SVE128", "SVE256" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": {} } diff --git a/unittests/InstructionCountCI/SSE42_Strings.json b/unittests/InstructionCountCI/SSE42_Strings.json index 97b74e9270..98628fa312 100644 --- a/unittests/InstructionCountCI/SSE42_Strings.json +++ b/unittests/InstructionCountCI/SSE42_Strings.json @@ -33,7 +33,7 @@ " - 1b: ECX = MSB", "[7] - Reserved" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "pcmpestrm xmm0, xmm1, 0_0_00_00_00b": { @@ -43,7 +43,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -114,7 +114,7 @@ "dup v3.16b, v3.b[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -139,7 +139,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -186,7 +186,7 @@ "dup v3.8h, v3.h[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -212,7 +212,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -283,7 +283,7 @@ "dup v3.16b, v3.b[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -308,7 +308,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -355,7 +355,7 @@ "dup v3.8h, v3.h[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -381,7 +381,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -464,7 +464,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -489,7 +489,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -540,7 +540,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -566,7 +566,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -649,7 +649,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -674,7 +674,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -725,7 +725,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -751,7 +751,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -775,7 +775,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -800,7 +800,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -824,7 +824,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -850,7 +850,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -874,7 +874,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -899,7 +899,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -923,7 +923,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -949,7 +949,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -1070,7 +1070,7 @@ "dup v4.16b, w20", "cmgt v2.16b, v4.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -1094,7 +1094,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -1167,7 +1167,7 @@ "dup v4.8h, w20", "cmgt v2.8h, v4.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -1192,7 +1192,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -1313,7 +1313,7 @@ "dup v4.16b, w20", "cmgt v2.16b, v4.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -1337,7 +1337,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -1410,7 +1410,7 @@ "dup v4.8h, w20", "cmgt v2.8h, v4.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -1435,7 +1435,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -1507,7 +1507,7 @@ "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -1532,7 +1532,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -1580,7 +1580,7 @@ "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -1606,7 +1606,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -1678,7 +1678,7 @@ "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -1703,7 +1703,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -1751,7 +1751,7 @@ "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -1777,7 +1777,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -1861,7 +1861,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -1886,7 +1886,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -1938,7 +1938,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -1964,7 +1964,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -2048,7 +2048,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -2073,7 +2073,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -2125,7 +2125,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -2151,7 +2151,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -2176,7 +2176,7 @@ "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -2201,7 +2201,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -2226,7 +2226,7 @@ "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -2252,7 +2252,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -2277,7 +2277,7 @@ "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -2302,7 +2302,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -2327,7 +2327,7 @@ "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -2353,7 +2353,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -2475,7 +2475,7 @@ "cmgt v2.16b, v4.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -2499,7 +2499,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -2573,7 +2573,7 @@ "cmgt v2.8h, v4.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -2598,7 +2598,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -2720,7 +2720,7 @@ "cmgt v2.16b, v4.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -2744,7 +2744,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -2818,7 +2818,7 @@ "cmgt v2.8h, v4.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -2843,7 +2843,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -2914,7 +2914,7 @@ "dup v3.16b, v3.b[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -2939,7 +2939,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -2986,7 +2986,7 @@ "dup v3.8h, v3.h[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -3012,7 +3012,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -3083,7 +3083,7 @@ "dup v3.16b, v3.b[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -3108,7 +3108,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -3155,7 +3155,7 @@ "dup v3.8h, v3.h[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -3181,7 +3181,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -3264,7 +3264,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -3289,7 +3289,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -3340,7 +3340,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -3366,7 +3366,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -3449,7 +3449,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -3474,7 +3474,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -3525,7 +3525,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -3551,7 +3551,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -3575,7 +3575,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -3600,7 +3600,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -3624,7 +3624,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -3650,7 +3650,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -3674,7 +3674,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -3699,7 +3699,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -3723,7 +3723,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -3749,7 +3749,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -3870,7 +3870,7 @@ "dup v4.16b, w20", "cmgt v2.16b, v4.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -3894,7 +3894,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -3967,7 +3967,7 @@ "dup v4.8h, w20", "cmgt v2.8h, v4.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -3992,7 +3992,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -4113,7 +4113,7 @@ "dup v4.16b, w20", "cmgt v2.16b, v4.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -4137,7 +4137,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -4210,7 +4210,7 @@ "dup v4.8h, w20", "cmgt v2.8h, v4.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -4235,7 +4235,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -4307,7 +4307,7 @@ "and v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -4332,7 +4332,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -4380,7 +4380,7 @@ "and v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -4406,7 +4406,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -4478,7 +4478,7 @@ "and v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -4503,7 +4503,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -4551,7 +4551,7 @@ "and v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -4577,7 +4577,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -4661,7 +4661,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -4686,7 +4686,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -4738,7 +4738,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -4764,7 +4764,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -4848,7 +4848,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -4873,7 +4873,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -4925,7 +4925,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -4951,7 +4951,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -4976,7 +4976,7 @@ "and v4.16b, v4.16b, v5.16b", "orn v3.16b, v4.16b, v3.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -5001,7 +5001,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -5026,7 +5026,7 @@ "and v4.16b, v4.16b, v5.16b", "orn v3.16b, v4.16b, v3.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -5052,7 +5052,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -5077,7 +5077,7 @@ "and v4.16b, v4.16b, v5.16b", "orn v3.16b, v4.16b, v3.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -5102,7 +5102,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -5127,7 +5127,7 @@ "and v4.16b, v4.16b, v5.16b", "orn v3.16b, v4.16b, v3.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -5153,7 +5153,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -5277,7 +5277,7 @@ "cmgt v2.16b, v5.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", "eor v2.16b, v2.16b, v4.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -5301,7 +5301,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -5377,7 +5377,7 @@ "cmgt v2.8h, v5.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", "eor v2.16b, v2.16b, v4.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -5402,7 +5402,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -5526,7 +5526,7 @@ "cmgt v2.16b, v5.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", "eor v2.16b, v2.16b, v4.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -5550,7 +5550,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -5626,7 +5626,7 @@ "cmgt v2.8h, v5.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", "eor v2.16b, v2.16b, v4.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -5651,7 +5651,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -5743,7 +5743,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -5811,7 +5811,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -5903,7 +5903,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -5971,7 +5971,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -6075,7 +6075,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -6147,7 +6147,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -6251,7 +6251,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -6323,7 +6323,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -6368,7 +6368,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -6413,7 +6413,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -6458,7 +6458,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -6503,7 +6503,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -6644,7 +6644,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -6737,7 +6737,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -6878,7 +6878,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -6971,7 +6971,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -7064,7 +7064,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -7133,7 +7133,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -7226,7 +7226,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -7295,7 +7295,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -7400,7 +7400,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -7473,7 +7473,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -7578,7 +7578,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -7651,7 +7651,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -7697,7 +7697,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -7743,7 +7743,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -7789,7 +7789,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -7835,7 +7835,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -7977,7 +7977,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -8071,7 +8071,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -8213,7 +8213,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -8307,7 +8307,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -8399,7 +8399,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -8467,7 +8467,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -8559,7 +8559,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -8627,7 +8627,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -8731,7 +8731,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -8803,7 +8803,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -8907,7 +8907,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -8979,7 +8979,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -9024,7 +9024,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -9069,7 +9069,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -9114,7 +9114,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -9159,7 +9159,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -9300,7 +9300,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -9393,7 +9393,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -9534,7 +9534,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -9627,7 +9627,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -9720,7 +9720,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -9789,7 +9789,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -9882,7 +9882,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -9951,7 +9951,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -10056,7 +10056,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -10129,7 +10129,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -10234,7 +10234,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -10307,7 +10307,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -10353,7 +10353,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -10399,7 +10399,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -10445,7 +10445,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -10491,7 +10491,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -10635,7 +10635,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -10731,7 +10731,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -10875,7 +10875,7 @@ "0x66 0x0f 0x3A 0x60" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -10971,7 +10971,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -11065,7 +11065,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -11135,7 +11135,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -11229,7 +11229,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -11299,7 +11299,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -11405,7 +11405,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -11479,7 +11479,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -11585,7 +11585,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -11659,7 +11659,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -11706,7 +11706,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -11753,7 +11753,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -11800,7 +11800,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -11847,7 +11847,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -11990,7 +11990,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -12085,7 +12085,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -12228,7 +12228,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -12323,7 +12323,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -12418,7 +12418,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -12489,7 +12489,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -12584,7 +12584,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -12655,7 +12655,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -12762,7 +12762,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -12837,7 +12837,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -12944,7 +12944,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -13019,7 +13019,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -13067,7 +13067,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -13115,7 +13115,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -13163,7 +13163,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -13211,7 +13211,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -13355,7 +13355,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -13451,7 +13451,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -13595,7 +13595,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -13691,7 +13691,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -13785,7 +13785,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -13855,7 +13855,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -13949,7 +13949,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -14019,7 +14019,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -14125,7 +14125,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -14199,7 +14199,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -14305,7 +14305,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -14379,7 +14379,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -14426,7 +14426,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -14473,7 +14473,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -14520,7 +14520,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -14567,7 +14567,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -14710,7 +14710,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -14805,7 +14805,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -14948,7 +14948,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -15043,7 +15043,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -15138,7 +15138,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -15209,7 +15209,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -15304,7 +15304,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -15375,7 +15375,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -15482,7 +15482,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -15557,7 +15557,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -15664,7 +15664,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -15739,7 +15739,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -15787,7 +15787,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -15835,7 +15835,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -15883,7 +15883,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -15931,7 +15931,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -16077,7 +16077,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -16175,7 +16175,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -16321,7 +16321,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -16419,7 +16419,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -16518,7 +16518,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -16593,7 +16593,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -16692,7 +16692,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -16767,7 +16767,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -16878,7 +16878,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -16957,7 +16957,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -17068,7 +17068,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -17147,7 +17147,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -17199,7 +17199,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -17251,7 +17251,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -17303,7 +17303,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -17355,7 +17355,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -17503,7 +17503,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -17603,7 +17603,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -17751,7 +17751,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -17851,7 +17851,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -17951,7 +17951,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -18027,7 +18027,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -18127,7 +18127,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -18203,7 +18203,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -18315,7 +18315,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -18395,7 +18395,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -18507,7 +18507,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -18587,7 +18587,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -18640,7 +18640,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -18693,7 +18693,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -18746,7 +18746,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -18799,7 +18799,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -18948,7 +18948,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -19049,7 +19049,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -19198,7 +19198,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -19299,7 +19299,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -19398,7 +19398,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -19473,7 +19473,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -19572,7 +19572,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -19647,7 +19647,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -19758,7 +19758,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -19837,7 +19837,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -19948,7 +19948,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -20027,7 +20027,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -20079,7 +20079,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -20131,7 +20131,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -20183,7 +20183,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -20235,7 +20235,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -20383,7 +20383,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -20483,7 +20483,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -20631,7 +20631,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -20731,7 +20731,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -20831,7 +20831,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -20907,7 +20907,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -21007,7 +21007,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -21083,7 +21083,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -21195,7 +21195,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -21275,7 +21275,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -21387,7 +21387,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -21467,7 +21467,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -21520,7 +21520,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -21573,7 +21573,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -21626,7 +21626,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -21679,7 +21679,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -21830,7 +21830,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -21933,7 +21933,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -22084,7 +22084,7 @@ "0x66 0x0f 0x3A 0x61" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "mov w27, #0x0", "cmp w4, #0x0 (0)", "cneg w20, w4, mi", @@ -22187,7 +22187,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -22257,7 +22257,7 @@ "dup v3.16b, v3.b[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -22283,7 +22283,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -22329,7 +22329,7 @@ "dup v3.8h, v3.h[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -22356,7 +22356,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -22426,7 +22426,7 @@ "dup v3.16b, v3.b[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -22452,7 +22452,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -22498,7 +22498,7 @@ "dup v3.8h, v3.h[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -22525,7 +22525,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -22607,7 +22607,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -22633,7 +22633,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -22683,7 +22683,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -22710,7 +22710,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -22792,7 +22792,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -22818,7 +22818,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -22868,7 +22868,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -22895,7 +22895,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -22918,7 +22918,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -22944,7 +22944,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -22967,7 +22967,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -22994,7 +22994,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -23017,7 +23017,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -23043,7 +23043,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -23066,7 +23066,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -23093,7 +23093,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -23215,7 +23215,7 @@ "dup v4.16b, w20", "cmgt v2.16b, v4.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -23239,7 +23239,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -23313,7 +23313,7 @@ "dup v4.8h, w20", "cmgt v2.8h, v4.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -23338,7 +23338,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -23460,7 +23460,7 @@ "dup v4.16b, w20", "cmgt v2.16b, v4.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -23484,7 +23484,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -23558,7 +23558,7 @@ "dup v4.8h, w20", "cmgt v2.8h, v4.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -23583,7 +23583,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -23654,7 +23654,7 @@ "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -23680,7 +23680,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -23727,7 +23727,7 @@ "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -23754,7 +23754,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -23825,7 +23825,7 @@ "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -23851,7 +23851,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -23898,7 +23898,7 @@ "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -23925,7 +23925,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -24008,7 +24008,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -24034,7 +24034,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -24085,7 +24085,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -24112,7 +24112,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -24195,7 +24195,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -24221,7 +24221,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -24272,7 +24272,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -24299,7 +24299,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -24323,7 +24323,7 @@ "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -24349,7 +24349,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -24373,7 +24373,7 @@ "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -24400,7 +24400,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -24424,7 +24424,7 @@ "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -24450,7 +24450,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -24474,7 +24474,7 @@ "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -24501,7 +24501,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -24624,7 +24624,7 @@ "cmgt v2.16b, v4.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -24648,7 +24648,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -24723,7 +24723,7 @@ "cmgt v2.8h, v4.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -24748,7 +24748,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -24871,7 +24871,7 @@ "cmgt v2.16b, v4.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -24895,7 +24895,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -24970,7 +24970,7 @@ "cmgt v2.8h, v4.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", "mvn v2.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -24995,7 +24995,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -25065,7 +25065,7 @@ "dup v3.16b, v3.b[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -25091,7 +25091,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -25137,7 +25137,7 @@ "dup v3.8h, v3.h[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -25164,7 +25164,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -25234,7 +25234,7 @@ "dup v3.16b, v3.b[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -25260,7 +25260,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -25306,7 +25306,7 @@ "dup v3.8h, v3.h[0]", "and v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -25333,7 +25333,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -25415,7 +25415,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -25441,7 +25441,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -25491,7 +25491,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -25518,7 +25518,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -25600,7 +25600,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -25626,7 +25626,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -25676,7 +25676,7 @@ "bic v3.16b, v3.16b, v6.16b", "orr v3.16b, v4.16b, v3.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -25703,7 +25703,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -25726,7 +25726,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -25752,7 +25752,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -25775,7 +25775,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -25802,7 +25802,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -25825,7 +25825,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -25851,7 +25851,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -25874,7 +25874,7 @@ "orr v2.16b, v3.16b, v2.16b", "and v3.16b, v4.16b, v5.16b", "orn v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -25901,7 +25901,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -26023,7 +26023,7 @@ "dup v4.16b, w20", "cmgt v2.16b, v4.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -26047,7 +26047,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -26121,7 +26121,7 @@ "dup v4.8h, w20", "cmgt v2.8h, v4.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -26146,7 +26146,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -26268,7 +26268,7 @@ "dup v4.16b, w20", "cmgt v2.16b, v4.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -26292,7 +26292,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -26366,7 +26366,7 @@ "dup v4.8h, w20", "cmgt v2.8h, v4.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -26391,7 +26391,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -26462,7 +26462,7 @@ "and v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -26488,7 +26488,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -26535,7 +26535,7 @@ "and v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -26562,7 +26562,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -26633,7 +26633,7 @@ "and v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -26659,7 +26659,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -26706,7 +26706,7 @@ "and v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -26733,7 +26733,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -26816,7 +26816,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -26842,7 +26842,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -26893,7 +26893,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -26920,7 +26920,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -27003,7 +27003,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -27029,7 +27029,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -27080,7 +27080,7 @@ "orr v3.16b, v4.16b, v3.16b", "and v3.16b, v3.16b, v2.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -27107,7 +27107,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -27131,7 +27131,7 @@ "and v4.16b, v4.16b, v5.16b", "orn v3.16b, v4.16b, v3.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -27157,7 +27157,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -27181,7 +27181,7 @@ "and v4.16b, v4.16b, v5.16b", "orn v3.16b, v4.16b, v3.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -27208,7 +27208,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -27232,7 +27232,7 @@ "and v4.16b, v4.16b, v5.16b", "orn v3.16b, v4.16b, v3.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -27258,7 +27258,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -27282,7 +27282,7 @@ "and v4.16b, v4.16b, v5.16b", "orn v3.16b, v4.16b, v3.16b", "eor v2.16b, v3.16b, v2.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -27309,7 +27309,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -27434,7 +27434,7 @@ "cmgt v2.16b, v5.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", "eor v2.16b, v2.16b, v4.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -27458,7 +27458,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -27535,7 +27535,7 @@ "cmgt v2.8h, v5.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", "eor v2.16b, v2.16b, v4.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -27560,7 +27560,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -27685,7 +27685,7 @@ "cmgt v2.16b, v5.16b, v2.16b", "and v2.16b, v3.16b, v2.16b", "eor v2.16b, v2.16b, v4.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "and v2.16b, v2.16b, v3.16b", "addp v2.16b, v2.16b, v4.16b", @@ -27709,7 +27709,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -27786,7 +27786,7 @@ "cmgt v2.8h, v5.8h, v2.8h", "and v2.16b, v3.16b, v2.16b", "eor v2.16b, v2.16b, v4.16b", - "ldr q3, [x28, #3456]", + "ldr q3, [x28, #3248]", "movi v4.2d, #0x0", "uzp1 v2.16b, v2.16b, v4.16b", "and v2.16b, v2.16b, v3.16b", @@ -27811,7 +27811,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -27903,7 +27903,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -27971,7 +27971,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -28063,7 +28063,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -28131,7 +28131,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -28235,7 +28235,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -28307,7 +28307,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -28411,7 +28411,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -28483,7 +28483,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -28528,7 +28528,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -28573,7 +28573,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -28618,7 +28618,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -28663,7 +28663,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -28805,7 +28805,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -28899,7 +28899,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -29041,7 +29041,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -29135,7 +29135,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -29228,7 +29228,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -29297,7 +29297,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -29390,7 +29390,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -29459,7 +29459,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -29564,7 +29564,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -29637,7 +29637,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -29742,7 +29742,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -29815,7 +29815,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -29861,7 +29861,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -29907,7 +29907,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -29953,7 +29953,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -29999,7 +29999,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -30142,7 +30142,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -30237,7 +30237,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -30380,7 +30380,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -30475,7 +30475,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -30567,7 +30567,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -30635,7 +30635,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -30727,7 +30727,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -30795,7 +30795,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -30899,7 +30899,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -30971,7 +30971,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -31075,7 +31075,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -31147,7 +31147,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -31192,7 +31192,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -31237,7 +31237,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -31282,7 +31282,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -31327,7 +31327,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -31469,7 +31469,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -31563,7 +31563,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -31705,7 +31705,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -31799,7 +31799,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -31892,7 +31892,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -31961,7 +31961,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -32054,7 +32054,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -32123,7 +32123,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -32228,7 +32228,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -32301,7 +32301,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -32406,7 +32406,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -32479,7 +32479,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -32525,7 +32525,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -32571,7 +32571,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -32617,7 +32617,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -32663,7 +32663,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -32808,7 +32808,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -32905,7 +32905,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -33050,7 +33050,7 @@ "0x66 0x0f 0x3A 0x62" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -33147,7 +33147,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -33240,7 +33240,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -33309,7 +33309,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -33402,7 +33402,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -33471,7 +33471,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -33576,7 +33576,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -33649,7 +33649,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -33754,7 +33754,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -33827,7 +33827,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -33873,7 +33873,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -33919,7 +33919,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -33965,7 +33965,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -34011,7 +34011,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -34154,7 +34154,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -34249,7 +34249,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -34392,7 +34392,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -34487,7 +34487,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -34581,7 +34581,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -34651,7 +34651,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -34745,7 +34745,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -34815,7 +34815,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -34921,7 +34921,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -34995,7 +34995,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -35101,7 +35101,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -35175,7 +35175,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -35222,7 +35222,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -35269,7 +35269,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -35316,7 +35316,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -35363,7 +35363,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -35507,7 +35507,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -35603,7 +35603,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -35747,7 +35747,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -35843,7 +35843,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -35936,7 +35936,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -36005,7 +36005,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -36098,7 +36098,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -36167,7 +36167,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -36272,7 +36272,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -36345,7 +36345,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -36450,7 +36450,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -36523,7 +36523,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -36569,7 +36569,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -36615,7 +36615,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -36661,7 +36661,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -36707,7 +36707,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -36850,7 +36850,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -36945,7 +36945,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -37088,7 +37088,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -37183,7 +37183,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -37277,7 +37277,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -37347,7 +37347,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -37441,7 +37441,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -37511,7 +37511,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -37617,7 +37617,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -37691,7 +37691,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -37797,7 +37797,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -37871,7 +37871,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -37918,7 +37918,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -37965,7 +37965,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -38012,7 +38012,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -38059,7 +38059,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -38205,7 +38205,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -38303,7 +38303,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -38449,7 +38449,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -38547,7 +38547,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -38646,7 +38646,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -38721,7 +38721,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -38820,7 +38820,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -38895,7 +38895,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -39006,7 +39006,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -39085,7 +39085,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -39196,7 +39196,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -39275,7 +39275,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -39327,7 +39327,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -39379,7 +39379,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -39431,7 +39431,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -39483,7 +39483,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -39631,7 +39631,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -39731,7 +39731,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -39879,7 +39879,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -39979,7 +39979,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -40079,7 +40079,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -40155,7 +40155,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -40255,7 +40255,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -40331,7 +40331,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -40443,7 +40443,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -40523,7 +40523,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -40635,7 +40635,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -40715,7 +40715,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -40768,7 +40768,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -40821,7 +40821,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -40874,7 +40874,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -40927,7 +40927,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -41076,7 +41076,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -41177,7 +41177,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -41326,7 +41326,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -41427,7 +41427,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -41526,7 +41526,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -41601,7 +41601,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -41700,7 +41700,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -41775,7 +41775,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -41886,7 +41886,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -41965,7 +41965,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -42076,7 +42076,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -42155,7 +42155,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -42207,7 +42207,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -42259,7 +42259,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -42311,7 +42311,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -42363,7 +42363,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -42511,7 +42511,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -42611,7 +42611,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -42759,7 +42759,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -42859,7 +42859,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -42959,7 +42959,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -43035,7 +43035,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -43135,7 +43135,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -43211,7 +43211,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -43323,7 +43323,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -43403,7 +43403,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -43515,7 +43515,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -43595,7 +43595,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -43648,7 +43648,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -43701,7 +43701,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -43754,7 +43754,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -43807,7 +43807,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -43958,7 +43958,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", @@ -44061,7 +44061,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3184]", + "ldr q2, [x28, #2976]", "cmeq v3.16b, v16.16b, #0", "movi v4.16b, #0x10", "bsl v3.16b, v2.16b, v4.16b", @@ -44212,7 +44212,7 @@ "0x66 0x0f 0x3A 0x63" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "cmeq v3.8h, v16.8h, #0", "movi v4.8h, #0x8", "bsl v3.16b, v2.16b, v4.16b", diff --git a/unittests/InstructionCountCI/Secondary.json b/unittests/InstructionCountCI/Secondary.json index e0cf345f96..b73c89971e 100644 --- a/unittests/InstructionCountCI/Secondary.json +++ b/unittests/InstructionCountCI/Secondary.json @@ -12,7 +12,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Comment": [ "MMX instructions are defined as optimal without SRA being used for these instructions.", @@ -652,7 +652,7 @@ "Comment": "0x0f 0x50", "ExpectedArm64ASM": [ "ushr v2.4s, v16.4s, #31", - "ldr q3, [x28, #3328]", + "ldr q3, [x28, #3120]", "ushl v2.4s, v2.4s, v3.4s", "addv s2, v2.4s", "mov w4, v2.s[0]" @@ -663,7 +663,7 @@ "Comment": "0x0f 0x50", "ExpectedArm64ASM": [ "ushr v2.4s, v16.4s, #31", - "ldr q3, [x28, #3328]", + "ldr q3, [x28, #3120]", "ushl v2.4s, v2.4s, v3.4s", "addv s2, v2.4s", "mov w4, v2.s[0]" @@ -3549,7 +3549,7 @@ "ExpectedInstructionCount": 3, "Comment": "0x0f 0xc6", "ExpectedArm64ASM": [ - "ldr x0, [x28, #2760]", + "ldr x0, [x28, #2560]", "ldr q2, [x0, #16]", "tbl v16.16b, {v16.16b, v17.16b}, v2.16b" ] @@ -3558,7 +3558,7 @@ "ExpectedInstructionCount": 5, "Comment": "0x0f 0xc6", "ExpectedArm64ASM": [ - "ldr x0, [x28, #2760]", + "ldr x0, [x28, #2560]", "ldr q2, [x0, #16]", "mov v0.16b, v17.16b", "mov v1.16b, v16.16b", @@ -3570,7 +3570,7 @@ "Comment": "0x0f 0xc6", "ExpectedArm64ASM": [ "ldr q2, [x4]", - "ldr x0, [x28, #2760]", + "ldr x0, [x28, #2560]", "ldr q3, [x0, #16]", "mov v0.16b, v16.16b", "mov v1.16b, v2.16b", @@ -3698,7 +3698,7 @@ "mov w20, #0xffff", "strb w20, [x28, #1202]", "ldr d2, [x28, #1056]", - "ldr d3, [x28, #3456]", + "ldr d3, [x28, #3248]", "cmlt v2.16b, v2.16b, #0", "and v2.8b, v2.8b, v3.8b", "addp v2.16b, v2.16b, v2.16b", diff --git a/unittests/InstructionCountCI/SecondaryGroup.json b/unittests/InstructionCountCI/SecondaryGroup.json index 238844ddd9..d59a8ba65e 100644 --- a/unittests/InstructionCountCI/SecondaryGroup.json +++ b/unittests/InstructionCountCI/SecondaryGroup.json @@ -9,9 +9,10 @@ "SVE256", "AFP", "FLAGM", - "FLAGM2" + "FLAGM2", + "TPIDRRO" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "sgdt [rax]": { @@ -23,6 +24,14 @@ "stur x20, [x4, #2]" ] }, + "serialize": { + "ExpectedInstructionCount": 2, + "Comment": "GROUP7 0x0F 0x1 /5", + "ExpectedArm64ASM": [ + "isb", + "dmb st" + ] + }, "bt ax, 0": { "ExpectedInstructionCount": 5, "Comment": "GROUP8 0x0F 0xBA /4", @@ -1033,7 +1042,7 @@ "str x25, [x28, #176]", "str x8, [x28, #64]", "mov w0, #0x100", - "str x0, [x28, #1480]", + "str x0, [x28, #1288]", "sub sp, sp, #0x10 (16)", "mov w8, #0xa8", "mov x0, sp", @@ -1045,7 +1054,7 @@ "ldr w8, [x28, #1032]", "msr nzcv, x8", "ldr x8, [x28, #64]", - "str xzr, [x28, #1480]", + "str xzr, [x28, #1288]", "orr x20, x0, x1, lsl #12", "mov w4, w20" ] @@ -1059,7 +1068,7 @@ "str x25, [x28, #176]", "str x8, [x28, #64]", "mov w0, #0x100", - "str x0, [x28, #1480]", + "str x0, [x28, #1288]", "sub sp, sp, #0x10 (16)", "mov w8, #0xa8", "mov x0, sp", @@ -1071,7 +1080,7 @@ "ldr w8, [x28, #1032]", "msr nzcv, x8", "ldr x8, [x28, #64]", - "str xzr, [x28, #1480]", + "str xzr, [x28, #1288]", "orr x20, x0, x1, lsl #12", "mov w4, w20" ] @@ -1548,7 +1557,7 @@ ] }, "fxsave [rax]": { - "ExpectedInstructionCount": 68, + "ExpectedInstructionCount": 70, "Comment": "GROUP15 0x0F 0xAE /0", "ExpectedArm64ASM": [ "ldrh w20, [x28, #1200]", @@ -1566,6 +1575,8 @@ "ldrb w21, [x28, #1040]", "orr x20, x20, x21", "strh w20, [x4, #2]", + "ldr x20, [x28, #1208]", + "str w20, [x4, #8]", "ldrb w20, [x28, #1202]", "strb w20, [x4, #4]", "ldrb w20, [x28, #1051]", @@ -1636,7 +1647,7 @@ ] }, "fxrstor [rax]": { - "ExpectedInstructionCount": 86, + "ExpectedInstructionCount": 88, "Comment": "GROUP15 0x0F 0xAE /1", "ExpectedArm64ASM": [ "ldrh w20, [x4]", @@ -1654,6 +1665,8 @@ "strb w24, [x28, #1050]", "strb w30, [x28, #1054]", "strb w20, [x28, #1040]", + "ldr w20, [x4, #8]", + "str x20, [x28, #1208]", "ldrb w20, [x4, #4]", "strb w20, [x28, #1202]", "mov x20, #0xffffffffffffffff", @@ -1798,12 +1811,12 @@ ] }, "xsave [rax]": { - "ExpectedInstructionCount": 98, + "ExpectedInstructionCount": 100, "Comment": "GROUP15 0x0F 0xAE /4", "ExpectedArm64ASM": [ "ubfx x20, x4, #0, #1", "cbnz x20, #+0x8", - "b #+0xe4", + "b #+0xec", "ldrh w20, [x28, #1200]", "strh w20, [x4]", "ldrb w20, [x28, #1051]", @@ -1819,6 +1832,8 @@ "ldrb w21, [x28, #1040]", "orr x20, x20, x21", "strh w20, [x4, #2]", + "ldr x20, [x28, #1208]", + "str w20, [x4, #8]", "ldrb w20, [x28, #1202]", "strb w20, [x4, #4]", "ldrb w20, [x28, #1051]", @@ -1909,14 +1924,14 @@ ] }, "xrstor [rax]": { - "ExpectedInstructionCount": 171, + "ExpectedInstructionCount": 174, "Comment": "GROUP15 0x0F 0xAE /5", "ExpectedArm64ASM": [ "sub sp, sp, #0x40 (64)", "ldr x20, [x4, #512]", "ubfx x20, x20, #0, #1", "cbnz x20, #+0x8", - "b #+0x114", + "b #+0x11c", "ldrh w20, [x4]", "strh w20, [x28, #1200]", "ldrh w20, [x4, #2]", @@ -1932,6 +1947,8 @@ "strb w24, [x28, #1050]", "strb w30, [x28, #1054]", "strb w20, [x28, #1040]", + "ldr w20, [x4, #8]", + "str x20, [x28, #1208]", "ldrb w20, [x4, #4]", "strb w20, [x28, #1202]", "mov x20, #0xffffffffffffffff", @@ -1984,7 +2001,7 @@ "and v2.16b, v3.16b, v2.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1056]", - "b #+0x4c", + "b #+0x50", "mov w20, #0x37f", "strh w20, [x28, #1200]", "strb wzr, [x28, #1051]", @@ -1994,6 +2011,7 @@ "strb wzr, [x28, #1050]", "strb wzr, [x28, #1054]", "strb wzr, [x28, #1040]", + "str xzr, [x28, #1208]", "movi v2.2d, #0x0", "str q2, [x28, #1056]", "str q2, [x28, #1072]", diff --git a/unittests/InstructionCountCI/SecondaryModRM.json b/unittests/InstructionCountCI/SecondaryModRM.json index 102276a447..81fd37cf1f 100644 --- a/unittests/InstructionCountCI/SecondaryModRM.json +++ b/unittests/InstructionCountCI/SecondaryModRM.json @@ -11,7 +11,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "xgetbv": { @@ -43,8 +43,8 @@ "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x3], #64", "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x3], #64", "mov w1, w7", - "ldr x0, [x28, #1552]", - "ldr x2, [x28, #1568]", + "ldr x0, [x28, #1360]", + "ldr x2, [x28, #1376]", "blr x2", "ldr x25, [x28, #176]", "ldr w4, [x28, #1032]", diff --git a/unittests/InstructionCountCI/Secondary_32Bit.json b/unittests/InstructionCountCI/Secondary_32Bit.json index c672ec0992..fc95f5b486 100644 --- a/unittests/InstructionCountCI/Secondary_32Bit.json +++ b/unittests/InstructionCountCI/Secondary_32Bit.json @@ -7,7 +7,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "push fs": { diff --git a/unittests/InstructionCountCI/Secondary_OpSize.json b/unittests/InstructionCountCI/Secondary_OpSize.json index b63e3316c4..f91d4de4a6 100644 --- a/unittests/InstructionCountCI/Secondary_OpSize.json +++ b/unittests/InstructionCountCI/Secondary_OpSize.json @@ -12,7 +12,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "movupd xmm0, xmm0": { @@ -526,7 +526,7 @@ "0x66 0x0f 0x70" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q2, [x0, #16]", "tbl v16.16b, {v17.16b}, v2.16b" ] @@ -540,7 +540,7 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x4]", - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q3, [x0, #16]", "tbl v16.16b, {v2.16b}, v3.16b" ] @@ -678,7 +678,7 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x4]", - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q3, [x0, #2480]", "tbl v16.16b, {v2.16b}, v3.16b" ] @@ -1260,7 +1260,7 @@ "ExpectedInstructionCount": 3, "Comment": "0x66 0x0f 0xd0", "ExpectedArm64ASM": [ - "ldr q2, [x28, #3232]", + "ldr q2, [x28, #3024]", "eor v2.16b, v17.16b, v2.16b", "fadd v16.2d, v16.2d, v2.2d" ] @@ -1316,7 +1316,7 @@ "ExpectedInstructionCount": 7, "Comment": "0x66 0x0f 0xd7", "ExpectedArm64ASM": [ - "ldr q2, [x28, #3456]", + "ldr q2, [x28, #3248]", "cmlt v3.16b, v16.16b, #0", "and v2.16b, v3.16b, v2.16b", "addp v2.16b, v2.16b, v2.16b", diff --git a/unittests/InstructionCountCI/Secondary_OpSize_FCMA.json b/unittests/InstructionCountCI/Secondary_OpSize_FCMA.json index 04e77d85b4..32af62bd95 100644 --- a/unittests/InstructionCountCI/Secondary_OpSize_FCMA.json +++ b/unittests/InstructionCountCI/Secondary_OpSize_FCMA.json @@ -9,7 +9,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "addsubpd xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Secondary_OpSize_SVE128.json b/unittests/InstructionCountCI/Secondary_OpSize_SVE128.json index d47a65c9e2..58cd9ecccd 100644 --- a/unittests/InstructionCountCI/Secondary_OpSize_SVE128.json +++ b/unittests/InstructionCountCI/Secondary_OpSize_SVE128.json @@ -8,7 +8,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "psrlw xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Secondary_OpSize_SVE256.json b/unittests/InstructionCountCI/Secondary_OpSize_SVE256.json index 8886f8b853..c08f303d88 100644 --- a/unittests/InstructionCountCI/Secondary_OpSize_SVE256.json +++ b/unittests/InstructionCountCI/Secondary_OpSize_SVE256.json @@ -7,7 +7,7 @@ "AFP" ], "DisabledHostFeatures": [], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "pmulhuw xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Secondary_REP.json b/unittests/InstructionCountCI/Secondary_REP.json index cf41f7c085..ad330b58bd 100644 --- a/unittests/InstructionCountCI/Secondary_REP.json +++ b/unittests/InstructionCountCI/Secondary_REP.json @@ -12,7 +12,7 @@ "FRINTTS", "CSSC" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "movss xmm0, xmm1": { @@ -119,7 +119,7 @@ "ExpectedArm64ASM": [ "fcvtzs w20, s16", "mov w21, #0x80000000", - "ldr s2, [x28, #3616]", + "ldr s2, [x28, #3408]", "mrs x22, nzcv", "fcmp s2, s16", "csel w4, w20, w21, gt", @@ -133,7 +133,7 @@ "ldr s2, [x6]", "fcvtzs w20, s2", "mov w21, #0x80000000", - "ldr s3, [x28, #3616]", + "ldr s3, [x28, #3408]", "mrs x22, nzcv", "fcmp s3, s2", "csel w4, w20, w21, gt", @@ -146,7 +146,7 @@ "ExpectedArm64ASM": [ "fcvtzs x20, s16", "mov x21, #0x8000000000000000", - "ldr s2, [x28, #3648]", + "ldr s2, [x28, #3440]", "mrs x22, nzcv", "fcmp s2, s16", "csel x4, x20, x21, gt", @@ -160,7 +160,7 @@ "ldr s2, [x6]", "fcvtzs x20, s2", "mov x21, #0x8000000000000000", - "ldr s3, [x28, #3648]", + "ldr s3, [x28, #3440]", "mrs x22, nzcv", "fcmp s3, s2", "csel x4, x20, x21, gt", @@ -174,7 +174,7 @@ "frinti s2, s16", "fcvtzs w20, s2", "mov w21, #0x80000000", - "ldr s3, [x28, #3616]", + "ldr s3, [x28, #3408]", "mrs x22, nzcv", "fcmp s3, s2", "csel w4, w20, w21, gt", @@ -189,7 +189,7 @@ "frinti s2, s2", "fcvtzs w20, s2", "mov w21, #0x80000000", - "ldr s3, [x28, #3616]", + "ldr s3, [x28, #3408]", "mrs x22, nzcv", "fcmp s3, s2", "csel w4, w20, w21, gt", @@ -203,7 +203,7 @@ "frinti s2, s16", "fcvtzs x20, s2", "mov x21, #0x8000000000000000", - "ldr s3, [x28, #3648]", + "ldr s3, [x28, #3440]", "mrs x22, nzcv", "fcmp s3, s2", "csel x4, x20, x21, gt", @@ -218,7 +218,7 @@ "frinti s2, s2", "fcvtzs x20, s2", "mov x21, #0x8000000000000000", - "ldr s3, [x28, #3648]", + "ldr s3, [x28, #3440]", "mrs x22, nzcv", "fcmp s3, s2", "csel x4, x20, x21, gt", @@ -297,8 +297,8 @@ "ExpectedInstructionCount": 6, "Comment": "0xf3 0x0f 0x5b", "ExpectedArm64ASM": [ - "ldr q2, [x28, #3712]", - "ldr q3, [x28, #3616]", + "ldr q2, [x28, #3504]", + "ldr q3, [x28, #3408]", "fcvtzs v4.4s, v17.4s", "fcmgt v3.4s, v3.4s, v17.4s", "mov v16.16b, v3.16b", @@ -398,7 +398,7 @@ "0xf3 0x0f 0x70" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2744]", + "ldr x0, [x28, #2544]", "ldr q2, [x0, #1280]", "tbl v16.16b, {v17.16b}, v2.16b" ] @@ -411,7 +411,7 @@ "0xf3 0x0f 0x70" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2744]", + "ldr x0, [x28, #2544]", "ldr q2, [x0, #16]", "tbl v16.16b, {v17.16b}, v2.16b" ] diff --git a/unittests/InstructionCountCI/Secondary_REPNE.json b/unittests/InstructionCountCI/Secondary_REPNE.json index bba50eb2eb..733ceb4742 100644 --- a/unittests/InstructionCountCI/Secondary_REPNE.json +++ b/unittests/InstructionCountCI/Secondary_REPNE.json @@ -10,7 +10,7 @@ "FCMA", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "movsd xmm0, xmm1": { @@ -291,7 +291,7 @@ "0xf2 0x0f 0x70" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2736]", + "ldr x0, [x28, #2536]", "ldr q2, [x0, #1280]", "tbl v16.16b, {v17.16b}, v2.16b" ] @@ -304,7 +304,7 @@ "0xf2 0x0f 0x70" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2736]", + "ldr x0, [x28, #2536]", "ldr q2, [x0, #16]", "tbl v16.16b, {v17.16b}, v2.16b" ] @@ -500,7 +500,7 @@ "ExpectedInstructionCount": 3, "Comment": "0xf2 0x0f 0xd0", "ExpectedArm64ASM": [ - "ldr q2, [x28, #3200]", + "ldr q2, [x28, #2992]", "eor v2.16b, v17.16b, v2.16b", "fadd v16.4s, v16.4s, v2.4s" ] diff --git a/unittests/InstructionCountCI/Secondary_REPNE_FCMA.json b/unittests/InstructionCountCI/Secondary_REPNE_FCMA.json index bb04cf0fdf..708985576f 100644 --- a/unittests/InstructionCountCI/Secondary_REPNE_FCMA.json +++ b/unittests/InstructionCountCI/Secondary_REPNE_FCMA.json @@ -9,7 +9,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "addsubps xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Secondary_REPNE_SVE128.json b/unittests/InstructionCountCI/Secondary_REPNE_SVE128.json index 33df51ae0c..5c7ee31f9d 100644 --- a/unittests/InstructionCountCI/Secondary_REPNE_SVE128.json +++ b/unittests/InstructionCountCI/Secondary_REPNE_SVE128.json @@ -10,7 +10,7 @@ "FCMA", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "cvtpd2dq xmm0, xmm1": { diff --git a/unittests/InstructionCountCI/Secondary_REP_FRINTTS.json b/unittests/InstructionCountCI/Secondary_REP_FRINTTS.json index d82e54d369..ce9c73a145 100644 --- a/unittests/InstructionCountCI/Secondary_REP_FRINTTS.json +++ b/unittests/InstructionCountCI/Secondary_REP_FRINTTS.json @@ -12,7 +12,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "cvttss2si eax, xmm0": { diff --git a/unittests/InstructionCountCI/Secondary_SVE128.json b/unittests/InstructionCountCI/Secondary_SVE128.json index be910c43a5..ff272e62b0 100644 --- a/unittests/InstructionCountCI/Secondary_SVE128.json +++ b/unittests/InstructionCountCI/Secondary_SVE128.json @@ -8,7 +8,7 @@ "SVE256", "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "movmskps eax, xmm0": { diff --git a/unittests/InstructionCountCI/VEX_map1.json b/unittests/InstructionCountCI/VEX_map1.json index ef9bdc90e6..eb6fa246c2 100644 --- a/unittests/InstructionCountCI/VEX_map1.json +++ b/unittests/InstructionCountCI/VEX_map1.json @@ -13,7 +13,7 @@ "FLAGM2", "FRINTTS" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vmovups xmm0, xmm0": { @@ -927,7 +927,7 @@ "sqxtnb z2.b, z17.h", "uzp1 z2.b, z2.b, z2.b", "splice z2.b, p6, z2.b, z1.b", - "ldr x0, [x28, #2568]", + "ldr x0, [x28, #2368]", "ld1b {z3.b}, p7/z, [x0]", "tbl z16.b, {z2.b}, z3.b" ] @@ -1022,7 +1022,7 @@ "sqxtunb z2.b, z17.h", "uzp1 z2.b, z2.b, z2.b", "splice z2.b, p6, z2.b, z1.b", - "ldr x0, [x28, #2568]", + "ldr x0, [x28, #2368]", "ld1b {z3.b}, p7/z, [x0]", "tbl z16.b, {z2.b}, z3.b" ] @@ -1042,7 +1042,7 @@ "Map 1 0b01 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q2, [x0, #16]", "tbl v16.16b, {v17.16b}, v2.16b" ] @@ -1053,7 +1053,7 @@ "Map 1 0b01 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q2, [x0, #32]", "tbl v16.16b, {v17.16b}, v2.16b" ] @@ -1064,7 +1064,7 @@ "Map 1 0b01 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q2, [x0, #48]", "tbl v16.16b, {v17.16b}, v2.16b" ] @@ -1100,7 +1100,7 @@ ], "ExpectedArm64ASM": [ "mov z2.q, z17.q[1]", - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q3, [x0, #16]", "tbl v2.16b, {v2.16b}, v3.16b", "tbl v3.16b, {v17.16b}, v3.16b", @@ -1117,7 +1117,7 @@ ], "ExpectedArm64ASM": [ "mov z2.q, z17.q[1]", - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q3, [x0, #32]", "tbl v2.16b, {v2.16b}, v3.16b", "tbl v3.16b, {v17.16b}, v3.16b", @@ -1134,7 +1134,7 @@ ], "ExpectedArm64ASM": [ "mov z2.q, z17.q[1]", - "ldr x0, [x28, #2752]", + "ldr x0, [x28, #2552]", "ldr q3, [x0, #48]", "tbl v2.16b, {v2.16b}, v3.16b", "tbl v3.16b, {v17.16b}, v3.16b", @@ -1173,7 +1173,7 @@ "Map 1 0b10 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2744]", + "ldr x0, [x28, #2544]", "ldr q2, [x0, #16]", "tbl v16.16b, {v17.16b}, v2.16b" ] @@ -1184,7 +1184,7 @@ "Map 1 0b10 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2744]", + "ldr x0, [x28, #2544]", "ldr q2, [x0, #32]", "tbl v16.16b, {v17.16b}, v2.16b" ] @@ -1195,7 +1195,7 @@ "Map 1 0b10 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2744]", + "ldr x0, [x28, #2544]", "ldr q2, [x0, #48]", "tbl v16.16b, {v17.16b}, v2.16b" ] @@ -1233,7 +1233,7 @@ ], "ExpectedArm64ASM": [ "mov z2.q, z17.q[1]", - "ldr x0, [x28, #2744]", + "ldr x0, [x28, #2544]", "ldr q3, [x0, #16]", "tbl v2.16b, {v2.16b}, v3.16b", "tbl v3.16b, {v17.16b}, v3.16b", @@ -1250,7 +1250,7 @@ ], "ExpectedArm64ASM": [ "mov z2.q, z17.q[1]", - "ldr x0, [x28, #2744]", + "ldr x0, [x28, #2544]", "ldr q3, [x0, #32]", "tbl v2.16b, {v2.16b}, v3.16b", "tbl v3.16b, {v17.16b}, v3.16b", @@ -1267,7 +1267,7 @@ ], "ExpectedArm64ASM": [ "mov z2.q, z17.q[1]", - "ldr x0, [x28, #2744]", + "ldr x0, [x28, #2544]", "ldr q3, [x0, #48]", "tbl v2.16b, {v2.16b}, v3.16b", "tbl v3.16b, {v17.16b}, v3.16b", @@ -1306,7 +1306,7 @@ "Map 1 0b11 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2736]", + "ldr x0, [x28, #2536]", "ldr q2, [x0, #16]", "tbl v16.16b, {v17.16b}, v2.16b" ] @@ -1317,7 +1317,7 @@ "Map 1 0b11 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2736]", + "ldr x0, [x28, #2536]", "ldr q2, [x0, #32]", "tbl v16.16b, {v17.16b}, v2.16b" ] @@ -1328,7 +1328,7 @@ "Map 1 0b11 0x70 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2736]", + "ldr x0, [x28, #2536]", "ldr q2, [x0, #48]", "tbl v16.16b, {v17.16b}, v2.16b" ] @@ -1366,7 +1366,7 @@ ], "ExpectedArm64ASM": [ "mov z2.q, z17.q[1]", - "ldr x0, [x28, #2736]", + "ldr x0, [x28, #2536]", "ldr q3, [x0, #16]", "tbl v2.16b, {v2.16b}, v3.16b", "tbl v3.16b, {v17.16b}, v3.16b", @@ -1383,7 +1383,7 @@ ], "ExpectedArm64ASM": [ "mov z2.q, z17.q[1]", - "ldr x0, [x28, #2736]", + "ldr x0, [x28, #2536]", "ldr q3, [x0, #32]", "tbl v2.16b, {v2.16b}, v3.16b", "tbl v3.16b, {v17.16b}, v3.16b", @@ -1400,7 +1400,7 @@ ], "ExpectedArm64ASM": [ "mov z2.q, z17.q[1]", - "ldr x0, [x28, #2736]", + "ldr x0, [x28, #2536]", "ldr q3, [x0, #48]", "tbl v2.16b, {v2.16b}, v3.16b", "tbl v3.16b, {v17.16b}, v3.16b", @@ -2526,7 +2526,7 @@ "Map 1 0b00 0xC6 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2760]", + "ldr x0, [x28, #2560]", "ldr q2, [x0, #16]", "tbl v16.16b, {v17.16b, v18.16b}, v2.16b" ] @@ -2537,7 +2537,7 @@ "Map 1 0b00 0xC6 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2760]", + "ldr x0, [x28, #2560]", "ldr q2, [x0, #32]", "tbl v16.16b, {v17.16b, v18.16b}, v2.16b" ] @@ -2548,7 +2548,7 @@ "Map 1 0b00 0xC6 128-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2760]", + "ldr x0, [x28, #2560]", "ldr q2, [x0, #48]", "tbl v16.16b, {v17.16b, v18.16b}, v2.16b" ] @@ -2603,7 +2603,7 @@ "ExpectedArm64ASM": [ "mov z2.q, z17.q[1]", "mov z3.q, z18.q[1]", - "ldr x0, [x28, #2760]", + "ldr x0, [x28, #2560]", "ldr q4, [x0, #16]", "tbl v5.16b, {v17.16b, v18.16b}, v4.16b", "tbl v2.16b, {v2.16b, v3.16b}, v4.16b", @@ -2621,7 +2621,7 @@ "ExpectedArm64ASM": [ "mov z2.q, z17.q[1]", "mov z3.q, z18.q[1]", - "ldr x0, [x28, #2760]", + "ldr x0, [x28, #2560]", "ldr q4, [x0, #32]", "tbl v5.16b, {v17.16b, v18.16b}, v4.16b", "tbl v2.16b, {v2.16b, v3.16b}, v4.16b", @@ -2639,7 +2639,7 @@ "ExpectedArm64ASM": [ "mov z2.q, z17.q[1]", "mov z3.q, z18.q[1]", - "ldr x0, [x28, #2760]", + "ldr x0, [x28, #2560]", "ldr q4, [x0, #48]", "tbl v5.16b, {v17.16b, v18.16b}, v4.16b", "tbl v2.16b, {v2.16b, v3.16b}, v4.16b", @@ -3168,7 +3168,7 @@ "ExpectedArm64ASM": [ "fcvtzs w20, s16", "mov w21, #0x80000000", - "ldr s2, [x28, #3616]", + "ldr s2, [x28, #3408]", "mrs x22, nzcv", "fcmp s2, s16", "csel w4, w20, w21, gt", @@ -3183,7 +3183,7 @@ "ExpectedArm64ASM": [ "fcvtzs x20, s16", "mov x21, #0x8000000000000000", - "ldr s2, [x28, #3648]", + "ldr s2, [x28, #3440]", "mrs x22, nzcv", "fcmp s2, s16", "csel x4, x20, x21, gt", @@ -3198,7 +3198,7 @@ "ExpectedArm64ASM": [ "fcvtzs w20, d16", "mov w21, #0x80000000", - "ldr d2, [x28, #3664]", + "ldr d2, [x28, #3456]", "mrs x22, nzcv", "fcmp d2, d16", "csel w4, w20, w21, gt", @@ -3213,7 +3213,7 @@ "ExpectedArm64ASM": [ "fcvtzs x20, d16", "mov x21, #0x8000000000000000", - "ldr d2, [x28, #3696]", + "ldr d2, [x28, #3488]", "mrs x22, nzcv", "fcmp d2, d16", "csel x4, x20, x21, gt", @@ -3229,7 +3229,7 @@ "frinti s2, s16", "fcvtzs w20, s2", "mov w21, #0x80000000", - "ldr s3, [x28, #3616]", + "ldr s3, [x28, #3408]", "mrs x22, nzcv", "fcmp s3, s2", "csel w4, w20, w21, gt", @@ -3245,7 +3245,7 @@ "frinti s2, s16", "fcvtzs x20, s2", "mov x21, #0x8000000000000000", - "ldr s3, [x28, #3648]", + "ldr s3, [x28, #3440]", "mrs x22, nzcv", "fcmp s3, s2", "csel x4, x20, x21, gt", @@ -3261,7 +3261,7 @@ "frinti d2, d16", "fcvtzs w20, d2", "mov w21, #0x80000000", - "ldr d3, [x28, #3664]", + "ldr d3, [x28, #3456]", "mrs x22, nzcv", "fcmp d3, d2", "csel w4, w20, w21, gt", @@ -3277,7 +3277,7 @@ "frinti d2, d16", "fcvtzs x20, d2", "mov x21, #0x8000000000000000", - "ldr d3, [x28, #3696]", + "ldr d3, [x28, #3488]", "mrs x22, nzcv", "fcmp d3, d2", "csel x4, x20, x21, gt", @@ -3626,8 +3626,8 @@ ], "ExpectedArm64ASM": [ "frinti v2.4s, v17.4s", - "ldr q3, [x28, #3712]", - "ldr q4, [x28, #3616]", + "ldr q3, [x28, #3504]", + "ldr q4, [x28, #3408]", "fcvtzs v5.4s, v2.4s", "fcmgt v2.4s, v4.4s, v2.4s", "mov v16.16b, v2.16b", @@ -3641,9 +3641,9 @@ ], "ExpectedArm64ASM": [ "frinti z2.s, p7/m, z17.s", - "ldr x0, [x28, #2680]", + "ldr x0, [x28, #2480]", "ld1b {z3.b}, p7/z, [x0]", - "ldr x0, [x28, #2632]", + "ldr x0, [x28, #2432]", "ld1b {z4.b}, p7/z, [x0]", "fcvtzs z5.s, p7/m, z2.s", "fcmgt p0.s, p7/z, z4.s, z2.s", @@ -3661,8 +3661,8 @@ "Map 1 0b10 0x5b 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3712]", - "ldr q3, [x28, #3616]", + "ldr q2, [x28, #3504]", + "ldr q3, [x28, #3408]", "fcvtzs v4.4s, v17.4s", "fcmgt v3.4s, v3.4s, v17.4s", "mov v16.16b, v3.16b", @@ -3675,9 +3675,9 @@ "Map 1 0b10 0x5b 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2680]", + "ldr x0, [x28, #2480]", "ld1b {z2.b}, p7/z, [x0]", - "ldr x0, [x28, #2632]", + "ldr x0, [x28, #2432]", "ld1b {z3.b}, p7/z, [x0]", "fcvtzs z4.s, p7/m, z17.s", "fcmgt p0.s, p7/z, z3.s, z17.s", @@ -4090,7 +4090,7 @@ "sqxtnb z2.h, z17.s", "uzp1 z2.h, z2.h, z2.h", "splice z2.h, p6, z2.h, z1.h", - "ldr x0, [x28, #2568]", + "ldr x0, [x28, #2368]", "ld1b {z3.b}, p7/z, [x0]", "tbl z16.b, {z2.b}, z3.b" ] @@ -4214,7 +4214,7 @@ "uzp1 z2.d, z0.d, z0.d", "uzp2 z1.d, z0.d, z0.d", "splice z2.d, p6, z2.d, z1.d", - "ldr x0, [x28, #2568]", + "ldr x0, [x28, #2368]", "ld1b {z3.b}, p7/z, [x0]", "tbl z16.b, {z2.b}, z3.b" ] @@ -4239,7 +4239,7 @@ "uzp1 z2.s, z0.s, z0.s", "uzp2 z1.s, z0.s, z0.s", "splice z2.d, p6, z2.d, z1.d", - "ldr x0, [x28, #2568]", + "ldr x0, [x28, #2368]", "ld1b {z3.b}, p7/z, [x0]", "tbl z16.b, {z2.b}, z3.b" ] @@ -4264,7 +4264,7 @@ "uzp1 z2.d, z17.d, z18.d", "uzp2 z3.d, z17.d, z18.d", "fsub z2.d, z2.d, z3.d", - "ldr x0, [x28, #2568]", + "ldr x0, [x28, #2368]", "ld1b {z3.b}, p7/z, [x0]", "tbl z16.b, {z2.b}, z3.b" ] @@ -4289,7 +4289,7 @@ "uzp1 z2.s, z17.s, z18.s", "uzp2 z3.s, z17.s, z18.s", "fsub z2.s, z2.s, z3.s", - "ldr x0, [x28, #2568]", + "ldr x0, [x28, #2368]", "ld1b {z3.b}, p7/z, [x0]", "tbl z16.b, {z2.b}, z3.b" ] @@ -4356,7 +4356,7 @@ "Map 1 0b01 0xd0 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3232]", + "ldr q2, [x28, #3024]", "eor v2.16b, v18.16b, v2.16b", "fadd v16.2d, v17.2d, v2.2d" ] @@ -4367,7 +4367,7 @@ "Map 1 0b01 0xd0 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2440]", + "ldr x0, [x28, #2240]", "ld1b {z2.b}, p7/z, [x0]", "eor z2.d, z18.d, z2.d", "fadd z16.d, z17.d, z2.d" @@ -4379,7 +4379,7 @@ "Map 1 0b11 0xd0 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3200]", + "ldr q2, [x28, #2992]", "eor v2.16b, v18.16b, v2.16b", "fadd v16.4s, v17.4s, v2.4s" ] @@ -4390,7 +4390,7 @@ "Map 1 0b11 0xd0 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2424]", + "ldr x0, [x28, #2224]", "ld1b {z2.b}, p7/z, [x0]", "eor z2.d, z18.d, z2.d", "fadd z16.s, z17.s, z2.s" @@ -4514,7 +4514,7 @@ "Map 1 0b01 0xd7 256-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3456]", + "ldr q2, [x28, #3248]", "cmlt v3.16b, v16.16b, #0", "and v2.16b, v3.16b, v2.16b", "addp v2.16b, v2.16b, v2.16b", @@ -4529,7 +4529,7 @@ "Map 1 0b01 0xd7 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2552]", + "ldr x0, [x28, #2352]", "ld1b {z2.b}, p7/z, [x0]", "mrs x0, nzcv", "mov z0.d, #0", @@ -4903,8 +4903,8 @@ "Map 1 0b01 0xe6 128-bit" ], "ExpectedArm64ASM": [ - "ldr d2, [x28, #3712]", - "ldr q3, [x28, #3664]", + "ldr d2, [x28, #3504]", + "ldr q3, [x28, #3456]", "fcvtzs z4.s, p6/m, z17.d", "uzp1 z4.s, z4.s, z4.s", "mov v4.8b, v4.8b", @@ -4920,8 +4920,8 @@ "Map 1 0b01 0xe6 256-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3712]", - "ldr x0, [x28, #2656]", + "ldr q2, [x28, #3504]", + "ldr x0, [x28, #2456]", "ld1b {z3.b}, p7/z, [x0]", "fcvtzs z4.s, p7/m, z17.d", "uzp1 z4.s, z4.s, z4.s", @@ -4964,8 +4964,8 @@ ], "ExpectedArm64ASM": [ "frinti v2.2d, v17.2d", - "ldr d3, [x28, #3712]", - "ldr q4, [x28, #3664]", + "ldr d3, [x28, #3504]", + "ldr q4, [x28, #3456]", "fcvtzs z5.s, p6/m, z2.d", "uzp1 z5.s, z5.s, z5.s", "mov v5.8b, v5.8b", @@ -4982,8 +4982,8 @@ ], "ExpectedArm64ASM": [ "frinti z2.d, p7/m, z17.d", - "ldr q3, [x28, #3712]", - "ldr x0, [x28, #2656]", + "ldr q3, [x28, #3504]", + "ldr x0, [x28, #2456]", "ld1b {z4.b}, p7/z, [x0]", "fcvtzs z5.s, p7/m, z2.d", "uzp1 z5.s, z5.s, z5.s", diff --git a/unittests/InstructionCountCI/VEX_map1_FCMA.json b/unittests/InstructionCountCI/VEX_map1_FCMA.json index ff2cc18001..018084b91f 100644 --- a/unittests/InstructionCountCI/VEX_map1_FCMA.json +++ b/unittests/InstructionCountCI/VEX_map1_FCMA.json @@ -8,7 +8,7 @@ "FCMA" ], "DisabledHostFeatures": [], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vaddsubpd xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/VEX_map1_FRINTTS.json b/unittests/InstructionCountCI/VEX_map1_FRINTTS.json index 708daffbdc..281926a2ce 100644 --- a/unittests/InstructionCountCI/VEX_map1_FRINTTS.json +++ b/unittests/InstructionCountCI/VEX_map1_FRINTTS.json @@ -13,7 +13,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vcvttss2si eax, xmm0": { @@ -113,9 +113,9 @@ ], "ExpectedArm64ASM": [ "frinti z2.s, p7/m, z17.s", - "ldr x0, [x28, #2680]", + "ldr x0, [x28, #2480]", "ld1b {z3.b}, p7/z, [x0]", - "ldr x0, [x28, #2632]", + "ldr x0, [x28, #2432]", "ld1b {z4.b}, p7/z, [x0]", "fcvtzs z5.s, p7/m, z2.s", "fcmgt p0.s, p7/z, z4.s, z2.s", @@ -143,9 +143,9 @@ "Map 1 0b10 0x5b 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2680]", + "ldr x0, [x28, #2480]", "ld1b {z2.b}, p7/z, [x0]", - "ldr x0, [x28, #2632]", + "ldr x0, [x28, #2432]", "ld1b {z3.b}, p7/z, [x0]", "fcvtzs z4.s, p7/m, z17.s", "fcmgt p0.s, p7/z, z3.s, z17.s", @@ -174,8 +174,8 @@ "Map 1 0b01 0xe6 256-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3712]", - "ldr x0, [x28, #2656]", + "ldr q2, [x28, #3504]", + "ldr x0, [x28, #2456]", "ld1b {z3.b}, p7/z, [x0]", "fcvtzs z4.s, p7/m, z17.d", "uzp1 z4.s, z4.s, z4.s", @@ -209,8 +209,8 @@ ], "ExpectedArm64ASM": [ "frinti z2.d, p7/m, z17.d", - "ldr q3, [x28, #3712]", - "ldr x0, [x28, #2656]", + "ldr q3, [x28, #3504]", + "ldr x0, [x28, #2456]", "ld1b {z4.b}, p7/z, [x0]", "fcvtzs z5.s, p7/m, z2.d", "uzp1 z5.s, z5.s, z5.s", diff --git a/unittests/InstructionCountCI/VEX_map2.json b/unittests/InstructionCountCI/VEX_map2.json index e4226177c3..31e9651616 100644 --- a/unittests/InstructionCountCI/VEX_map2.json +++ b/unittests/InstructionCountCI/VEX_map2.json @@ -3,7 +3,8 @@ "Bitness": 64, "EnabledHostFeatures": [ "SVE256", - "SVE128" + "SVE128", + "BF16" ], "DisabledHostFeatures": [ "AFP", @@ -13,7 +14,7 @@ "I8MM", "DOTPROD" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vpshufb xmm0, xmm1, xmm2": { @@ -64,7 +65,7 @@ "uzp2 z1.h, z0.h, z0.h", "uzp1 z2.h, z0.h, z0.h", "splice z2.d, p6, z2.d, z1.d", - "ldr x0, [x28, #2568]", + "ldr x0, [x28, #2368]", "ld1b {z3.b}, p7/z, [x0]", "tbl z16.b, {z2.b}, z3.b" ] @@ -89,7 +90,7 @@ "uzp2 z1.s, z0.s, z0.s", "uzp1 z2.s, z0.s, z0.s", "splice z2.d, p6, z2.d, z1.d", - "ldr x0, [x28, #2568]", + "ldr x0, [x28, #2368]", "ld1b {z3.b}, p7/z, [x0]", "tbl z16.b, {z2.b}, z3.b" ] @@ -114,7 +115,7 @@ "uzp1 z2.h, z17.h, z18.h", "uzp2 z3.h, z17.h, z18.h", "sqadd z2.h, z2.h, z3.h", - "ldr x0, [x28, #2568]", + "ldr x0, [x28, #2368]", "ld1b {z3.b}, p7/z, [x0]", "tbl z16.b, {z2.b}, z3.b" ] @@ -173,7 +174,7 @@ "uzp1 z2.h, z17.h, z18.h", "uzp2 z3.h, z17.h, z18.h", "sub z2.h, z2.h, z3.h", - "ldr x0, [x28, #2568]", + "ldr x0, [x28, #2368]", "ld1b {z3.b}, p7/z, [x0]", "tbl z16.b, {z2.b}, z3.b" ] @@ -198,7 +199,7 @@ "uzp1 z2.s, z17.s, z18.s", "uzp2 z3.s, z17.s, z18.s", "sub z2.s, z2.s, z3.s", - "ldr x0, [x28, #2568]", + "ldr x0, [x28, #2368]", "ld1b {z3.b}, p7/z, [x0]", "tbl z16.b, {z2.b}, z3.b" ] @@ -223,7 +224,7 @@ "uzp1 z2.h, z17.h, z18.h", "uzp2 z3.h, z17.h, z18.h", "sqsub z2.h, z2.h, z3.h", - "ldr x0, [x28, #2568]", + "ldr x0, [x28, #2368]", "ld1b {z3.b}, p7/z, [x0]", "tbl z16.b, {z2.b}, z3.b" ] @@ -917,7 +918,7 @@ "sqxtunb z2.h, z17.s", "uzp1 z2.h, z2.h, z2.h", "splice z2.h, p6, z2.h, z1.h", - "ldr x0, [x28, #2568]", + "ldr x0, [x28, #2368]", "ld1b {z3.b}, p7/z, [x0]", "tbl z16.b, {z2.b}, z3.b" ] @@ -1511,7 +1512,7 @@ "Map 2 0b01 0x41 256-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3152]", + "ldr q2, [x28, #2944]", "zip1 v3.8h, v2.8h, v17.8h", "zip2 v2.8h, v2.8h, v17.8h", "umin v2.4s, v3.4s, v2.4s", @@ -1745,6 +1746,210 @@ "sqadd z16.s, z16.s, z2.s" ] }, + "db 0xc4, 0xe2, 0x73, 0x50, 0xc2; {vex} vpdpbssd xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf2 0b01 0x50 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x77, 0x50, 0xc2 ; {vex} vpdpbssd ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf2 0b01 0x50 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x73, 0x51, 0xc2 ; {vex} vpdpbssds xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf2 0b01 0x51 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x77, 0x51, 0xc2 ; {vex} vpdpbssds ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf2 0b01 0x51 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x72, 0x50, 0xc2 ; {vex} vpdpbsud xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0x50 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x76, 0x50, 0xc2 ; {vex} vpdpbsud ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0x50 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x72, 0x51, 0xc2 ; {vex} vpdpbsuds xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0x51 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x76, 0x51, 0xc2 ; {vex} vpdpbsuds ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0x51 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x70, 0x50, 0xc2 ; {vex} vpdpbuud xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0x50 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x74, 0x50, 0xc2 ; {vex} vpdpbuud ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0x50 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x70, 0x51, 0xc2; {vex} vpdpbuuds xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0x51 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x74, 0x51, 0xc2 ; {vex} vpdpbuuds ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0x51 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, "vpdpwssd xmm0, xmm1, xmm2": { "x86InstructionCount": 1, "ExpectedInstructionCount": 4, @@ -1915,6 +2120,28 @@ "ld1rqb {z16.b}, p7/z, [x4]" ] }, + "db 0xc4, 0xe2, 0x7a, 0x72, 0xd4 ; {vex} vcvtneps2bf16 xmm2, xmm4": { + "ExpectedInstructionCount": 1, + "Comment": [ + "Map 2 0b01 0x72 128-bit" + ], + "ExpectedArm64ASM": [ + "bfcvtn v18.4h, v20.4s" + ] + }, + "db 0xc4, 0xe2, 0x7e, 0x72, 0xdc ; {vex} vcvtneps2bf16 xmm3, ymm4": { + "ExpectedInstructionCount": 5, + "Comment": [ + "Map 2 0b01 0x72 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z2.q, z20.q[1]", + "bfcvtn v3.4h, v20.4s", + "mov v0.16b, v3.16b", + "bfcvtn2 v0.8h, v2.4s", + "mov v19.16b, v0.16b" + ] + }, "vpbroadcastb xmm0, xmm1": { "ExpectedInstructionCount": 1, "Comment": [ @@ -3757,7 +3984,7 @@ "Map 2 0b01 0x96 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3200]", + "ldr q2, [x28, #2992]", "eor v2.16b, v17.16b, v2.16b", "fmla v2.4s, v16.4s, v18.4s", "mov v16.16b, v2.16b" @@ -3769,7 +3996,7 @@ "Map 2 0b01 0x96 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2424]", + "ldr x0, [x28, #2224]", "ld1b {z2.b}, p7/z, [x0]", "eor z2.d, z17.d, z2.d", "mov z0.d, z2.d", @@ -3783,7 +4010,7 @@ "Map 2 0b01 0x96 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3232]", + "ldr q2, [x28, #3024]", "eor v2.16b, v17.16b, v2.16b", "fmla v2.2d, v16.2d, v18.2d", "mov v16.16b, v2.16b" @@ -3795,7 +4022,7 @@ "Map 2 0b01 0x96 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2440]", + "ldr x0, [x28, #2240]", "ld1b {z2.b}, p7/z, [x0]", "eor z2.d, z17.d, z2.d", "mov z0.d, z2.d", @@ -3809,7 +4036,7 @@ "Map 2 0b01 0x97 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3264]", + "ldr q2, [x28, #3056]", "eor v2.16b, v17.16b, v2.16b", "fmla v2.4s, v16.4s, v18.4s", "mov v16.16b, v2.16b" @@ -3821,7 +4048,7 @@ "Map 2 0b01 0x97 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2456]", + "ldr x0, [x28, #2256]", "ld1b {z2.b}, p7/z, [x0]", "eor z2.d, z17.d, z2.d", "mov z0.d, z2.d", @@ -3835,7 +4062,7 @@ "Map 2 0b01 0x97 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3296]", + "ldr q2, [x28, #3088]", "eor v2.16b, v17.16b, v2.16b", "fmla v2.2d, v16.2d, v18.2d", "mov v16.16b, v2.16b" @@ -3847,7 +4074,7 @@ "Map 2 0b01 0x97 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2472]", + "ldr x0, [x28, #2272]", "ld1b {z2.b}, p7/z, [x0]", "eor z2.d, z17.d, z2.d", "mov z0.d, z2.d", @@ -4709,7 +4936,7 @@ "Map 2 0b01 0xa6 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3200]", + "ldr q2, [x28, #2992]", "eor v2.16b, v18.16b, v2.16b", "fmla v2.4s, v17.4s, v16.4s", "mov v16.16b, v2.16b" @@ -4721,7 +4948,7 @@ "Map 2 0b01 0xa6 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2424]", + "ldr x0, [x28, #2224]", "ld1b {z2.b}, p7/z, [x0]", "eor z2.d, z18.d, z2.d", "mov z0.d, z2.d", @@ -4735,7 +4962,7 @@ "Map 2 0b01 0xa6 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3232]", + "ldr q2, [x28, #3024]", "eor v2.16b, v18.16b, v2.16b", "fmla v2.2d, v17.2d, v16.2d", "mov v16.16b, v2.16b" @@ -4747,7 +4974,7 @@ "Map 2 0b01 0xa6 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2440]", + "ldr x0, [x28, #2240]", "ld1b {z2.b}, p7/z, [x0]", "eor z2.d, z18.d, z2.d", "mov z0.d, z2.d", @@ -4761,7 +4988,7 @@ "Map 2 0b01 0xa7 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3264]", + "ldr q2, [x28, #3056]", "eor v2.16b, v18.16b, v2.16b", "fmla v2.4s, v17.4s, v16.4s", "mov v16.16b, v2.16b" @@ -4773,7 +5000,7 @@ "Map 2 0b01 0xa7 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2456]", + "ldr x0, [x28, #2256]", "ld1b {z2.b}, p7/z, [x0]", "eor z2.d, z18.d, z2.d", "mov z0.d, z2.d", @@ -4787,7 +5014,7 @@ "Map 2 0b01 0xa7 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3296]", + "ldr q2, [x28, #3088]", "eor v2.16b, v18.16b, v2.16b", "fmla v2.2d, v17.2d, v16.2d", "mov v16.16b, v2.16b" @@ -4799,7 +5026,7 @@ "Map 2 0b01 0xa7 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2472]", + "ldr x0, [x28, #2272]", "ld1b {z2.b}, p7/z, [x0]", "eor z2.d, z18.d, z2.d", "mov z0.d, z2.d", @@ -4807,13 +5034,209 @@ "mov z16.d, z0.d" ] }, + "db 0xc4, 0xe2, 0x78, 0xb0, 0x00 ; vcvtneoph2ps xmm0, [rax]": { + "ExpectedInstructionCount": 3, + "Comment": [ + "Map 2 0b00 0xb0 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x4]", + "uzp2 v2.8h, v2.8h, v2.8h", + "fcvtl v16.4s, v2.4h" + ] + }, + "db 0xc4, 0xe2, 0x7c, 0xb0, 0x00 ; vcvtneoph2ps ymm0, [rax]": { + "ExpectedInstructionCount": 4, + "Comment": [ + "Map 2 0b00 0xb0 256-bit" + ], + "ExpectedArm64ASM": [ + "ld1b {z2.b}, p7/z, [x4]", + "uzp2 z2.h, z2.h, z2.h", + "zip1 z16.h, z2.h, z2.h", + "fcvtlt z16.s, p7/m, z16.h" + ] + }, + "db 0xc4, 0xe2, 0x79, 0xb0, 0x00 ; vcvtneeph2ps xmm0, [rax]": { + "ExpectedInstructionCount": 3, + "Comment": [ + "Map 2 0b01 0xb0 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x4]", + "uzp1 v2.8h, v2.8h, v2.8h", + "fcvtl v16.4s, v2.4h" + ] + }, + "db 0xc4, 0xe2, 0x7d, 0xb0, 0x00 ; vcvtneeph2ps ymm0, [rax]": { + "ExpectedInstructionCount": 4, + "Comment": [ + "Map 2 0b01 0xb0 256-bit" + ], + "ExpectedArm64ASM": [ + "ld1b {z2.b}, p7/z, [x4]", + "uzp1 z2.h, z2.h, z2.h", + "zip1 z16.h, z2.h, z2.h", + "fcvtlt z16.s, p7/m, z16.h" + ] + }, + "db 0xc4, 0xe2, 0x7b, 0xb0, 0x00 ; vcvtneobf162ps xmm0, [rax]": { + "ExpectedInstructionCount": 3, + "Comment": [ + "Map 2 0b10 0xb0 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x4]", + "ushr v2.4s, v2.4s, #16", + "shl v16.4s, v2.4s, #16" + ] + }, + "db 0xc4, 0xe2, 0x7f, 0xb0, 0x00 ; vcvtneobf162ps ymm0, [rax]": { + "ExpectedInstructionCount": 3, + "Comment": [ + "Map 2 0b10 0xb0 256-bit" + ], + "ExpectedArm64ASM": [ + "ld1b {z2.b}, p7/z, [x4]", + "lsr z2.s, z2.s, #16", + "lsl z16.s, z2.s, #16" + ] + }, + "db 0xc4, 0xe2, 0x7a, 0xb0, 0x00 ; vcvtneebf162ps xmm0, [rax]": { + "ExpectedInstructionCount": 2, + "Comment": [ + "Map 2 0b11 0xb0 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x4]", + "shl v16.4s, v2.4s, #16" + ] + }, + "db 0xc4, 0xe2, 0x7e, 0xb0, 0x00 ; vcvtneebf162ps ymm0, [rax]": { + "ExpectedInstructionCount": 2, + "Comment": [ + "Map 2 0b11 0xb0 256-bit" + ], + "ExpectedArm64ASM": [ + "ld1b {z2.b}, p7/z, [x4]", + "lsl z16.s, z2.s, #16" + ] + }, + "db 0xc4, 0xe2, 0x79, 0xb1, 0x00 ; vbcstnesh2ps xmm0, [rax]": { + "ExpectedInstructionCount": 3, + "Comment": [ + "Map 2 0b01 0xb1 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x4]", + "fcvt s2, h2", + "dup v16.4s, v2.s[0]" + ] + }, + "db 0xc4, 0xe2, 0x7d, 0xb1, 0x00 ; vbcstnesh2ps ymm0, [rax]": { + "ExpectedInstructionCount": 3, + "Comment": [ + "Map 2 0b01 0xb1 256-bit" + ], + "ExpectedArm64ASM": [ + "ld1b {z2.b}, p7/z, [x4]", + "fcvt s2, h2", + "mov z16.s, s2" + ] + }, + "db 0xc4, 0xe2, 0x7a, 0xb1, 0x00 ; vbcstnebf162ps xmm0, [rax]": { + "ExpectedInstructionCount": 3, + "Comment": [ + "Map 2 0b10 0xb1 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x4]", + "shl v2.4s, v2.4s, #16", + "dup v16.4s, v2.s[0]" + ] + }, + "db 0xc4, 0xe2, 0x7e, 0xb1, 0x00 ; vbcstnebf162ps ymm0, [rax]": { + "ExpectedInstructionCount": 3, + "Comment": [ + "Map 2 0b10 0xb1 256-bit" + ], + "ExpectedArm64ASM": [ + "ld1b {z2.b}, p7/z, [x4]", + "lsl z2.s, z2.s, #16", + "mov z16.s, s2" + ] + }, + "vpmadd52luq xmm0, xmm1, xmm2": { + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xb4 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "vpmadd52luq ymm0, ymm1, ymm2": { + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xb4 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "vpmadd52huq xmm0, xmm1, xmm2": { + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xb5 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "vpmadd52huq ymm0, ymm1, ymm2": { + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xb5 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, "vfmaddsub231ps xmm0, xmm1, xmm2": { "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xb6 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3200]", + "ldr q2, [x28, #2992]", "eor v2.16b, v16.16b, v2.16b", "fmla v2.4s, v17.4s, v18.4s", "mov v16.16b, v2.16b" @@ -4825,7 +5248,7 @@ "Map 2 0b01 0xb6 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2424]", + "ldr x0, [x28, #2224]", "ld1b {z2.b}, p7/z, [x0]", "eor z2.d, z16.d, z2.d", "mov z16.d, z2.d", @@ -4838,7 +5261,7 @@ "Map 2 0b01 0xb6 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3232]", + "ldr q2, [x28, #3024]", "eor v2.16b, v16.16b, v2.16b", "fmla v2.2d, v17.2d, v18.2d", "mov v16.16b, v2.16b" @@ -4850,7 +5273,7 @@ "Map 2 0b01 0xb6 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2440]", + "ldr x0, [x28, #2240]", "ld1b {z2.b}, p7/z, [x0]", "eor z2.d, z16.d, z2.d", "mov z16.d, z2.d", @@ -4863,7 +5286,7 @@ "Map 2 0b01 0xb7 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3264]", + "ldr q2, [x28, #3056]", "eor v2.16b, v16.16b, v2.16b", "fmla v2.4s, v17.4s, v18.4s", "mov v16.16b, v2.16b" @@ -4875,7 +5298,7 @@ "Map 2 0b01 0xb7 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2456]", + "ldr x0, [x28, #2256]", "ld1b {z2.b}, p7/z, [x0]", "eor z2.d, z16.d, z2.d", "mov z16.d, z2.d", @@ -4888,7 +5311,7 @@ "Map 2 0b01 0xb7 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3296]", + "ldr q2, [x28, #3088]", "eor v2.16b, v16.16b, v2.16b", "fmla v2.2d, v17.2d, v18.2d", "mov v16.16b, v2.16b" @@ -4900,13 +5323,217 @@ "Map 2 0b01 0xb7 256-bit" ], "ExpectedArm64ASM": [ - "ldr x0, [x28, #2472]", + "ldr x0, [x28, #2272]", "ld1b {z2.b}, p7/z, [x0]", "eor z2.d, z16.d, z2.d", "mov z16.d, z2.d", "fmla z16.d, p7/m, z17.d, z18.d" ] }, + "db 0xc4, 0xe2, 0x72, 0xd2, 0xc2 ; {vex} vpdpwsud xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0xd2 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x76, 0xd2, 0xc2 ; {vex} vpdpwsud ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0xd2 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x72, 0xd3, 0xc2 ; {vex} vpdpwsuds xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0xd3 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x76, 0xd3, 0xc2 ; {vex} vpdpwsuds ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0xf3 0b01 0xd3 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x71, 0xd2, 0xc2 ; {vex} vpdpwusd xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0x66 0b01 0xd2 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x75, 0xd2, 0xc2 ; {vex} vpdpwusd ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0x66 0b01 0xd2 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x71, 0xd3, 0xc2 ; {vex} vpdpwusds xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0x66 0b01 0xd3 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x75, 0xd3, 0xc2 ; {vex} vpdpwusds ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0x66 0b01 0xd3 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x70, 0xd2, 0xc2 ; {vex} vpdpwuud xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xd2 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x74, 0xd2, 0xc2 ; {vex} vpdpwuud ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xd2 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x70, 0xd3, 0xc2 ; {vex} vpdpwuuds xmm0, xmm1, xmm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xd3 128-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, + "db 0xc4, 0xe2, 0x74, 0xd3, 0xc2 ; {vex} vpdpwuuds ymm0, ymm1, ymm2": { + "x86InstructionCount": 1, + "ExpectedInstructionCount": 8, + "Comment": [ + "Map 2 0b01 0xd3 256-bit" + ], + "ExpectedArm64ASM": [ + "mov w20, #0x10000", + "str x20, [x28, #24]", + "mov w20, #0x0", + "mov w0, #0x401", + "str x0, [x28, #1296]", + "str x20, [x28, #1304]", + "ldr x0, [x28, #2808]", + "br x0" + ] + }, "vaesimc xmm0, xmm1": { "ExpectedInstructionCount": 1, "Comment": [ diff --git a/unittests/InstructionCountCI/VEX_map2_DOTPROD.json b/unittests/InstructionCountCI/VEX_map2_DOTPROD.json index c4445a29e0..4460ecea7a 100644 --- a/unittests/InstructionCountCI/VEX_map2_DOTPROD.json +++ b/unittests/InstructionCountCI/VEX_map2_DOTPROD.json @@ -13,7 +13,7 @@ "SVEBITPERM", "I8MM" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vpdpbusd xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/VEX_map2_I8MM.json b/unittests/InstructionCountCI/VEX_map2_I8MM.json index d6ee942312..fff1a2aafe 100644 --- a/unittests/InstructionCountCI/VEX_map2_I8MM.json +++ b/unittests/InstructionCountCI/VEX_map2_I8MM.json @@ -12,7 +12,7 @@ "FLAGM2", "SVEBITPERM" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vpdpbusd xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/VEX_map2_svebitperm.json b/unittests/InstructionCountCI/VEX_map2_svebitperm.json index f2ece37275..120c8de7ef 100644 --- a/unittests/InstructionCountCI/VEX_map2_svebitperm.json +++ b/unittests/InstructionCountCI/VEX_map2_svebitperm.json @@ -11,7 +11,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "pext eax, ebx, ecx": { diff --git a/unittests/InstructionCountCI/VEX_map3.json b/unittests/InstructionCountCI/VEX_map3.json index 792908b416..e414026b49 100644 --- a/unittests/InstructionCountCI/VEX_map3.json +++ b/unittests/InstructionCountCI/VEX_map3.json @@ -8,7 +8,7 @@ "DisabledHostFeatures": [ "AFP" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vpermq ymm0, ymm1, 1": { @@ -4199,7 +4199,7 @@ "Map 3 0b01 0xdf 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3344]", + "ldr q2, [x28, #3136]", "movi v3.2d, #0x0", "mov v16.16b, v17.16b", "aese v16.16b, v3.16b", @@ -4212,7 +4212,7 @@ "Map 3 0b01 0xdf 128-bit" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3344]", + "ldr q2, [x28, #3136]", "movi v3.2d, #0x0", "mov v16.16b, v17.16b", "aese v16.16b, v3.16b", diff --git a/unittests/InstructionCountCI/VEX_map_group.json b/unittests/InstructionCountCI/VEX_map_group.json index 352cd75b0f..6eccfd2bec 100644 --- a/unittests/InstructionCountCI/VEX_map_group.json +++ b/unittests/InstructionCountCI/VEX_map_group.json @@ -9,7 +9,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "vpsrlw xmm0, xmm1, 0": { diff --git a/unittests/InstructionCountCI/X87ldst-SVE.json b/unittests/InstructionCountCI/X87ldst-SVE.json index cd9001dae9..cadd86969f 100644 --- a/unittests/InstructionCountCI/X87ldst-SVE.json +++ b/unittests/InstructionCountCI/X87ldst-SVE.json @@ -11,7 +11,7 @@ "FLAGM2", "RPRES" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "fstp tword [rax]": { diff --git a/unittests/InstructionCountCI/x87.json b/unittests/InstructionCountCI/x87.json index 8cb59dd217..e91eedcd7d 100644 --- a/unittests/InstructionCountCI/x87.json +++ b/unittests/InstructionCountCI/x87.json @@ -10,7 +10,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "fadd dword [rax]": { @@ -22,8 +22,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -33,8 +33,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -50,8 +50,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -61,8 +61,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -78,8 +78,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -89,8 +89,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -117,8 +117,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -128,8 +128,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -164,8 +164,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -175,8 +175,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -192,8 +192,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -203,8 +203,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -220,8 +220,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -231,8 +231,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -248,8 +248,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -259,8 +259,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -279,8 +279,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -303,8 +303,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -327,8 +327,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -351,8 +351,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -375,8 +375,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -399,8 +399,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -423,8 +423,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -447,8 +447,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -467,8 +467,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -491,8 +491,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -515,8 +515,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -539,8 +539,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -563,8 +563,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -587,8 +587,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -611,8 +611,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -635,8 +635,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -655,8 +655,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -690,8 +690,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -725,8 +725,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -760,8 +760,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -795,8 +795,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -830,8 +830,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -865,8 +865,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -900,8 +900,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -931,8 +931,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -974,8 +974,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x22, x0", @@ -1015,8 +1015,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -1058,8 +1058,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -1101,8 +1101,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -1144,8 +1144,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -1187,8 +1187,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -1230,8 +1230,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -1269,8 +1269,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1293,8 +1293,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1317,8 +1317,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1341,8 +1341,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1365,8 +1365,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1389,8 +1389,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1413,8 +1413,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1437,8 +1437,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1457,8 +1457,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1481,8 +1481,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1505,8 +1505,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1529,8 +1529,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1553,8 +1553,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1577,8 +1577,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1601,8 +1601,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1625,8 +1625,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1645,8 +1645,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1669,8 +1669,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1693,8 +1693,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1717,8 +1717,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1741,8 +1741,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1765,8 +1765,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1789,8 +1789,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1813,8 +1813,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1833,8 +1833,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1857,8 +1857,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1881,8 +1881,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1905,8 +1905,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1929,8 +1929,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1953,8 +1953,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -1977,8 +1977,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2001,8 +2001,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2018,8 +2018,8 @@ "ldr s2, [x4]", "str x30, [sp, #-16]!", "fmov s0, s2", - "ldr x0, [x28, #1648]", - "ldr x3, [x28, #1656]", + "ldr x0, [x28, #1448]", + "ldr x3, [x28, #1456]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2047,8 +2047,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2066,8 +2066,8 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1680]", - "ldr x3, [x28, #1688]", + "ldr x0, [x28, #1480]", + "ldr x3, [x28, #1488]", "blr x0", "ldr x30, [sp], #16", "fmov s2, s0", @@ -2128,7 +2128,7 @@ ] }, "fnstenv [rax]": { - "ExpectedInstructionCount": 29, + "ExpectedInstructionCount": 30, "Comment": [ "0xd9 !11b /6" ], @@ -2158,7 +2158,8 @@ "orr w20, w20, w20, lsl #1", "eor w20, w20, #0xffff", "str w20, [x4, #8]", - "str wzr, [x4, #12]", + "ldr x20, [x28, #1208]", + "str w20, [x4, #12]", "str wzr, [x4, #16]", "str wzr, [x4, #20]", "str wzr, [x4, #24]" @@ -2553,7 +2554,7 @@ "ldrb w20, [x28, #1051]", "add x20, x28, x20, lsl #4", "ldr q2, [x20, #1056]", - "ldr q3, [x28, #3744]", + "ldr q3, [x28, #3536]", "eor v2.16b, v2.16b, v3.16b", "str q2, [x20, #1056]" ] @@ -2567,7 +2568,7 @@ "ldrb w20, [x28, #1051]", "add x20, x28, x20, lsl #4", "ldr q2, [x20, #1056]", - "ldr q3, [x28, #3744]", + "ldr q3, [x28, #3536]", "bic v2.16b, v2.16b, v3.16b", "str q2, [x20, #1056]" ] @@ -2586,8 +2587,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -2679,7 +2680,7 @@ "0xd9 11b 0xe8 /5" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3520]", + "ldr q2, [x28, #3312]", "ldrb w20, [x28, #1051]", "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", @@ -2699,7 +2700,7 @@ "0xd9 11b 0xe9 /5" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3536]", + "ldr q2, [x28, #3328]", "ldrb w20, [x28, #1051]", "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", @@ -2719,7 +2720,7 @@ "0xd9 11b 0xea /5" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3552]", + "ldr q2, [x28, #3344]", "ldrb w20, [x28, #1051]", "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", @@ -2739,7 +2740,7 @@ "0xd9 11b 0xeb /5" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3568]", + "ldr q2, [x28, #3360]", "ldrb w20, [x28, #1051]", "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", @@ -2759,7 +2760,7 @@ "0xd9 11b 0xec /5" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3584]", + "ldr q2, [x28, #3376]", "ldrb w20, [x28, #1051]", "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", @@ -2779,7 +2780,7 @@ "0xd9 11b 0xed /5" ], "ExpectedArm64ASM": [ - "ldr q2, [x28, #3600]", + "ldr q2, [x28, #3392]", "ldrb w20, [x28, #1051]", "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", @@ -2824,8 +2825,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1872]", - "ldr x3, [x28, #1880]", + "ldr x0, [x28, #1672]", + "ldr x3, [x28, #1680]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2848,8 +2849,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2096]", - "ldr x3, [x28, #2104]", + "ldr x0, [x28, #1896]", + "ldr x3, [x28, #1904]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2873,12 +2874,12 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1888]", - "ldr x3, [x28, #1896]", + "ldr x0, [x28, #1688]", + "ldr x3, [x28, #1696]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", - "ldr q3, [x28, #3520]", + "ldr q3, [x28, #3312]", "add w20, w20, #0x7 (7)", "and w20, w20, #0x7", "strb wzr, [x28, #1050]", @@ -2909,8 +2910,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2128]", - "ldr x3, [x28, #2136]", + "ldr x0, [x28, #1928]", + "ldr x3, [x28, #1936]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2934,15 +2935,15 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1968]", - "ldr x3, [x28, #1976]", + "ldr x0, [x28, #1768]", + "ldr x3, [x28, #1776]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1984]", - "ldr x3, [x28, #1992]", + "ldr x0, [x28, #1784]", + "ldr x3, [x28, #1792]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -2977,8 +2978,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2144]", - "ldr x3, [x28, #2152]", + "ldr x0, [x28, #1944]", + "ldr x3, [x28, #1952]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3028,8 +3029,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2160]", - "ldr x3, [x28, #2168]", + "ldr x0, [x28, #1960]", + "ldr x3, [x28, #1968]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3053,8 +3054,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2112]", - "ldr x3, [x28, #2120]", + "ldr x0, [x28, #1912]", + "ldr x3, [x28, #1920]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3078,8 +3079,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1904]", - "ldr x3, [x28, #1912]", + "ldr x0, [x28, #1704]", + "ldr x3, [x28, #1712]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3097,8 +3098,8 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1952]", - "ldr x3, [x28, #1960]", + "ldr x0, [x28, #1752]", + "ldr x3, [x28, #1760]", "blr x0", "ldr x30, [sp], #16", "mov v3.16b, v0.16b", @@ -3128,8 +3129,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1856]", - "ldr x3, [x28, #1864]", + "ldr x0, [x28, #1656]", + "ldr x3, [x28, #1664]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3152,8 +3153,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2176]", - "ldr x3, [x28, #2184]", + "ldr x0, [x28, #1976]", + "ldr x3, [x28, #1984]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3171,8 +3172,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1920]", - "ldr x3, [x28, #1928]", + "ldr x0, [x28, #1720]", + "ldr x3, [x28, #1728]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3191,8 +3192,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1936]", - "ldr x3, [x28, #1944]", + "ldr x0, [x28, #1736]", + "ldr x3, [x28, #1744]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3209,8 +3210,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3220,8 +3221,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3237,8 +3238,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3248,8 +3249,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3265,8 +3266,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3276,8 +3277,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -3304,8 +3305,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3315,8 +3316,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -3351,8 +3352,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3362,8 +3363,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3379,8 +3380,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3390,8 +3391,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3407,8 +3408,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3418,8 +3419,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3435,8 +3436,8 @@ "ldr w20, [x4]", "str x30, [sp, #-16]!", "mov w1, w20", - "ldr x0, [x28, #1840]", - "ldr x3, [x28, #1848]", + "ldr x0, [x28, #1640]", + "ldr x3, [x28, #1648]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -3446,8 +3447,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4086,8 +4087,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -4167,8 +4168,8 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1776]", - "ldr x3, [x28, #1784]", + "ldr x0, [x28, #1576]", + "ldr x3, [x28, #1584]", "blr x0", "ldr x30, [sp], #16", "mov w21, w0", @@ -4194,8 +4195,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1728]", - "ldr x3, [x28, #1736]", + "ldr x0, [x28, #1528]", + "ldr x3, [x28, #1536]", "blr x0", "ldr x30, [sp], #16", "mov w20, w0", @@ -4213,8 +4214,8 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1728]", - "ldr x3, [x28, #1736]", + "ldr x0, [x28, #1528]", + "ldr x3, [x28, #1536]", "blr x0", "ldr x30, [sp], #16", "mov w21, w0", @@ -4899,7 +4900,7 @@ ] }, "fninit": { - "ExpectedInstructionCount": 9, + "ExpectedInstructionCount": 10, "Comment": [ "0xdb 11b 0xe3 /4" ], @@ -4912,7 +4913,8 @@ "strb wzr, [x28, #1049]", "strb wzr, [x28, #1050]", "strb wzr, [x28, #1054]", - "strb wzr, [x28, #1040]" + "strb wzr, [x28, #1040]", + "str xzr, [x28, #1208]" ] }, "fucomi st0, st0": { @@ -4927,8 +4929,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -4967,8 +4969,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5007,8 +5009,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5047,8 +5049,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5087,8 +5089,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5127,8 +5129,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5167,8 +5169,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5207,8 +5209,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5243,8 +5245,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5283,8 +5285,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5323,8 +5325,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5363,8 +5365,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5403,8 +5405,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5443,8 +5445,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5483,8 +5485,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5523,8 +5525,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5556,8 +5558,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5567,8 +5569,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5584,8 +5586,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5595,8 +5597,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5612,8 +5614,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5623,8 +5625,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -5651,8 +5653,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5662,8 +5664,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -5698,8 +5700,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5709,8 +5711,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5726,8 +5728,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5737,8 +5739,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5754,8 +5756,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5765,8 +5767,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5782,8 +5784,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5793,8 +5795,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5815,8 +5817,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5839,8 +5841,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5863,8 +5865,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5887,8 +5889,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5911,8 +5913,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5935,8 +5937,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5959,8 +5961,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5983,8 +5985,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6005,8 +6007,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6029,8 +6031,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6053,8 +6055,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6077,8 +6079,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6101,8 +6103,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6125,8 +6127,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6149,8 +6151,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6173,8 +6175,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6195,8 +6197,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6219,8 +6221,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6243,8 +6245,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6267,8 +6269,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6291,8 +6293,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6315,8 +6317,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6339,8 +6341,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6363,8 +6365,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6385,8 +6387,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6409,8 +6411,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6433,8 +6435,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6457,8 +6459,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6481,8 +6483,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6505,8 +6507,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6529,8 +6531,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6553,8 +6555,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6575,8 +6577,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6599,8 +6601,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6623,8 +6625,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6647,8 +6649,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6671,8 +6673,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6695,8 +6697,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6719,8 +6721,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6743,8 +6745,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6765,8 +6767,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6789,8 +6791,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6813,8 +6815,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6837,8 +6839,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6861,8 +6863,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6885,8 +6887,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6909,8 +6911,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6933,8 +6935,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6950,8 +6952,8 @@ "ldr d2, [x4]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -6979,8 +6981,8 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1792]", - "ldr x3, [x28, #1800]", + "ldr x0, [x28, #1592]", + "ldr x3, [x28, #1600]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -7006,8 +7008,8 @@ "ldr q2, [x20, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d2, d0", @@ -7025,8 +7027,8 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d2, d0", @@ -7042,7 +7044,7 @@ ] }, "frstor [rax]": { - "ExpectedInstructionCount": 76, + "ExpectedInstructionCount": 78, "Comment": [ "0xdd !11b /4" ], @@ -7072,6 +7074,8 @@ "and w20, w20, #0xf0f0f0f", "orr w20, w20, w20, lsr #4", "strb w20, [x28, #1202]", + "ldr w20, [x4, #12]", + "str x20, [x28, #1208]", "mov x20, #0xffffffffffffffff", "mov w22, #0xffff", "fmov d2, x20", @@ -7126,7 +7130,7 @@ ] }, "fnsave [rax]": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 81, "Comment": [ "0xdd !11b /6" ], @@ -7157,7 +7161,8 @@ "orr w21, w21, w21, lsl #1", "eor w21, w21, #0xffff", "str w21, [x4, #8]", - "str wzr, [x4, #12]", + "ldr x21, [x28, #1208]", + "str w21, [x4, #12]", "str wzr, [x4, #16]", "str wzr, [x4, #20]", "str wzr, [x4, #24]", @@ -7209,7 +7214,8 @@ "strb wzr, [x28, #1049]", "strb wzr, [x28, #1050]", "strb wzr, [x28, #1054]", - "strb wzr, [x28, #1040]" + "strb wzr, [x28, #1040]", + "str xzr, [x28, #1208]" ] }, "fnstsw [rax]": { @@ -7721,8 +7727,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -7756,8 +7762,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -7791,8 +7797,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -7826,8 +7832,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -7861,8 +7867,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -7896,8 +7902,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -7931,8 +7937,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -7966,8 +7972,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -7997,8 +8003,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8040,8 +8046,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x22, x0", @@ -8081,8 +8087,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8124,8 +8130,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8167,8 +8173,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8210,8 +8216,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8253,8 +8259,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8296,8 +8302,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8332,8 +8338,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8343,8 +8349,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8360,8 +8366,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8371,8 +8377,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8388,8 +8394,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8399,8 +8405,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x20, x0", @@ -8427,8 +8433,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8438,8 +8444,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -8474,8 +8480,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8485,8 +8491,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8502,8 +8508,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8513,8 +8519,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8530,8 +8536,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8541,8 +8547,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8558,8 +8564,8 @@ "ldrh w20, [x4]", "str x30, [sp, #-16]!", "sxth w1, w20", - "ldr x0, [x28, #1824]", - "ldr x3, [x28, #1832]", + "ldr x0, [x28, #1624]", + "ldr x3, [x28, #1632]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8569,8 +8575,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8589,8 +8595,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8621,8 +8627,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8651,8 +8657,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8683,8 +8689,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8715,8 +8721,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8747,8 +8753,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8779,8 +8785,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8811,8 +8817,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2032]", - "ldr x3, [x28, #2040]", + "ldr x0, [x28, #1832]", + "ldr x3, [x28, #1840]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8839,8 +8845,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8871,8 +8877,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8901,8 +8907,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8933,8 +8939,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8965,8 +8971,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -8997,8 +9003,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9029,8 +9035,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9061,8 +9067,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2064]", - "ldr x3, [x28, #2072]", + "ldr x0, [x28, #1864]", + "ldr x3, [x28, #1872]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9093,8 +9099,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -9136,8 +9142,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9168,8 +9174,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9198,8 +9204,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9230,8 +9236,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9262,8 +9268,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9294,8 +9300,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9326,8 +9332,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9358,8 +9364,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9388,8 +9394,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9420,8 +9426,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9450,8 +9456,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9482,8 +9488,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9514,8 +9520,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9546,8 +9552,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9578,8 +9584,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9610,8 +9616,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2048]", - "ldr x3, [x28, #2056]", + "ldr x0, [x28, #1848]", + "ldr x3, [x28, #1856]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9640,8 +9646,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9672,8 +9678,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9702,8 +9708,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9734,8 +9740,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9766,8 +9772,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9798,8 +9804,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9830,8 +9836,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9862,8 +9868,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9892,8 +9898,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9924,8 +9930,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9954,8 +9960,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -9986,8 +9992,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10018,8 +10024,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10050,8 +10056,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10082,8 +10088,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10114,8 +10120,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #2080]", - "ldr x3, [x28, #2088]", + "ldr x0, [x28, #1880]", + "ldr x3, [x28, #1888]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10195,8 +10201,8 @@ "strb w21, [x28, #1040]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1760]", - "ldr x3, [x28, #1768]", + "ldr x0, [x28, #1560]", + "ldr x3, [x28, #1568]", "blr x0", "ldr x30, [sp], #16", "mov w21, w0", @@ -10236,8 +10242,8 @@ "strb w20, [x28, #1040]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1712]", - "ldr x3, [x28, #1720]", + "ldr x0, [x28, #1512]", + "ldr x3, [x28, #1520]", "blr x0", "ldr x30, [sp], #16", "mov w20, w0", @@ -10269,8 +10275,8 @@ "strb w21, [x28, #1040]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1712]", - "ldr x3, [x28, #1720]", + "ldr x0, [x28, #1512]", + "ldr x3, [x28, #1520]", "blr x0", "ldr x30, [sp], #16", "mov w21, w0", @@ -10297,8 +10303,8 @@ "ld1 {v2.h}[4], [x20]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #2016]", - "ldr x3, [x28, #2024]", + "ldr x0, [x28, #1816]", + "ldr x3, [x28, #1824]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10326,8 +10332,8 @@ "ldr q2, [x21, #1056]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #2000]", - "ldr x3, [x28, #2008]", + "ldr x0, [x28, #1800]", + "ldr x3, [x28, #1808]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -10481,8 +10487,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10529,8 +10535,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x22, x0", @@ -10575,8 +10581,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10623,8 +10629,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10671,8 +10677,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10719,8 +10725,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10767,8 +10773,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10815,8 +10821,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10859,8 +10865,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v2.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -10907,8 +10913,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x22, x0", @@ -10953,8 +10959,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -11001,8 +11007,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -11049,8 +11055,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -11097,8 +11103,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -11145,8 +11151,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", @@ -11193,8 +11199,8 @@ "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", "mov v1.16b, v3.16b", - "ldr x0, [x28, #1808]", - "ldr x3, [x28, #1816]", + "ldr x0, [x28, #1608]", + "ldr x3, [x28, #1616]", "blr x0", "ldr x30, [sp], #16", "mov x21, x0", diff --git a/unittests/InstructionCountCI/x87_32Bit.json b/unittests/InstructionCountCI/x87_32Bit.json index 71f9dc4055..7282097c05 100644 --- a/unittests/InstructionCountCI/x87_32Bit.json +++ b/unittests/InstructionCountCI/x87_32Bit.json @@ -10,7 +10,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "Multiple fld/fst": { diff --git a/unittests/InstructionCountCI/x87_f64.json b/unittests/InstructionCountCI/x87_f64.json index 67f514b144..2046b0eba8 100644 --- a/unittests/InstructionCountCI/x87_f64.json +++ b/unittests/InstructionCountCI/x87_f64.json @@ -12,7 +12,7 @@ "FLAGM", "FLAGM2" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "fadd dword [rax]": { @@ -1556,7 +1556,7 @@ ] }, "fnstenv [rax]": { - "ExpectedInstructionCount": 29, + "ExpectedInstructionCount": 30, "Comment": [ "0xd9 !11b /6" ], @@ -1586,7 +1586,8 @@ "orr w20, w20, w20, lsl #1", "eor w20, w20, #0xffff", "str w20, [x4, #8]", - "str wzr, [x4, #12]", + "ldr x20, [x28, #1208]", + "str w20, [x4, #12]", "str wzr, [x4, #16]", "str wzr, [x4, #20]", "str wzr, [x4, #24]" @@ -2249,7 +2250,7 @@ "add x20, x28, x20, lsl #4", "ldr d2, [x20, #1056]", "fmov d0, d2", - "ldr x0, [x28, #3088]", + "ldr x0, [x28, #2888]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2272,7 +2273,7 @@ "ldr d3, [x23, #1056]", "fmov d0, d3", "fmov d1, d2", - "ldr x0, [x28, #3112]", + "ldr x0, [x28, #2912]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2296,7 +2297,7 @@ "add x21, x28, x20, lsl #4", "ldr d2, [x21, #1056]", "fmov d0, d2", - "ldr x0, [x28, #3080]", + "ldr x0, [x28, #2880]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2332,7 +2333,7 @@ "ldr d3, [x22, #1056]", "fmov d0, d3", "fmov d1, d2", - "ldr x0, [x28, #3104]", + "ldr x0, [x28, #2904]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2409,7 +2410,7 @@ "ldr d3, [x20, #1056]", "fmov d0, d3", "fmov d1, d2", - "ldr x0, [x28, #3136]", + "ldr x0, [x28, #2936]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2459,7 +2460,7 @@ "ldr d3, [x20, #1056]", "fmov d0, d3", "fmov d1, d2", - "ldr x0, [x28, #3128]", + "ldr x0, [x28, #2928]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2483,7 +2484,7 @@ "ldr d3, [x23, #1056]", "fmov d0, d3", "fmov d1, d2", - "ldr x0, [x28, #3120]", + "ldr x0, [x28, #2920]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2520,13 +2521,13 @@ "add x21, x28, x20, lsl #4", "ldr d2, [x21, #1056]", "fmov d0, d2", - "ldr x0, [x28, #3064]", + "ldr x0, [x28, #2864]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", "fmov d0, d2", - "ldr x0, [x28, #3072]", + "ldr x0, [x28, #2872]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2573,7 +2574,7 @@ "ldr d3, [x20, #1056]", "fmov d0, d3", "fmov d1, d2", - "ldr x0, [x28, #3096]", + "ldr x0, [x28, #2896]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2591,7 +2592,7 @@ "add x20, x28, x20, lsl #4", "ldr d2, [x20, #1056]", "fmov d0, d2", - "ldr x0, [x28, #3064]", + "ldr x0, [x28, #2864]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -2610,7 +2611,7 @@ "add x20, x28, x20, lsl #4", "ldr d2, [x20, #1056]", "fmov d0, d2", - "ldr x0, [x28, #3072]", + "ldr x0, [x28, #2872]", "str x30, [sp, #-16]!", "blr x0", "ldr x30, [sp], #16", @@ -3509,8 +3510,8 @@ "ld1 {v2.h}[4], [x20]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d2, d0", @@ -3538,8 +3539,8 @@ "ldr d2, [x21, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -4182,7 +4183,7 @@ ] }, "fninit": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 18, "Comment": [ "0xdb 11b 0xe3 /4" ], @@ -4203,7 +4204,8 @@ "strb wzr, [x28, #1049]", "strb wzr, [x28, #1050]", "strb wzr, [x28, #1054]", - "strb wzr, [x28, #1040]" + "strb wzr, [x28, #1040]", + "str xzr, [x28, #1208]" ] }, "fucomi st0, st0": { @@ -5536,7 +5538,7 @@ ] }, "frstor [rax]": { - "ExpectedInstructionCount": 141, + "ExpectedInstructionCount": 143, "Comment": [ "0xdd !11b /4" ], @@ -5575,6 +5577,8 @@ "and w20, w20, #0xf0f0f0f", "orr w20, w20, w20, lsr #4", "strb w20, [x28, #1202]", + "ldr w20, [x4, #12]", + "str x20, [x28, #1208]", "mov x20, #0xffffffffffffffff", "mov w22, #0xffff", "fmov d2, x20", @@ -5583,8 +5587,8 @@ "and v3.16b, v3.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", @@ -5596,8 +5600,8 @@ "and v3.16b, v3.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", @@ -5609,8 +5613,8 @@ "and v3.16b, v3.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", @@ -5622,8 +5626,8 @@ "and v3.16b, v3.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", @@ -5635,8 +5639,8 @@ "and v3.16b, v3.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", @@ -5648,8 +5652,8 @@ "and v3.16b, v3.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v3.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d3, d0", @@ -5661,8 +5665,8 @@ "and v2.16b, v3.16b, v2.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d2, d0", @@ -5675,8 +5679,8 @@ "mov v2.h[4], v3.h[0]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d2, d0", @@ -5685,7 +5689,7 @@ ] }, "fnsave [rax]": { - "ExpectedInstructionCount": 143, + "ExpectedInstructionCount": 145, "Comment": [ "0xdd !11b /6" ], @@ -5717,7 +5721,8 @@ "orr w22, w22, w22, lsl #1", "eor w22, w22, #0xffff", "str w22, [x4, #8]", - "str wzr, [x4, #12]", + "ldr x22, [x28, #1208]", + "str w22, [x4, #12]", "str wzr, [x4, #16]", "str wzr, [x4, #20]", "str wzr, [x4, #24]", @@ -5725,8 +5730,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5737,8 +5742,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5749,8 +5754,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5761,8 +5766,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5773,8 +5778,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5785,8 +5790,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5797,8 +5802,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5809,8 +5814,8 @@ "ldr d2, [x0, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", @@ -5832,7 +5837,8 @@ "strb wzr, [x28, #1049]", "strb wzr, [x28, #1050]", "strb wzr, [x28, #1054]", - "strb wzr, [x28, #1040]" + "strb wzr, [x28, #1040]", + "str xzr, [x28, #1208]" ] }, "fnstsw [rax]": { @@ -8273,15 +8279,15 @@ "ld1 {v2.h}[4], [x20]", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #2016]", - "ldr x3, [x28, #2024]", + "ldr x0, [x28, #1816]", + "ldr x3, [x28, #1824]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #1696]", - "ldr x3, [x28, #1704]", + "ldr x0, [x28, #1496]", + "ldr x3, [x28, #1504]", "blr x0", "ldr x30, [sp], #16", "fmov d2, d0", @@ -8309,15 +8315,15 @@ "ldr d2, [x21, #1056]", "str x30, [sp, #-16]!", "fmov d0, d2", - "ldr x0, [x28, #1664]", - "ldr x3, [x28, #1672]", + "ldr x0, [x28, #1464]", + "ldr x3, [x28, #1472]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", "str x30, [sp, #-16]!", "mov v0.16b, v2.16b", - "ldr x0, [x28, #2000]", - "ldr x3, [x28, #2008]", + "ldr x0, [x28, #1800]", + "ldr x3, [x28, #1808]", "blr x0", "ldr x30, [sp], #16", "mov v2.16b, v0.16b", diff --git a/unittests/InstructionCountCI/x87_f64_32Bit.json b/unittests/InstructionCountCI/x87_f64_32Bit.json index d88aa42615..b5bf8b1f1c 100644 --- a/unittests/InstructionCountCI/x87_f64_32Bit.json +++ b/unittests/InstructionCountCI/x87_f64_32Bit.json @@ -15,7 +15,7 @@ "SVE256", "CSSC" ], - "BinaryCacheVersion": 29 + "BinaryCacheVersion": 43 }, "Instructions": { "fstp dword [ebx*4+0x204a20]": { diff --git a/unittests/POSIX/CMakeLists.txt b/unittests/POSIX/CMakeLists.txt index 150ea4c2c8..868e46ae17 100644 --- a/unittests/POSIX/CMakeLists.txt +++ b/unittests/POSIX/CMakeLists.txt @@ -10,7 +10,7 @@ foreach(POSIX_TEST ${POSIX_TESTS}) string(REPLACE "/" "-" TEST_NAME ${TEST_NAME}) add_test(NAME "${TEST_NAME}.jit.posix" - COMMAND "python3" "${CMAKE_SOURCE_DIR}/Scripts/guest_test_runner.py" + COMMAND ${PYTHON_TEST_RUNNER} "${CMAKE_SOURCE_DIR}/Scripts/guest_test_runner.py" "${CMAKE_CURRENT_SOURCE_DIR}/Known_Failures" "${CMAKE_CURRENT_SOURCE_DIR}/Expected_Output" "${CMAKE_CURRENT_SOURCE_DIR}/Disabled_Tests" diff --git a/unittests/ThunkLibs/abi.cpp b/unittests/ThunkLibs/abi.cpp index 7fae4daad4..3977d3f16d 100644 --- a/unittests/ThunkLibs/abi.cpp +++ b/unittests/ThunkLibs/abi.cpp @@ -136,7 +136,9 @@ class ThunkTestToolAction : public clang::tooling::ToolAction { const bool Success = Compiler.ExecuteAction(ScopedToolAction); +#if LLVM_VERSION_MAJOR < 23 files->clearStatCache(); +#endif return Success; } }; diff --git a/unittests/gcc-target-tests-32/CMakeLists.txt b/unittests/gcc-target-tests-32/CMakeLists.txt index 138597eaf4..18a362a2f4 100644 --- a/unittests/gcc-target-tests-32/CMakeLists.txt +++ b/unittests/gcc-target-tests-32/CMakeLists.txt @@ -14,7 +14,7 @@ foreach(TEST ${TESTS}) string(APPEND TEST_NAME ".n${BLOCK_SIZE}.gcc-target-32") add_test(NAME "${TEST_NAME}" - COMMAND "python3" "${CMAKE_SOURCE_DIR}/Scripts/guest_test_runner.py" + COMMAND ${PYTHON_TEST_RUNNER} "${CMAKE_SOURCE_DIR}/Scripts/guest_test_runner.py" "${CMAKE_CURRENT_SOURCE_DIR}/Known_Failures" "${CMAKE_CURRENT_SOURCE_DIR}/Expected_Output" "${CMAKE_CURRENT_SOURCE_DIR}/Disabled_Tests" diff --git a/unittests/gcc-target-tests-32/Disabled_Tests b/unittests/gcc-target-tests-32/Disabled_Tests index c88e68c020..95a17f9bd5 100644 --- a/unittests/gcc-target-tests-32/Disabled_Tests +++ b/unittests/gcc-target-tests-32/Disabled_Tests @@ -1,43 +1,7 @@ -# Uses AVX -pr57275.c.gcc-target-test-32.n1.gcc-target-32 -pr57275.c.gcc-target-test-32.n500.gcc-target-32 - # Consistently crashes on Solidrun only in CI 20080723-1.c.gcc-target-test-32.n1.gcc-target-32 20080723-1.c.gcc-target-test-32.n500.gcc-target-32 -# These tests fail because of things unrelated to the sse4.1 instructions -sse4_1-ceil-sfix-vec.c.gcc-target-test-32.n1.gcc-target-32 -sse4_1-ceil-sfix-vec.c.gcc-target-test-32.n500.gcc-target-32 - -sse4_1-ceilf-sfix-vec.c.gcc-target-test-32.n1.gcc-target-32 -sse4_1-ceilf-sfix-vec.c.gcc-target-test-32.n500.gcc-target-32 - -sse4_1-floor-sfix-vec.c.gcc-target-test-32.n1.gcc-target-32 -sse4_1-floor-sfix-vec.c.gcc-target-test-32.n500.gcc-target-32 - -sse4_1-floorf-sfix-vec.c.gcc-target-test-32.n1.gcc-target-32 -sse4_1-floorf-sfix-vec.c.gcc-target-test-32.n500.gcc-target-32 - -sse4_1-rint-sfix-vec.c.gcc-target-test-32.n1.gcc-target-32 -sse4_1-rint-sfix-vec.c.gcc-target-test-32.n500.gcc-target-32 - -sse4_1-rintf-sfix-vec.c.gcc-target-test-32.n1.gcc-target-32 -sse4_1-rintf-sfix-vec.c.gcc-target-test-32.n500.gcc-target-32 - -sse4_1-round-sfix-vec.c.gcc-target-test-32.n1.gcc-target-32 -sse4_1-round-sfix-vec.c.gcc-target-test-32.n500.gcc-target-32 - -sse4_1-roundf-sfix-vec.c.gcc-target-test-32.n1.gcc-target-32 -sse4_1-roundf-sfix-vec.c.gcc-target-test-32.n500.gcc-target-32 - -sse4_1-rint-vec.c.gcc-target-test-32.n1.gcc-target-32 -sse4_1-rint-vec.c.gcc-target-test-32.n500.gcc-target-32 - -sse4_1-roundf-vec.c.gcc-target-test-32.n1.gcc-target-32 -sse4_1-roundf-vec.c.gcc-target-test-32.n500.gcc-target-32 - - # These tests fail on Nvidia Xavier ONLY sse4_1-rintf-vec.c.gcc-target-test-32.n1.gcc-target-32 sse4_1-rintf-vec.c.gcc-target-test-32.n500.gcc-target-32 diff --git a/unittests/gcc-target-tests-64/CMakeLists.txt b/unittests/gcc-target-tests-64/CMakeLists.txt index fc7ab1dfa1..d8fc55cb6c 100644 --- a/unittests/gcc-target-tests-64/CMakeLists.txt +++ b/unittests/gcc-target-tests-64/CMakeLists.txt @@ -14,7 +14,7 @@ foreach(TEST ${TESTS}) string(APPEND TEST_NAME ".n${BLOCK_SIZE}.gcc-target-64") add_test(NAME "${TEST_NAME}" - COMMAND "python3" "${CMAKE_SOURCE_DIR}/Scripts/guest_test_runner.py" + COMMAND ${PYTHON_TEST_RUNNER} "${CMAKE_SOURCE_DIR}/Scripts/guest_test_runner.py" "${CMAKE_CURRENT_SOURCE_DIR}/Known_Failures" "${CMAKE_CURRENT_SOURCE_DIR}/Expected_Output" "${CMAKE_CURRENT_SOURCE_DIR}/Disabled_Tests" diff --git a/unittests/gvisor-tests/CMakeLists.txt b/unittests/gvisor-tests/CMakeLists.txt index 54372b8073..b8ce475602 100644 --- a/unittests/gvisor-tests/CMakeLists.txt +++ b/unittests/gvisor-tests/CMakeLists.txt @@ -8,7 +8,7 @@ foreach(TEST ${TESTS}) string(REPLACE "/" "-" TEST_NAME ${TEST_NAME}) add_test(NAME "${TEST_NAME}.jit.gvisor" - COMMAND "python3" "${CMAKE_SOURCE_DIR}/Scripts/guest_test_runner.py" + COMMAND ${PYTHON_TEST_RUNNER} "${CMAKE_SOURCE_DIR}/Scripts/guest_test_runner.py" "${CMAKE_CURRENT_SOURCE_DIR}/Known_Failures" "${CMAKE_CURRENT_SOURCE_DIR}/Expected_Output" "${CMAKE_CURRENT_SOURCE_DIR}/Disabled_Tests"