RETF imm16 to inner level not tested.

[captainys]

I've realized that TEST386 is testing GP exception on RETF to inner level, but not checking GP exception on RETF imm16 instruction. Since it looks easy to add, nice to test both RETF and RETF imm16.

[superfury]

I can add it to my (pending) version of the testsuite. But I'm still waiting on the pull request for the latest additions right now. Don't know if @barotto has seen it yet, so I'm currently waiting on his reply for the merge (I did already change the POST codes back to what they were during the last pull request, matching the original POST codes ordering).
My repository is at: https://github.com/superfury/test386.asm
@captainys Edit: The test is in there now, but I'm facing a different problem now. With all tests enabled, the upper 64K ROM is exceeding it's maximum size again, so it can't compile properly because it's becoming too large again. I need to figure out a way to compress the ROM somehow. Any ideas? Perhaps somehow managing to compress the duplicated testUserFaultEx and related macros somehow, since they redefine the same kind of exception handler in many places? Perhaps some kind of SMC code for that (just patching some specific code addresses for each of those test cases seems to free quite a lot of data inside the ROMs)?

[captainys]

Thank you for considering! I think it is ok to make it 128KB by default. How about making the ROM size always 128KB, and ROM128 switch just enable/disable hardware TSS?

[superfury]

The main issue isn't that the 128/64KB ROM being used. It's that the upper 64KB ROM half is too small to contain it's code with all tests included (in fact w/o bochs and undefined tests enabled, the upper ROM half code becomes too large and overflows the 64/128KB ROM's upper 64KB area available.
It's still split into two 'ROMs': one 64KB at F0000-FFFFF and one at E0000-EFFFF. The one at F0000+ is overflowing the FFFFF address (64KB segment limit), spilling into 1MB+, which the compiler fails on.

[captainys]

I thought you could save space by moving some basic tests to E0000-EFFFF to make space for F0000-FFFFF. For example, is it difficult to move POST 1 to E0000-EFFFF space and CALLF to the test? It accidentally tests CALLF, but can save F0000-FFFFF space.

[superfury]

I thought you could save space by moving some basic tests to E0000-EFFFF to make space for F0000-FFFFF. For example, is it difficult to move POST 1 to E0000-EFFFF space and CALLF to the test? It accidentally tests CALLF, but can save F0000-FFFFF space.

That's part of the problem. Moving it means disabling the test in the 64K ROM version. And since it's a basic test that's mandatory, it can't be made optional.
Hmmm... Unless we move the POST 20+ tests to segment E000, which does free up some space. Don't know if it's enough though.

[superfury]

It seems to have freed enough space by moving the protected mode tests to the lower 64K ROM (at Exxxxh memory addresses). On my repository (https://github.com/superfury/test386.asm) it's now supporting the missing RETF test, as well as making the used upper ROM space smaller by moving more tests into the lower 64K ROM space (and allowing compiling with all other options again if the 64K ROM option is configured).

[captainys]

That's fantastic! Thank you very much for the amazing work! Now my CPU core passes all the additional tests. I wanted to support hardware task switching, but I had no way of testing them before.

[superfury]

That's fantastic! Thank you very much for the amazing work! Now my CPU core passes all the additional tests. I wanted to support hardware task switching, but I had no way of testing them before.

There's a few operating systems using TSS-based task switching I know of (pre 3.0 linux kernels (using IRET to trigger the task switch), as well as the Haribote OS).