create the NVDLA IP for the nv_small with Vivado and manage the connections with the Zynq UltraScale

did you try to create the NVDLA IP for the nv_small with Vivado? If so, how did you manage the connections with the Zynq UltraScale+?

[VVViy]

Yeah, i did it and have done. In terms of "how", if you know chinese，you can refer to my blog in this repo nv_small FPGA Mapping Workflow .

[VVViy]

Yeah, i did it and have done. In terms of "how", if you know chinese，you can refer to my blog in this repo nv_small FPGA Mapping Workflow .

[honorpeter]

Thank you very much. I will try it as your suggested.

[VVViy]

It's cool, good luck.

I am running nvdla_small spec on Xiliinx Ultrascale Board ZCU102
But,There's a problem : NVDLA a0000000.nvdla_small: failed to register drm device。
cat /proc/interrupts is also not right。
Why,how to solve it? who have the same problem?