From 0538c8e66a13bbf8e5607d561b9c2f9c11ab1e70 Mon Sep 17 00:00:00 2001 From: Juan I Carrano Date: Wed, 3 Jul 2019 13:58:13 +0200 Subject: [PATCH] boards/pic32-{clicker,wifire}: delete boards Note: in contrast to mips-malta, these boards are still available for purchase. This means that if the issued listed below were to be fixed (and the boards maintained by a person versed in the architecture) then adding them back would be a valid possibility. The pic32-clicker and pic32-wifire have severe issues affecting their usability, maintainability and have no maintainer. 1. Usability ============ I doubt the current implementation of these board can be use for any serious development. This is a problem with MIPS-RIOT integration in general and was explained in the PR removing mips-malta: > a. Makes development & debugging way harder. > b. It is impossible to run interactive tests. > b.1. Constrains the rest of the platforms by providing an incentive to not > make tests interactive. > c. The lack of UART is a witness to the poor quality of the port. This alone should have been enough reson not to merge this boards in the first place. pic32-wifire is the least worse. At least it can be flashed from Linux, though it is not an easy task. From dist/tools/pic32prog/doc.md >It will require flashing a specific firmware on the PICkit3. > As this can only be done from a Windows computer, that not many Linux users > have, the following steps explain how to setup a Windows VirtualBox virtual > machine and flash the PICkit3 from it. > > Informations come from this comment > > https://github.com/RIOT-OS/RIOT/pull/6092#issuecomment-261987955 pic32-clicker HAS NO FLASHER and requires one to use MPLAB. 2. No maintainer ================ There is no (active) RIOT maintainer with deep knowledge of the boards and platform. A quick search through the issues and PRs shows this. 3. Maintainability ================== As a consequence of (1) and (2) many tests are not run in these boards. At the same time, RIOT maintainers - especially those working on the build system - still have to modify and migrate mips-foo boards. The rest of the arguments here are the same as presented with the mips-malta removal. --- boards/pic32-clicker/Makefile | 2 - boards/pic32-clicker/Makefile.features | 6 - boards/pic32-clicker/Makefile.include | 6 - boards/pic32-clicker/clicker.c | 50 --- boards/pic32-clicker/doc.txt | 18 - boards/pic32-clicker/include/board.h | 78 ---- boards/pic32-clicker/include/periph_conf.h | 65 --- boards/pic32-clicker/pic32_config_settings.c | 117 ------ boards/pic32-wifire/Makefile | 2 - boards/pic32-wifire/Makefile.features | 6 - boards/pic32-wifire/Makefile.include | 6 - boards/pic32-wifire/doc.txt | 21 - boards/pic32-wifire/include/board.h | 89 ---- boards/pic32-wifire/include/periph_conf.h | 62 --- boards/pic32-wifire/pic32_config_settings.c | 419 ------------------- boards/pic32-wifire/wifire.c | 56 --- examples/gnrc_border_router/Makefile | 2 +- examples/javascript/Makefile | 2 +- examples/lua_REPL/Makefile | 2 +- examples/lua_basic/Makefile | 4 +- tests/emb6/Makefile | 2 +- tests/pkg_semtech-loramac/Makefile | 2 +- tests/pkg_ubasic/Makefile | 2 - tests/rng/Makefile | 2 +- tests/ssp/Makefile | 2 +- 25 files changed, 9 insertions(+), 1014 deletions(-) delete mode 100644 boards/pic32-clicker/Makefile delete mode 100644 boards/pic32-clicker/Makefile.features delete mode 100644 boards/pic32-clicker/Makefile.include delete mode 100644 boards/pic32-clicker/clicker.c delete mode 100644 boards/pic32-clicker/doc.txt delete mode 100644 boards/pic32-clicker/include/board.h delete mode 100644 boards/pic32-clicker/include/periph_conf.h delete mode 100644 boards/pic32-clicker/pic32_config_settings.c delete mode 100644 boards/pic32-wifire/Makefile delete mode 100644 boards/pic32-wifire/Makefile.features delete mode 100644 boards/pic32-wifire/Makefile.include delete mode 100644 boards/pic32-wifire/doc.txt delete mode 100644 boards/pic32-wifire/include/board.h delete mode 100644 boards/pic32-wifire/include/periph_conf.h delete mode 100644 boards/pic32-wifire/pic32_config_settings.c delete mode 100644 boards/pic32-wifire/wifire.c diff --git a/boards/pic32-clicker/Makefile b/boards/pic32-clicker/Makefile deleted file mode 100644 index 72ba6f36247b..000000000000 --- a/boards/pic32-clicker/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -MODULE = board -include $(RIOTBASE)/Makefile.base diff --git a/boards/pic32-clicker/Makefile.features b/boards/pic32-clicker/Makefile.features deleted file mode 100644 index 328dd02c7635..000000000000 --- a/boards/pic32-clicker/Makefile.features +++ /dev/null @@ -1,6 +0,0 @@ -# Put defined MCU peripherals here (in alphabetical order) -FEATURES_PROVIDED += periph_gpio -FEATURES_PROVIDED += periph_timer -FEATURES_PROVIDED += periph_uart - -include $(RIOTCPU)/mips_pic32mx/Makefile.features diff --git a/boards/pic32-clicker/Makefile.include b/boards/pic32-clicker/Makefile.include deleted file mode 100644 index 6e3898c5797a..000000000000 --- a/boards/pic32-clicker/Makefile.include +++ /dev/null @@ -1,6 +0,0 @@ -export CPU = mips_pic32mx -export CPU_MODEL=p32mx470f512h -export APPDEPS += $(RIOTCPU)/$(CPU)/$(CPU_MODEL)/$(CPU_MODEL).S -export USE_UHI_SYSCALLS = 1 - -FLASHFILE ?= $(HEXFILE) diff --git a/boards/pic32-clicker/clicker.c b/boards/pic32-clicker/clicker.c deleted file mode 100644 index 1146ff79b23e..000000000000 --- a/boards/pic32-clicker/clicker.c +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright(C) 2016,2017, Imagination Technologies Limited and/or its - * affiliated group companies. - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - * - */ -#include -#include -#include "periph/gpio.h" -#include "periph/uart.h" -#include "bitarithm.h" -#include "board.h" -#include "cpu.h" - -extern void dummy(void); - -void board_init(void) -{ - /* - * Setup pin mux for UART3 this is the one connected - * to the mickroBUS - */ - U3RXR = 0x2; /*connect pin RPF5 to UART3 RX*/ - RPF4R = 0x1; /*connect pin RPF4 to UART3 TX*/ - - /* intialise UART used for debug (printf) */ -#ifdef DEBUG_VIA_UART - uart_init(DEBUG_VIA_UART, DEBUG_UART_BAUD, NULL, 0); -#endif - - /* Turn off all LED's */ - gpio_init(LED1_PIN, GPIO_OUT); - gpio_init(LED2_PIN, GPIO_OUT); - LED1_OFF; - LED2_OFF; - - /* initialize the CPU */ - cpu_init(); - - /* Stop the linker from throwing away the PIC32 config register settings */ - dummy(); -} - -void pm_reboot(void) -{ - /* TODO, note this is needed to get 'default' example to build */ -} diff --git a/boards/pic32-clicker/doc.txt b/boards/pic32-clicker/doc.txt deleted file mode 100644 index 024809db5dec..000000000000 --- a/boards/pic32-clicker/doc.txt +++ /dev/null @@ -1,18 +0,0 @@ -/** -@defgroup boards_pic32-clicker MikroE PIC32 Clicker -@ingroup boards -@brief Support for the MikroE PIC32 Clicker - -For instructions on reflashing see: - -https://docs.creatordev.io/clicker/guides/quick-start-guide/#programming-a-6lowpan-clicker - -The RIOT build generates a hexfile compatible with MPLAB-IPE. - -More general information on the board and related documentation can be found -here: - -https://docs.creatordev.io/clicker/guides/quick-start-guide/#introduction - - - */ diff --git a/boards/pic32-clicker/include/board.h b/boards/pic32-clicker/include/board.h deleted file mode 100644 index 6491c9efc1ba..000000000000 --- a/boards/pic32-clicker/include/board.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Copyright(C) 2016,2017, Imagination Technologies Limited and/or its - * affiliated group companies. - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - * - */ - -/** - * @ingroup boards_pic32-clicker - * @details - * see: - * http://www.mikroe.com/pic32/pic32mx-clicker/ - * For more information on the board. - * - * @{ - * - * @file - * @brief board configuration for the MikroE PIC32 Clicker - * - * @author Neil Jones - */ - -#ifndef BOARD_H -#define BOARD_H - -#include "periph_conf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#include "vendor/p32mx470f512h.h" - -/** - * @brief Set how many increments of the count register per uS - * needed by the timer code. - */ -#define TICKS_PER_US (48) - -/** - * @brief We are using an External Interrupt Controller (all pic32 devices use this mode) - */ -#define EIC_IRQ (1) - -/** - * @name LED pin configuration - * @{ - */ -#define LED1_PIN GPIO_PIN(PORT_B, 1) -#define LED2_PIN GPIO_PIN(PORT_B, 2) - -#define LED1_MASK (1 << 1) -#define LED2_MASK (1 << 2) - -#define LED1_ON (LATBSET = LED1_MASK) -#define LED1_OFF (LATBCLR = LED1_MASK) -#define LED1_TOGGLE (LATBINV = LED1_MASK) - -#define LED2_ON (LATBSET = LED2_MASK) -#define LED2_OFF (LATBCLR = LED2_MASK) -#define LED2_TOGGLE (LATBINV = LED2_MASK) -/** @} */ - -/** - * @brief Board level initialization - */ -void board_init(void); - -#ifdef __cplusplus -} -#endif - - -#endif /* BOARD_H */ -/** @} */ diff --git a/boards/pic32-clicker/include/periph_conf.h b/boards/pic32-clicker/include/periph_conf.h deleted file mode 100644 index b664ac14f5e4..000000000000 --- a/boards/pic32-clicker/include/periph_conf.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Copyright(C) 2016,2017, Imagination Technologies Limited and/or its - * affiliated group companies. - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - * - */ - -/** - * @ingroup boards_pic32-clicker - * @{ - * - * @file - * @brief peripheral configuration for the MikroE PIC32 Clicker - * - * @author Neil Jones - */ - -#ifndef PERIPH_CONF_H -#define PERIPH_CONF_H - -#include "periph_cpu.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -/** - * @brief The peripheral clock is required for the UART Baud rate calculation - * It is configured by the 'config' registers (see pic32_config_settings.c) - * Note 120MHz is the max F for this device. - */ -#define PERIPHERAL_CLOCK (96000000) /* Hz */ - -/** - * @name Timer definitions - * @{ - */ -#define TIMER_NUMOF (1) -#define TIMER_0_CHANNELS (3) -/** @} */ - -/** - * @name UART Definitions - * There are 4 UARTS available on this CPU. - * We route debug via UART3 on this board, - * this is the UART connected to the MikroBUS - * - * Note Microchip number the UARTS 1->4 - * @{ - */ -#define UART_NUMOF (4) -#define DEBUG_VIA_UART (3) -#define DEBUG_UART_BAUD (9600) -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /* PERIPH_CONF_H */ -/** @} */ diff --git a/boards/pic32-clicker/pic32_config_settings.c b/boards/pic32-clicker/pic32_config_settings.c deleted file mode 100644 index 0edbe4e0ea58..000000000000 --- a/boards/pic32-clicker/pic32_config_settings.c +++ /dev/null @@ -1,117 +0,0 @@ -/* - * Copyright(C) 2016,2017, Imagination Technologies Limited and/or its - * affiliated group companies. - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - * - */ - -#include -#include "vendor/p32mx470f512h.h" -/* - * DEVCFG3 @ 0x1FC02FF0 - * - * - * USERID - * FSRSSEL 7 Assign IPL 7 to a shadow register set. - * PMDLIWAY 1 - * IOL1WAY 1 - * FUSBIDIO OFF USB USBID Selection Controlled by Port Function - * FVBUSONIO ON VBUSON pin is controlled by the USB module function - - */ -volatile uint32_t _DEVCFG3 __attribute__((used, section(".devcfg3"))) = - 0x0 /* unused bits must be 0 */ - | (_DEVCFG3_USERID_MASK & 0xFFFF << _DEVCFG3_USERID_POSITION) - | (_DEVCFG3_FSRSSEL_MASK & 7 << _DEVCFG3_FSRSSEL_POSITION) - | (_DEVCFG3_PMDL1WAY_MASK & 1 << _DEVCFG3_PMDL1WAY_POSITION) - | (_DEVCFG3_IOL1WAY_MASK & 1 << _DEVCFG3_IOL1WAY_POSITION) - | (_DEVCFG3_FUSBIDIO_MASK & 0 << _DEVCFG3_FUSBIDIO_POSITION) - | (_DEVCFG3_FVBUSONIO_MASK & 1 << _DEVCFG3_FVBUSONIO_POSITION); - - - -/* Note this sets the PLL to 96MHz (8/2 * 24) which is only supported by 3xx - * and 4xx parts and assumes an 8MHz XTAL. - * - * 1xx/2xx/53x/57x only support 50MHz (use 8/2 x 24 / 2 = 48Mhz) - * 5xx/6xx/7xx only support 80Mhz (use 8/2 * 20 = 80MHz). - * - * - * DEVCFG2 @ 0x1FC02FF4 ( - * - * FPLLIDIV DIV_2 System PLL Input Divider 2x Divider - * FPLLMUL 24x System PLL Multiplier PLL Multiply by 24, 8/2 x 24 = 96MHz - * UPLLIDIV DIV_12x USB PLL divider - * UPLLEN OFF USB PLL disabled - * FPLLODIV DIV_1 System PLL Output Clock Divider 1x Divider - */ - -volatile uint32_t _DEVCFG2 __attribute__ ((used, section(".devcfg2"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG2_FPLLIDIV_MASK | 1 << _DEVCFG2_FPLLIDIV_POSITION) - & (~_DEVCFG2_FPLLMUL_MASK | 7 << _DEVCFG2_FPLLMUL_POSITION) - & (~_DEVCFG2_UPLLIDIV_MASK | 7 << _DEVCFG2_UPLLIDIV_POSITION) - & (~_DEVCFG2_UPLLEN_MASK | 0 << _DEVCFG2_UPLLEN_POSITION) - & (~_DEVCFG2_FPLLODIV_MASK | 0 << _DEVCFG2_FPLLODIV_POSITION); - -/* - * DEVCFG1 @ 0x1FC02FF8 - * - * FNOSC PRIPLL Oscillator Selection Bits Primary Osc w/PLL (XT+,HS+,EC+PLL) - * FSOSCEN ON Secondary Oscillator Enable Enabled - * IESO ON Internal/External Switch Over Enabled - * OSCIOFNC OFF CLKO Output Signal Active on the OSCO Pin Disabled - * FPBDIV DIV_1 Peripheral Clock Divisor Pb_Clk is Sys_Clk/1 - * FCKSM CSDCMD Clock Switching and Monitor Selection Clock Switch Disable, FSCM Disabled - * WDTPS PS2 Watchdog Timer Postscaler 1:2 - * WINDIS OFF Watchdog Timer Window Enable Watchdog Timer is in Non-Window Mode - * FWDTEN OFF Watchdog Timer Enable WDT Disabled (SWDTEN Bit Controls) - * FWDTWINSZ 25% - */ - -volatile uint32_t _DEVCFG1 __attribute__ ((used, section(".devcfg1"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG1_FNOSC_MASK | 3 << _DEVCFG1_FNOSC_POSITION) - & (~_DEVCFG1_FSOSCEN_MASK | 1 << _DEVCFG1_FSOSCEN_POSITION) - & (~_DEVCFG1_IESO_MASK | 1 << _DEVCFG1_IESO_POSITION) - & (~_DEVCFG1_POSCMOD_MASK | 1 << _DEVCFG1_POSCMOD_POSITION) - & (~_DEVCFG1_OSCIOFNC_MASK | 1 << _DEVCFG1_OSCIOFNC_POSITION) - & (~_DEVCFG1_FPBDIV_MASK | 0 << _DEVCFG1_FPBDIV_POSITION) - & (~_DEVCFG1_FCKSM_MASK | 3 << _DEVCFG1_FCKSM_POSITION) - & (~_DEVCFG1_WDTPS_MASK | 1 << _DEVCFG1_WDTPS_POSITION) - & (~_DEVCFG1_WINDIS_MASK | 0 << _DEVCFG1_WINDIS_POSITION) - & (~_DEVCFG1_FWDTEN_MASK | 0 << _DEVCFG1_FWDTEN_POSITION) - & (~_DEVCFG1_FWDTWINSZ_MASK | 3 << _DEVCFG1_FWDTWINSZ_POSITION); - - -/* - * DEVCFG0 @ 0x1FC02FFC - * - * DEBUG OFF Background Debugger Enable Debugger is disabled - * JTAGEN ON JTAG Enable JTAG Port Enabled - * ICESEL ICS_PGx1 CE/ICD Comm Channel Select Communicate on PGEC1/PGED1 - * PWP OFF Program Flash Write Protect Disable - * BWP OFF Boot Flash Write Protect bit Protection Disabled - * CP OFF Code Protect Protection Disabled - */ - -volatile uint32_t _DEVCFG0 __attribute__ ((used, section(".devcfg0"))) = - 0x7fffffff /* unused bits must be 1 except MSB which is 0 for some odd reason */ - & (~_DEVCFG0_DEBUG_MASK | 3 << _DEVCFG0_DEBUG_POSITION) - & (~_DEVCFG0_JTAGEN_MASK | 1 << _DEVCFG0_JTAGEN_POSITION) - & (~_DEVCFG0_ICESEL_MASK | 3 << _DEVCFG0_ICESEL_POSITION) - & (~_DEVCFG0_PWP_MASK | 0xff << _DEVCFG0_PWP_POSITION) - & (~_DEVCFG0_BWP_MASK | 1 << _DEVCFG0_BWP_POSITION) - & (~_DEVCFG0_CP_MASK | 1 << _DEVCFG0_CP_POSITION); - -/* - * Without a reference to this function from elsewhere LD throws the whole - * compile unit away even though the data is 'volatile' and 'used' !!! - */ -void dummy(void) -{ - (void)1; -} diff --git a/boards/pic32-wifire/Makefile b/boards/pic32-wifire/Makefile deleted file mode 100644 index 72ba6f36247b..000000000000 --- a/boards/pic32-wifire/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -MODULE = board -include $(RIOTBASE)/Makefile.base diff --git a/boards/pic32-wifire/Makefile.features b/boards/pic32-wifire/Makefile.features deleted file mode 100644 index 9e83dbd44dc8..000000000000 --- a/boards/pic32-wifire/Makefile.features +++ /dev/null @@ -1,6 +0,0 @@ -# Put defined MCU peripherals here (in alphabetical order) -FEATURES_PROVIDED += periph_gpio -FEATURES_PROVIDED += periph_timer -FEATURES_PROVIDED += periph_uart - -include $(RIOTCPU)/mips_pic32mz/Makefile.features diff --git a/boards/pic32-wifire/Makefile.include b/boards/pic32-wifire/Makefile.include deleted file mode 100644 index c07595ef9890..000000000000 --- a/boards/pic32-wifire/Makefile.include +++ /dev/null @@ -1,6 +0,0 @@ -export CPU = mips_pic32mz -export CPU_MODEL=p32mz2048efg100 -export APPDEPS += $(RIOTCPU)/$(CPU)/$(CPU_MODEL)/$(CPU_MODEL).S -export USE_UHI_SYSCALLS = 1 - -FLASHFILE ?= $(HEXFILE) diff --git a/boards/pic32-wifire/doc.txt b/boards/pic32-wifire/doc.txt deleted file mode 100644 index 50cbcec755f2..000000000000 --- a/boards/pic32-wifire/doc.txt +++ /dev/null @@ -1,21 +0,0 @@ -/** -@defgroup boards_pic32-wifire Digilent PIC32 WiFire -@ingroup boards -@brief Support for the Digilent PIC32 WiFire - -For instructions on reflashing see: - -https://docs.creatordev.io/wifire/guides/wifire-programming/ - -The RIOT build generates a hexfile compatible with MPLAB-IPE. - -More general information on the board and related documentation can be found -here: - -https://creatordev.io/wifire.html - -https://docs.creatordev.io/wifire/ - - - - */ diff --git a/boards/pic32-wifire/include/board.h b/boards/pic32-wifire/include/board.h deleted file mode 100644 index 2a45424081c2..000000000000 --- a/boards/pic32-wifire/include/board.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * Copyright(C) 2017, Imagination Technologies Limited and/or its - * affiliated group companies. - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - * - */ - -/** - * @ingroup boards_pic32-wifire - * @details - * See: - * http://store.digilentinc.com/chipkit-wi-fire-wifi-enabled-mz-microcontroller-board/ - * for more information on the board. - * - * @{ - * - * @file - * @brief board configuration for the Digilent PIC32 WiFire - * - * @author Neil Jones - */ - -#ifndef BOARD_H -#define BOARD_H - -#include "periph_conf.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#include "vendor/p32mz2048efg100.h" - -/** - * @brief Set how many increments of the count register per uS - * needed by the timer code. - */ -#define TICKS_PER_US (100) - -/** - * @brief We are using an External Interrupt Controller (all pic32 devices use this mode) - */ -#define EIC_IRQ (1) - -/** - * @name LED pin configuration - * @{ - */ -#define LED1_PIN GPIO_PIN(PORT_G, 6) -#define LED2_PIN GPIO_PIN(PORT_D, 4) -#define LED3_PIN GPIO_PIN(PORT_B, 11) -#define LED4_PIN GPIO_PIN(PORT_G, 15) - -#define LED1_MASK (1 << 6) -#define LED2_MASK (1 << 4) -#define LED3_MASK (1 << 11) -#define LED4_MASK (1 << 15) - -#define LED1_ON (LATGSET = LED1_MASK) -#define LED1_OFF (LATGCLR = LED1_MASK) -#define LED1_TOGGLE (LATGINV = LED1_MASK) - -#define LED2_ON (LATDSET = LED2_MASK) -#define LED2_OFF (LATDCLR = LED2_MASK) -#define LED2_TOGGLE (LATDINV = LED2_MASK) - -#define LED3_ON (LATBSET = LED3_MASK) -#define LED3_OFF (LATBCLR = LED3_MASK) -#define LED3_TOGGLE (LATBINV = LED3_MASK) - -#define LED4_ON (LATGSET = LED4_MASK) -#define LED4_OFF (LATGCLR = LED4_MASK) -#define LED4_TOGGLE (LATGINV = LED4_MASK) -/** @} */ - -/** - * @brief Board level initialization - */ -void board_init(void); - -#ifdef __cplusplus -} -#endif - -#endif /* BOARD_H */ -/** @} */ diff --git a/boards/pic32-wifire/include/periph_conf.h b/boards/pic32-wifire/include/periph_conf.h deleted file mode 100644 index efbf5f785bd3..000000000000 --- a/boards/pic32-wifire/include/periph_conf.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright(C) 2016,2017, Imagination Technologies Limited and/or its - * affiliated group companies. - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - * - */ - -/** - * @ingroup boards_pic32-wifire - * @{ - * - * @file - * @brief peripheral configuration for the Digilent PIC32 WiFire - * - * @author Neil Jones - */ -#ifndef PERIPH_CONF_H -#define PERIPH_CONF_H - -#include "periph_cpu.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief The peripheral clock is required for the UART Baud rate calculation - * It is configured by the 'config' registers (see pic32_config_settings.c) - */ -#define PERIPHERAL_CLOCK (100000000) /* Hz */ - -/** - * @name Timer definitions - * @{ - */ -#define TIMER_NUMOF (1) -#define TIMER_0_CHANNELS (3) -/** @} */ - -/** - * @name UART Definitions - * There are 6 UARTS available on this CPU. - * We route debug via UART4 on this board, - * this is the UART connected to the FTDI USB <-> UART device. - * - * Note Microchip number the UARTS 1->4. - * @{ - */ -#define UART_NUMOF (6) -#define DEBUG_VIA_UART (4) -#define DEBUG_UART_BAUD (9600) -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /* PERIPH_CONF_H */ -/** @} */ diff --git a/boards/pic32-wifire/pic32_config_settings.c b/boards/pic32-wifire/pic32_config_settings.c deleted file mode 100644 index f45d18a446a3..000000000000 --- a/boards/pic32-wifire/pic32_config_settings.c +++ /dev/null @@ -1,419 +0,0 @@ -/* - * Copyright(C) 2016,2017, Imagination Technologies Limited and/or its - * affiliated group companies. - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - * - */ - -#include -#include "vendor/p32mz2048efg100.h" - -/* - * Note banked access only applies to MZ part MX only has 1 set of registers - * similar to the MZ's lower alias.Thus when working with MX parts comment - * out the *_B* entries, note the address in the comments are different for MX - * too so a different linker script is required between MX and MZ to place - * these registers at the correct addresses. MM parts have completely different - * config registers, so this file is not applicable. - * - * Note when programming via Microchip IPE (tested using a Pickit-3) entries - * need to exist in the programming file for both the lower alias and the - * config1 configuration spaces (starting at 0x1FC0FFC0 and 0x1FC4FFC0) - * hence the duplicate entries in different sections allowing the linker to - * place them at different addresses. - */ - - -/* - * DEVCFG3_LA @ 0x1FC0FFC0 (lower alias) - * ADEVFGC3_LA @ 0x1FC0FF40 (alternate devcfg3 in lower alias) - * DEVCFG3_B1 @ 0x1FC4FFC0 (config space 1) - * ADEVCFG3_B1 @ 0x1FC4FF40 (alternate devcfg3 in config space 1) - * DEVCFG3_B2 @ 0x1FC6FFC0 (config space 1) - * ADEVCFG3_B2 @ 0x1FC6FF40 (alternate devcfg3 in config space 2) - * - * - * USERID - * FMIIEN OFF Ethernet RMII/MII Enable RMII Enabled - * FETHIO ON Ethernet I/O Pin Select Default Ethernet I/O - * PGL1WAY OFF Permission Group Lock One Way Configuration Allow multiple reconfigurations - * PMDL1WAY OFF Peripheral Module Disable Configuration Allow multiple reconfigurations - * IOL1WAY OFF Peripheral Pin Select Configuration Allow multiple reconfigurations - * FUSBIDIO OFF USB USBID Selection Controlled by Port Function - */ -volatile uint32_t DEVCFG3_LA __attribute__((used, section(".devcfg3_la"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG3_USERID_MASK | 0xFFFF << _DEVCFG3_USERID_POSITION) - & (~_DEVCFG3_FMIIEN_MASK | 0 << _DEVCFG3_FMIIEN_POSITION) - & (~_DEVCFG3_FETHIO_MASK | 1 << _DEVCFG3_FETHIO_POSITION) - & (~_DEVCFG3_PGL1WAY_MASK | 0 << _DEVCFG3_PGL1WAY_POSITION) - & (~_DEVCFG3_PMDL1WAY_MASK | 0 << _DEVCFG3_PMDL1WAY_POSITION) - & (~_DEVCFG3_IOL1WAY_MASK | 0 << _DEVCFG3_IOL1WAY_POSITION) - & (~_DEVCFG3_FUSBIDIO_MASK | 0 << _DEVCFG3_FUSBIDIO_POSITION); - -volatile uint32_t ADEVCFG3_LA __attribute__((used, section(".adevcfg3_la"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG3_USERID_MASK | 0xFFFF << _DEVCFG3_USERID_POSITION) - & (~_DEVCFG3_FMIIEN_MASK | 0 << _DEVCFG3_FMIIEN_POSITION) - & (~_DEVCFG3_FETHIO_MASK | 1 << _DEVCFG3_FETHIO_POSITION) - & (~_DEVCFG3_PGL1WAY_MASK | 0 << _DEVCFG3_PGL1WAY_POSITION) - & (~_DEVCFG3_PMDL1WAY_MASK | 0 << _DEVCFG3_PMDL1WAY_POSITION) - & (~_DEVCFG3_IOL1WAY_MASK | 0 << _DEVCFG3_IOL1WAY_POSITION) - & (~_DEVCFG3_FUSBIDIO_MASK | 0 << _DEVCFG3_FUSBIDIO_POSITION); - -volatile uint32_t DEVCFG3_B1 __attribute__((used, section(".devcfg3_b1"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG3_USERID_MASK | 0xFFFF << _DEVCFG3_USERID_POSITION) - & (~_DEVCFG3_FMIIEN_MASK | 0 << _DEVCFG3_FMIIEN_POSITION) - & (~_DEVCFG3_FETHIO_MASK | 1 << _DEVCFG3_FETHIO_POSITION) - & (~_DEVCFG3_PGL1WAY_MASK | 0 << _DEVCFG3_PGL1WAY_POSITION) - & (~_DEVCFG3_PMDL1WAY_MASK | 0 << _DEVCFG3_PMDL1WAY_POSITION) - & (~_DEVCFG3_IOL1WAY_MASK | 0 << _DEVCFG3_IOL1WAY_POSITION) - & (~_DEVCFG3_FUSBIDIO_MASK | 0 << _DEVCFG3_FUSBIDIO_POSITION); - -volatile uint32_t ADEVCFG3_B1 __attribute__((used, section(".adevcfg3_b1"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG3_USERID_MASK | 0xFFFF << _DEVCFG3_USERID_POSITION) - & (~_DEVCFG3_FMIIEN_MASK | 0 << _DEVCFG3_FMIIEN_POSITION) - & (~_DEVCFG3_FETHIO_MASK | 1 << _DEVCFG3_FETHIO_POSITION) - & (~_DEVCFG3_PGL1WAY_MASK | 0 << _DEVCFG3_PGL1WAY_POSITION) - & (~_DEVCFG3_PMDL1WAY_MASK | 0 << _DEVCFG3_PMDL1WAY_POSITION) - & (~_DEVCFG3_IOL1WAY_MASK | 0 << _DEVCFG3_IOL1WAY_POSITION) - & (~_DEVCFG3_FUSBIDIO_MASK | 0 << _DEVCFG3_FUSBIDIO_POSITION); -/* - * Not needed by default: - * volatile uint32_t DEVCFG3_B2 __attribute__((used,section(".devcfg3_b2"))) - * = DEVCFG3_LA; - * volatile uint32_t ADEVCFG3_B2 __attribute__((used,section(".adevcfg3_la"))) - * = DEVCFG3_LA; - * - */ - -/* - * DEVCFG2_LA @ 0x1FC0FFC4 (lower alias) - * ADEVFGC2_LA @ 0x1FC0FF44 (alternate devcfg2 in lower alias) - * DEVCFG2_B1 @ 0x1FC4FFC4 (config space 1) - * ADEVCFG2_B1 @ 0x1FC4FF44 (alternate devcfg2 in config space 1) - * DEVCFG2_B2 @ 0x1FC6FFC4 (config space 1) - * ADEVCFG2_B2 @ 0x1FC6FF44 (alternate devcfg2 in config space 2) - * - * 24MHz OSC / 3 * 50 / 2 = 200MHz - * - * FPLLIDIV DIV_3 System PLL Input Divider 3x Divider - * FPLLRNG RANGE_5_10_MHZ System PLL Input Range 5-10 MHz Input - * FPLLICLK PLL_POSC System PLL Input Clock Selection POSC is input to the System PLL - * FPLLMULT MUL_50 System PLL Multiplier PLL Multiply by 50 - * FPLLODIV DIV_2 System PLL Output Clock Divider 2x Divider - * UPLLFSEL FREQ_24MHZ USB PLL Input Frequency Selection USB PLL input is 24 MHz - */ - -volatile uint32_t DEVCFG2_LA __attribute__ ((used, section(".devcfg2_la"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG2_FPLLIDIV_MASK | 2 << _DEVCFG2_FPLLIDIV_POSITION) - & (~_DEVCFG2_FPLLRNG_MASK | 0x1 << _DEVCFG2_FPLLRNG_POSITION) - & (~_DEVCFG2_FPLLICLK_MASK | 0x0 << _DEVCFG2_FPLLICLK_POSITION) - & (~_DEVCFG2_FPLLMULT_MASK | 49 << _DEVCFG2_FPLLMULT_POSITION) - & (~_DEVCFG2_FPLLODIV_MASK | 1 << _DEVCFG2_FPLLODIV_POSITION) - & (~_DEVCFG2_UPLLFSEL_MASK | 0x1 << _DEVCFG2_UPLLFSEL_POSITION); - -volatile uint32_t ADEVCFG2_LA __attribute__ ((used, section(".adevcfg2_la"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG2_FPLLIDIV_MASK | 2 << _DEVCFG2_FPLLIDIV_POSITION) - & (~_DEVCFG2_FPLLRNG_MASK | 0x1 << _DEVCFG2_FPLLRNG_POSITION) - & (~_DEVCFG2_FPLLICLK_MASK | 0x0 << _DEVCFG2_FPLLICLK_POSITION) - & (~_DEVCFG2_FPLLMULT_MASK | 49 << _DEVCFG2_FPLLMULT_POSITION) - & (~_DEVCFG2_FPLLODIV_MASK | 1 << _DEVCFG2_FPLLODIV_POSITION) - & (~_DEVCFG2_UPLLFSEL_MASK | 0x1 << _DEVCFG2_UPLLFSEL_POSITION); - -volatile uint32_t DEVCFG2_B1 __attribute__ ((used, section(".devcfg2_b1"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG2_FPLLIDIV_MASK | 2 << _DEVCFG2_FPLLIDIV_POSITION) - & (~_DEVCFG2_FPLLRNG_MASK | 0x1 << _DEVCFG2_FPLLRNG_POSITION) - & (~_DEVCFG2_FPLLICLK_MASK | 0x0 << _DEVCFG2_FPLLICLK_POSITION) - & (~_DEVCFG2_FPLLMULT_MASK | 49 << _DEVCFG2_FPLLMULT_POSITION) - & (~_DEVCFG2_FPLLODIV_MASK | 1 << _DEVCFG2_FPLLODIV_POSITION) - & (~_DEVCFG2_UPLLFSEL_MASK | 0x1 << _DEVCFG2_UPLLFSEL_POSITION); - -volatile uint32_t ADEVCFG2_B1 __attribute__ ((used, section(".adevcfg2_b1"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG2_FPLLIDIV_MASK | 2 << _DEVCFG2_FPLLIDIV_POSITION) - & (~_DEVCFG2_FPLLRNG_MASK | 0x1 << _DEVCFG2_FPLLRNG_POSITION) - & (~_DEVCFG2_FPLLICLK_MASK | 0x0 << _DEVCFG2_FPLLICLK_POSITION) - & (~_DEVCFG2_FPLLMULT_MASK | 49 << _DEVCFG2_FPLLMULT_POSITION) - & (~_DEVCFG2_FPLLODIV_MASK | 1 << _DEVCFG2_FPLLODIV_POSITION) - & (~_DEVCFG2_UPLLFSEL_MASK | 0x1 << _DEVCFG2_UPLLFSEL_POSITION); -/* Not needed by default: */ -/* uint32_t DEVCFG2_B2 __attribute__ ((section(".devcfg2_b2"))) = DEVCFG2_LA; */ -/* uint32_t ADEVCFG2_B2 __attribute__ ((section(".adevcfg2_b2"))) = DEVCFG2_LA; */ - - -/* - * DEVCFG1_LA @ 0x1FC0FFC8 (lower alias) - * ADEVFGC1_LA @ 0x1FC0FF48 (alternate devcfg1 in lower alias) - * DEVCFG1_B1 @ 0x1FC4FFC8 (config space 1) - * ADEVCFG1_B1 @ 0x1FC4FF48 (alternate devcfg1 in config space 1) - * DEVCFG1_B2 @ 0x1FC6FFC8 (config space 1) - * ADEVCFG1_B2 @ 0x1FC6FF48 (alternate devcfg1 in config space 2) - * - * FNOSC SPLL Oscillator Selection Bits System PLL - * DMTINTV WIN_127_128 DMT Count Window Interval Window/Interval value is 127/128 counter value - * FSOSCEN OFF Secondary Oscillator Enable Disable SOSC - * IESO ON Internal/External Switch Over Enabled - * POSCMOD EC Primary Oscillator Configuration External clock mode - * OSCIOFNC OFF CLKO Output Signal Active on the OSCO Pin Disabled (1) - * FCKSM CSDCMD Clock Switching and Monitor Selection Clock Switch Disabled, FSCM Disabled - * WDTPS PS1048576 Watchdog Timer Postscaler 1:1048576 - * WDTSPGM STOP Watchdog Timer Stop During Flash Programming WDT stops during Flash programming - * WINDIS NORMAL Watchdog Timer Window Mode Watchdog Timer is in non-Window mode - * FWDTEN OFF Watchdog Timer Enable WDT Disabled - * FWDTWINSZ WINSZ_25 Watchdog Timer Window Size Window size is 25% - * DMTCNT DMT8 Deadman Timer Count Selection 2^8 (256) - * FDMTEN OFF Deadman Timer Enable Deadman Timer is disabled - */ - -volatile uint32_t DEVCFG1_LA __attribute__ ((used, section(".devcfg1_la"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG1_FNOSC_MASK | 0x1 << _DEVCFG1_FNOSC_POSITION) - & (~_DEVCFG1_DMTINTV_MASK | 0x7 << _DEVCFG1_DMTINTV_POSITION) - & (~_DEVCFG1_FSOSCEN_MASK | 0 << _DEVCFG1_FSOSCEN_POSITION) - & (~_DEVCFG1_IESO_MASK | 1 << _DEVCFG1_IESO_POSITION) - & (~_DEVCFG1_POSCMOD_MASK | 0x0 << _DEVCFG1_POSCMOD_POSITION) - & (~_DEVCFG1_OSCIOFNC_MASK | 1 << _DEVCFG1_OSCIOFNC_POSITION) - & (~_DEVCFG1_FCKSM_MASK | 0x0 << _DEVCFG1_FCKSM_POSITION) - & (~_DEVCFG1_WDTPS_MASK | 0x14 << _DEVCFG1_WDTPS_POSITION) - & (~_DEVCFG1_WDTSPGM_MASK | 1 << _DEVCFG1_WDTSPGM_POSITION) - & (~_DEVCFG1_WINDIS_MASK | 1 << _DEVCFG1_WINDIS_POSITION) - & (~_DEVCFG1_FWDTEN_MASK | 0 << _DEVCFG1_FWDTEN_POSITION) - & (~_DEVCFG1_FWDTWINSZ_MASK | 0x3 << _DEVCFG1_FWDTWINSZ_POSITION) - & (~_DEVCFG1_DMTCNT_MASK | 0x0 << _DEVCFG1_DMTCNT_POSITION) - & (~_DEVCFG1_FDMTEN_MASK | 0 << _DEVCFG1_FDMTEN_POSITION); - -volatile uint32_t ADEVCFG1_LA __attribute__ ((used, section(".adevcfg1_la"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG1_FNOSC_MASK | 0x1 << _DEVCFG1_FNOSC_POSITION) - & (~_DEVCFG1_DMTINTV_MASK | 0x7 << _DEVCFG1_DMTINTV_POSITION) - & (~_DEVCFG1_FSOSCEN_MASK | 0 << _DEVCFG1_FSOSCEN_POSITION) - & (~_DEVCFG1_IESO_MASK | 1 << _DEVCFG1_IESO_POSITION) - & (~_DEVCFG1_POSCMOD_MASK | 0x0 << _DEVCFG1_POSCMOD_POSITION) - & (~_DEVCFG1_OSCIOFNC_MASK | 1 << _DEVCFG1_OSCIOFNC_POSITION) - & (~_DEVCFG1_FCKSM_MASK | 0x0 << _DEVCFG1_FCKSM_POSITION) - & (~_DEVCFG1_WDTPS_MASK | 0x14 << _DEVCFG1_WDTPS_POSITION) - & (~_DEVCFG1_WDTSPGM_MASK | 1 << _DEVCFG1_WDTSPGM_POSITION) - & (~_DEVCFG1_WINDIS_MASK | 1 << _DEVCFG1_WINDIS_POSITION) - & (~_DEVCFG1_FWDTEN_MASK | 0 << _DEVCFG1_FWDTEN_POSITION) - & (~_DEVCFG1_FWDTWINSZ_MASK | 0x3 << _DEVCFG1_FWDTWINSZ_POSITION) - & (~_DEVCFG1_DMTCNT_MASK | 0x0 << _DEVCFG1_DMTCNT_POSITION) - & (~_DEVCFG1_FDMTEN_MASK | 0 << _DEVCFG1_FDMTEN_POSITION); - -volatile uint32_t DEVCFG1_B1 __attribute__ ((used, section(".devcfg1_b1"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG1_FNOSC_MASK | 0x1 << _DEVCFG1_FNOSC_POSITION) - & (~_DEVCFG1_DMTINTV_MASK | 0x7 << _DEVCFG1_DMTINTV_POSITION) - & (~_DEVCFG1_FSOSCEN_MASK | 0 << _DEVCFG1_FSOSCEN_POSITION) - & (~_DEVCFG1_IESO_MASK | 1 << _DEVCFG1_IESO_POSITION) - & (~_DEVCFG1_POSCMOD_MASK | 0x0 << _DEVCFG1_POSCMOD_POSITION) - & (~_DEVCFG1_OSCIOFNC_MASK | 1 << _DEVCFG1_OSCIOFNC_POSITION) - & (~_DEVCFG1_FCKSM_MASK | 0x0 << _DEVCFG1_FCKSM_POSITION) - & (~_DEVCFG1_WDTPS_MASK | 0x14 << _DEVCFG1_WDTPS_POSITION) - & (~_DEVCFG1_WDTSPGM_MASK | 1 << _DEVCFG1_WDTSPGM_POSITION) - & (~_DEVCFG1_WINDIS_MASK | 1 << _DEVCFG1_WINDIS_POSITION) - & (~_DEVCFG1_FWDTEN_MASK | 0 << _DEVCFG1_FWDTEN_POSITION) - & (~_DEVCFG1_FWDTWINSZ_MASK | 0x3 << _DEVCFG1_FWDTWINSZ_POSITION) - & (~_DEVCFG1_DMTCNT_MASK | 0x0 << _DEVCFG1_DMTCNT_POSITION) - & (~_DEVCFG1_FDMTEN_MASK | 0 << _DEVCFG1_FDMTEN_POSITION); - -volatile uint32_t ADEVCFG1_B1 __attribute__ ((used, section(".adevcfg1_b1"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG1_FNOSC_MASK | 0x1 << _DEVCFG1_FNOSC_POSITION) - & (~_DEVCFG1_DMTINTV_MASK | 0x7 << _DEVCFG1_DMTINTV_POSITION) - & (~_DEVCFG1_FSOSCEN_MASK | 0 << _DEVCFG1_FSOSCEN_POSITION) - & (~_DEVCFG1_IESO_MASK | 1 << _DEVCFG1_IESO_POSITION) - & (~_DEVCFG1_POSCMOD_MASK | 0x0 << _DEVCFG1_POSCMOD_POSITION) - & (~_DEVCFG1_OSCIOFNC_MASK | 1 << _DEVCFG1_OSCIOFNC_POSITION) - & (~_DEVCFG1_FCKSM_MASK | 0x0 << _DEVCFG1_FCKSM_POSITION) - & (~_DEVCFG1_WDTPS_MASK | 0x14 << _DEVCFG1_WDTPS_POSITION) - & (~_DEVCFG1_WDTSPGM_MASK | 1 << _DEVCFG1_WDTSPGM_POSITION) - & (~_DEVCFG1_WINDIS_MASK | 1 << _DEVCFG1_WINDIS_POSITION) - & (~_DEVCFG1_FWDTEN_MASK | 0 << _DEVCFG1_FWDTEN_POSITION) - & (~_DEVCFG1_FWDTWINSZ_MASK | 0x3 << _DEVCFG1_FWDTWINSZ_POSITION) - & (~_DEVCFG1_DMTCNT_MASK | 0x0 << _DEVCFG1_DMTCNT_POSITION) - & (~_DEVCFG1_FDMTEN_MASK | 0 << _DEVCFG1_FDMTEN_POSITION); - -/* Not needed by default: */ -/* uint32_t DEVCFG1_B2 __attribute__ ((section(".devcfg1_b2"))) = DEVCFG1_LA; */ -/* uint32_t ADEVCFG1_B2 __attribute__ ((section(".adevcfg1_b2"))) = DEVCFG1_LA */ - -/* - * DEVCFG0_LA @ 0x1FC0FFCC (lower alias) - * ADEVFGC0_LA @ 0x1FC0FF4C (alternate devcfg0 in lower alias) - * DEVCFG0_B1 @ 0x1FC4FFCC (config space 1) - * ADEVCFG0_B1 @ 0x1FC4FF4C (alternate devcfg0 in config space 1) - * DEVCFG0_B2 @ 0x1FC6FFCC (config space 1) - * ADEVCFG0_B2 @ 0x1FC6FF4C (alternate devcfg0 in config space 2) - * - * DEBUG OFF Background Debugger Enable Debugger is disabled - * JTAGEN ON JTAG Enable JTAG Port Enabled - * ICESEL ICS_PGx2 ICE/ICD Comm Channel Select Communicate on PGEC2/PGED2 - * TRCEN ON Trace Enable Trace features in the CPU are disabled - * BOOTISA MIPS32 Boot ISA Selection Boot code and Exception code is MIPS32 - * FECCCON OFF_UNLOCKED Dynamic Flash ECC Configuration ECC and Dynamic ECC are disabled (ECCCON bits are writable) - * FSLEEP OFF Flash Sleep Mode Flash is powered down when the device is in Sleep mode - * DBGPER PG_ALL Debug Mode CPU Access Permission Allow CPU access to all permission regions - * SMCLR MCLR_NORM Soft Master Clear Enable bit MCLR pin generates a normal system Reset - * SOSCGAIN GAIN_2X Secondary Oscillator Gain Control bits 2x gain setting - * SOSCBOOST ON Secondary Oscillator Boost Kick Start Enable bit Boost the kick start of the oscillator - * POSCGAIN GAIN_2X Primary Oscillator Gain Control bits 2x gain setting - * POSCBOOST ON Primary Oscillator Boost Kick Start Enable bit Boost the kick start of the oscillator - * EJTAGBEN NORMAL EJTAG Boot Normal EJTAG functionality - */ - -volatile uint32_t DEVCFG0_LA __attribute__ ((used, section(".devcfg0_la"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG0_DEBUG_MASK | 0x3 << _DEVCFG0_DEBUG_POSITION) - & (~_DEVCFG0_JTAGEN_MASK | 0x1 << _DEVCFG0_JTAGEN_POSITION) - & (~_DEVCFG0_ICESEL_MASK | 0x2 << _DEVCFG0_ICESEL_POSITION) - & (~_DEVCFG0_TRCEN_MASK | 0x1 << _DEVCFG0_TRCEN_POSITION) - & (~_DEVCFG0_BOOTISA_MASK | 0x1 << _DEVCFG0_BOOTISA_POSITION) - & (~_DEVCFG0_FECCCON_MASK | 0x3 << _DEVCFG0_FECCCON_POSITION) - & (~_DEVCFG0_FSLEEP_MASK | 0x1 << _DEVCFG0_FSLEEP_POSITION) - & (~_DEVCFG0_DBGPER_MASK | 0x7 << _DEVCFG0_DBGPER_POSITION) - & (~_DEVCFG0_SMCLR_MASK | 0x1 << _DEVCFG0_SMCLR_POSITION) - & (~_DEVCFG0_SOSCGAIN_MASK | 0x2 << _DEVCFG0_SOSCGAIN_POSITION) - & (~_DEVCFG0_SOSCBOOST_MASK | 0x1 << _DEVCFG0_SOSCBOOST_POSITION) - & (~_DEVCFG0_POSCGAIN_MASK | 0x2 << _DEVCFG0_POSCGAIN_POSITION) - & (~_DEVCFG0_POSCBOOST_MASK | 0x1 << _DEVCFG0_POSCBOOST_POSITION) - & (~_DEVCFG0_EJTAGBEN_MASK | 0x1 << _DEVCFG0_EJTAGBEN_POSITION); - -volatile uint32_t ADEVCFG0_LA __attribute__ ((used, section(".adevcfg0_la"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG0_DEBUG_MASK | 0x3 << _DEVCFG0_DEBUG_POSITION) - & (~_DEVCFG0_JTAGEN_MASK | 0x1 << _DEVCFG0_JTAGEN_POSITION) - & (~_DEVCFG0_ICESEL_MASK | 0x2 << _DEVCFG0_ICESEL_POSITION) - & (~_DEVCFG0_TRCEN_MASK | 0x1 << _DEVCFG0_TRCEN_POSITION) - & (~_DEVCFG0_BOOTISA_MASK | 0x1 << _DEVCFG0_BOOTISA_POSITION) - & (~_DEVCFG0_FECCCON_MASK | 0x3 << _DEVCFG0_FECCCON_POSITION) - & (~_DEVCFG0_FSLEEP_MASK | 0x1 << _DEVCFG0_FSLEEP_POSITION) - & (~_DEVCFG0_DBGPER_MASK | 0x7 << _DEVCFG0_DBGPER_POSITION) - & (~_DEVCFG0_SMCLR_MASK | 0x1 << _DEVCFG0_SMCLR_POSITION) - & (~_DEVCFG0_SOSCGAIN_MASK | 0x2 << _DEVCFG0_SOSCGAIN_POSITION) - & (~_DEVCFG0_SOSCBOOST_MASK | 0x1 << _DEVCFG0_SOSCBOOST_POSITION) - & (~_DEVCFG0_POSCGAIN_MASK | 0x2 << _DEVCFG0_POSCGAIN_POSITION) - & (~_DEVCFG0_POSCBOOST_MASK | 0x1 << _DEVCFG0_POSCBOOST_POSITION) - & (~_DEVCFG0_EJTAGBEN_MASK | 0x1 << _DEVCFG0_EJTAGBEN_POSITION); - -volatile uint32_t DEVCFG0_B1 __attribute__ ((used, section(".devcfg0_b1"))) = - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG0_DEBUG_MASK | 0x3 << _DEVCFG0_DEBUG_POSITION) - & (~_DEVCFG0_JTAGEN_MASK | 0x1 << _DEVCFG0_JTAGEN_POSITION) - & (~_DEVCFG0_ICESEL_MASK | 0x2 << _DEVCFG0_ICESEL_POSITION) - & (~_DEVCFG0_TRCEN_MASK | 0x1 << _DEVCFG0_TRCEN_POSITION) - & (~_DEVCFG0_BOOTISA_MASK | 0x1 << _DEVCFG0_BOOTISA_POSITION) - & (~_DEVCFG0_FECCCON_MASK | 0x3 << _DEVCFG0_FECCCON_POSITION) - & (~_DEVCFG0_FSLEEP_MASK | 0x1 << _DEVCFG0_FSLEEP_POSITION) - & (~_DEVCFG0_DBGPER_MASK | 0x7 << _DEVCFG0_DBGPER_POSITION) - & (~_DEVCFG0_SMCLR_MASK | 0x1 << _DEVCFG0_SMCLR_POSITION) - & (~_DEVCFG0_SOSCGAIN_MASK | 0x2 << _DEVCFG0_SOSCGAIN_POSITION) - & (~_DEVCFG0_SOSCBOOST_MASK | 0x1 << _DEVCFG0_SOSCBOOST_POSITION) - & (~_DEVCFG0_POSCGAIN_MASK | 0x2 << _DEVCFG0_POSCGAIN_POSITION) - & (~_DEVCFG0_POSCBOOST_MASK | 0x1 << _DEVCFG0_POSCBOOST_POSITION) - & (~_DEVCFG0_EJTAGBEN_MASK | 0x1 << _DEVCFG0_EJTAGBEN_POSITION); - -volatile uint32_t ADEVCFG0_B1 __attribute__ ((used, section(".adevcfg0_b1")))= - 0xffffffff /* unused bits must be 1 */ - & (~_DEVCFG0_DEBUG_MASK | 0x3 << _DEVCFG0_DEBUG_POSITION) - & (~_DEVCFG0_JTAGEN_MASK | 0x1 << _DEVCFG0_JTAGEN_POSITION) - & (~_DEVCFG0_ICESEL_MASK | 0x2 << _DEVCFG0_ICESEL_POSITION) - & (~_DEVCFG0_TRCEN_MASK | 0x1 << _DEVCFG0_TRCEN_POSITION) - & (~_DEVCFG0_BOOTISA_MASK | 0x1 << _DEVCFG0_BOOTISA_POSITION) - & (~_DEVCFG0_FECCCON_MASK | 0x3 << _DEVCFG0_FECCCON_POSITION) - & (~_DEVCFG0_FSLEEP_MASK | 0x1 << _DEVCFG0_FSLEEP_POSITION) - & (~_DEVCFG0_DBGPER_MASK | 0x7 << _DEVCFG0_DBGPER_POSITION) - & (~_DEVCFG0_SMCLR_MASK | 0x1 << _DEVCFG0_SMCLR_POSITION) - & (~_DEVCFG0_SOSCGAIN_MASK | 0x2 << _DEVCFG0_SOSCGAIN_POSITION) - & (~_DEVCFG0_SOSCBOOST_MASK | 0x1 << _DEVCFG0_SOSCBOOST_POSITION) - & (~_DEVCFG0_POSCGAIN_MASK | 0x2 << _DEVCFG0_POSCGAIN_POSITION) - & (~_DEVCFG0_POSCBOOST_MASK | 0x1 << _DEVCFG0_POSCBOOST_POSITION) - & (~_DEVCFG0_EJTAGBEN_MASK | 0x1 << _DEVCFG0_EJTAGBEN_POSITION); - -/* - * uint32_t DEVCFG0_B2 __attribute__ ((section(".devcfg0_b2"))) - * = 0xFFFFF7D7; - * uint32_t ADEVCFG0_B2 __attribute__ ((section(".adevcfg0_b2"))) - * = 0xFFFFF7D7; - * - */ - - -/* - * DEVCP0_LA @ 0x1FC0FFDC (lower alias) - * ADEVCP0_LA @ 0x1FC0FF5C (alternate devcp0 in lower alias) - * DEVCP0_B1 @ 0x1FC4FFDC (config space 1) - * ADEVCP0_B1 @ 0x1FC4FF5C (alternate devcp0 in config space 1) - * DEVCP0_B2 @ 0x1FC6FFDC (config space 1) - * ADEVCP0_B2 @ 0x1FC6FF5C (alternate devcp0 in config space 2 - * - * CP OFF Code Protect Protection Disabled, unused bits must be 1. - */ - -volatile uint32_t DEVCP0_LA __attribute__ ((used, section(".devcp0_la"))) = - 0xFFFFFFFF | _DEVCP0_CP_MASK; -volatile uint32_t ADEVCP0_LA __attribute__ ((used, section(".adevcp0_la"))) = - 0xFFFFFFFF | _DEVCP0_CP_MASK; -volatile uint32_t DEVCP0_B1 __attribute__ ((used, section(".devcp0_b1"))) = - 0xFFFFFFFF | _DEVCP0_CP_MASK; -volatile uint32_t ADEVCP0_B1 __attribute__ ((used, section(".adevcp0_b1"))) = - 0xFFFFFFFF | _DEVCP0_CP_MASK; -/* not needed by default */ -/* uint32_t DEVCP0_B2 __attribute__ ((section(".devcp0_b1"))) = 0xFFFFFFFF; */ -/* uint32_t ADEVCP0_B2 __attribute__ ((section(".adevcp0_b1"))) = 0xFFFFFFFF; */ - -/* - * SEQ_B1[0..3] @ 1FC0FFF0 - * SEQ_B1[0..3] @ 1FC4FFF0 - * - * TSEQ Boot Flash True Sequence Number - * CSEQ Boot Flash Complement Sequence Number - */ - -volatile uint32_t SEQ_LA[4] __attribute__ ((used, section(".seq_la"))) = - { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }; -volatile uint32_t SEQ_B1[4] __attribute__ ((used, section(".seq_b1"))) = - { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }; -/* - * Not needed by default: - * uint32_t SEQ_B2[4] __attribute__ ((section(".seq_b2"))) = - * {0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF}; - */ - - -/* - * STUPIDLY Microchip has hard coded the MSB bit of devsign to 0, So even if - * you erase the whole device, everything returns 0xFFFFFFF except this 1 - * register (and its alternate) which return 0x7FFFFFF!! - * - * We set it in the output image so verification doesn't fail - * - * DEVSIGN0 @ 0xBFC0FFEC - * ADEVSIGN0 @ 0xBFC0FF6C - * - */ - -volatile uint32_t DEVSIGN_LA __attribute__ ((used, section(".devsign_la"))) = 0x7FFFFFFF; -volatile uint32_t ADEVSIGN_LA __attribute__ ((used, section(".adevsign_la"))) = 0x7FFFFFFF; -volatile uint32_t DEVSIGN_B1 __attribute__ ((used, section(".devsign_b1"))) = 0x7FFFFFFF; -volatile uint32_t ADEVSIGN_B1 __attribute__ ((used, section(".adevsign_b1"))) = 0x7FFFFFFF; -volatile uint32_t DEVSIGN_B2 __attribute__ ((used, section(".devsign_b2"))) = 0x7FFFFFFF; -volatile uint32_t ADEVSIGN_B2 __attribute__ ((used, section(".adevsign_b2"))) = 0x7FFFFFFF; - - -/* - * Without a reference to this function from elsewhere LD throws the whole - * compile unit away even though the data is 'volatile' and 'used' !!! - */ -void dummy(void) -{ - (void)1; -} diff --git a/boards/pic32-wifire/wifire.c b/boards/pic32-wifire/wifire.c deleted file mode 100644 index 9fe3b221a8bf..000000000000 --- a/boards/pic32-wifire/wifire.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * Copyright(C) 2016,2017, Imagination Technologies Limited and/or its - * affiliated group companies. - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - * - */ - -#include -#include -#include "periph/gpio.h" -#include "periph/hwrng.h" -#include "periph/uart.h" -#include "bitarithm.h" -#include "board.h" -#include "cpu.h" - -extern void dummy(void); - -void board_init(void) -{ - /* - * Setup pin mux for UART4 this is the one connected - * to the ftdi chip (usb<->uart) - */ - U4RXR = 0xb; /* connect pin RPF2 to UART 4 RX */ - RPF8R = 0x2; /* connect pin RPF8 to UART 4 TX */ - - /* intialise UART used for debug (printf) */ -#ifdef DEBUG_VIA_UART - uart_init(DEBUG_VIA_UART, DEBUG_UART_BAUD, NULL, 0); -#endif - - /* Turn off all LED's */ - gpio_init(LED1_PIN, GPIO_OUT); - gpio_init(LED2_PIN, GPIO_OUT); - gpio_init(LED3_PIN, GPIO_OUT); - gpio_init(LED4_PIN, GPIO_OUT); - LED1_OFF; - LED2_OFF; - LED3_OFF; - LED4_OFF; - - /* initialize the CPU */ - cpu_init(); - - /* Stop the linker from throwing away the PIC32 config register settings */ - dummy(); -} - -void pm_reboot(void) -{ - /* TODO, note this is needed to get 'default' example to build */ -} diff --git a/examples/gnrc_border_router/Makefile b/examples/gnrc_border_router/Makefile index 3d0c46d9529b..c183738471e6 100644 --- a/examples/gnrc_border_router/Makefile +++ b/examples/gnrc_border_router/Makefile @@ -23,7 +23,7 @@ BOARD_INSUFFICIENT_MEMORY := airfy-beacon arduino-duemilanove arduino-leonardo \ weio wsn430-v1_3b wsn430-v1_4 yunjia-nrf51822 z1 # The following boards do not have an available UART -BOARD_BLACKLIST += pic32-wifire pic32-clicker ruuvitag thingy52 +BOARD_BLACKLIST += ruuvitag thingy52 # use ethos (ethernet over serial) for network communication and stdio over # UART, but not on native, as native has a tap interface towards the host. diff --git a/examples/javascript/Makefile b/examples/javascript/Makefile index 7d32cb4ba05c..9135547652b6 100644 --- a/examples/javascript/Makefile +++ b/examples/javascript/Makefile @@ -21,7 +21,7 @@ BOARD_INSUFFICIENT_MEMORY := airfy-beacon b-l072z-lrwan1 blackpill bluepill call BOARD_BLACKLIST := arduino-duemilanove arduino-leonardo arduino-mega2560 \ arduino-nano arduino-uno chronos \ msb-430 msb-430h telosb waspmote-pro wsn430-v1_3b \ - wsn430-v1_4 z1 pic32-wifire pic32-clicker jiminy-mega256rfr2 \ + wsn430-v1_4 z1 jiminy-mega256rfr2 \ mega-xplained # Comment this out to disable code in RIOT that does safety checking diff --git a/examples/lua_REPL/Makefile b/examples/lua_REPL/Makefile index 45b1c9214925..8164bc6f77a0 100644 --- a/examples/lua_REPL/Makefile +++ b/examples/lua_REPL/Makefile @@ -32,7 +32,7 @@ BOARD_INSUFFICIENT_MEMORY := blackpill bluepill calliope-mini cc2650-launchpad \ BOARD_BLACKLIST := arduino-duemilanove arduino-leonardo \ arduino-mega2560 arduino-nano arduino-uno \ chronos hifive1 hifive1b jiminy-mega256rfr2 mega-xplained \ - msb-430 msb-430h pic32-clicker pic32-wifire telosb \ + msb-430 msb-430h telosb \ waspmote-pro wsn430-v1_3b wsn430-v1_4 z1 # Comment this out to disable code in RIOT that does safety checking diff --git a/examples/lua_basic/Makefile b/examples/lua_basic/Makefile index df7d6b3d2558..00b7b918288a 100644 --- a/examples/lua_basic/Makefile +++ b/examples/lua_basic/Makefile @@ -19,8 +19,8 @@ BOARD_INSUFFICIENT_MEMORY := blackpill bluepill calliope-mini cc2650-launchpad \ BOARD_BLACKLIST := arduino-duemilanove arduino-leonardo \ arduino-mega2560 arduino-nano \ arduino-uno chronos hifive1 hifive1b jiminy-mega256rfr2 \ - mega-xplained msb-430 msb-430h pic32-clicker \ - pic32-wifire telosb waspmote-pro wsn430-v1_3b wsn430-v1_4 z1 + mega-xplained msb-430 msb-430h \ + telosb waspmote-pro wsn430-v1_3b wsn430-v1_4 z1 # Comment this out to disable code in RIOT that does safety checking diff --git a/tests/emb6/Makefile b/tests/emb6/Makefile index 0d6fb23c61e9..cf49df12ad7a 100644 --- a/tests/emb6/Makefile +++ b/tests/emb6/Makefile @@ -3,7 +3,7 @@ BOARD ?= samr21-xpro include ../Makefile.tests_common # MSP-430 doesn't support C11's atomic functionality yet -BOARD_BLACKLIST := msb-430 msb-430h pic32-clicker pic32-wifire \ +BOARD_BLACKLIST := msb-430 msb-430h \ telosb wsn430-v1_3b wsn430-v1_4 z1 BOARD_INSUFFICIENT_MEMORY := arduino-duemilanove arduino-leonardo \ diff --git a/tests/pkg_semtech-loramac/Makefile b/tests/pkg_semtech-loramac/Makefile index 961d601b9fd3..30f392dfa67d 100644 --- a/tests/pkg_semtech-loramac/Makefile +++ b/tests/pkg_semtech-loramac/Makefile @@ -6,7 +6,7 @@ BOARD_INSUFFICIENT_MEMORY := arduino-duemilanove arduino-leonardo arduino-nano \ arduino-uno nucleo-f031k6 nucleo-f042k6 \ nucleo-l031k6 -BOARD_BLACKLIST := msb-430 msb-430h pic32-clicker pic32-wifire \ +BOARD_BLACKLIST := msb-430 msb-430h \ telosb wsn430-v1_3b wsn430-v1_4 z1 # waspmote-pro and arduino-meag2560 don't have enough RAM to support another diff --git a/tests/pkg_ubasic/Makefile b/tests/pkg_ubasic/Makefile index 260ac6a11b3c..bb97740b2b5a 100644 --- a/tests/pkg_ubasic/Makefile +++ b/tests/pkg_ubasic/Makefile @@ -20,8 +20,6 @@ BOARD_BLACKLIST := \ mega-xplained \ msb-430 \ msb-430h \ - pic32-clicker \ - pic32-wifire \ telosb \ waspmote-pro \ wsn430-v1_3b \ diff --git a/tests/rng/Makefile b/tests/rng/Makefile index c772140bd695..f62557cb2f66 100644 --- a/tests/rng/Makefile +++ b/tests/rng/Makefile @@ -1,7 +1,7 @@ include ../Makefile.tests_common # some boards have not enough rom and/or ram -BOARD_BLACKLIST += nucleo-f031k6 nucleo-f042k6 nucleo-l031k6 pic32-clicker +BOARD_BLACKLIST += nucleo-f031k6 nucleo-f042k6 nucleo-l031k6 BOARD_INSUFFICIENT_MEMORY += arduino-duemilanove arduino-leonardo arduino-nano \ arduino-uno diff --git a/tests/ssp/Makefile b/tests/ssp/Makefile index 612ad44af79a..ace11117c085 100644 --- a/tests/ssp/Makefile +++ b/tests/ssp/Makefile @@ -5,7 +5,7 @@ BOARD_BLACKLIST := arduino-duemilanove arduino-leonardo \ arduino-mega2560 arduino-nano \ arduino-uno chronos esp8266-esp-12x esp8266-olimex-mod \ esp8266-sparkfun-thing jiminy-mega256rfr2 mega-xplained \ - msb-430 msb-430h pic32-clicker pic32-wifire telosb \ + msb-430 msb-430h telosb \ waspmote-pro wsn430-v1_3b wsn430-v1_4 z1 USEMODULE += ssp