I would like to contribute cuTile ports of Liger-Kernel's chunked preference losses to src/tilegym/suites/liger/, following the grpo_loss fwd+bwd pattern and the chunked backward-in-forward structure of fused_linear_cross_entropy. Plan: one PR per loss, starting with DPO (LigerFusedLinearDPOLoss semantics: fused linear over chosen/rejected halves, per-sequence logps, reference-model support, the upstream loss_type variants).
Intended split, mirroring the FLCE port: torch/cuBLAS keeps the GEMMs, cuTile owns the two row-wise kernels (fused per-row logsumexp plus target log-prob, and the in-place d_logits write), and the O(n_pairs) preference formulas stay in device-side torch so every variant matches upstream exactly. Upstream implements these in chunked torch.compile rather than a handwritten kernel, so the benchmark baseline would be Liger's compiled path plus a naive full-logits torch reference, validated on Ampere or Blackwell.
Before I start: is the liger suite open to external ports? It is NVIDIA-authored so far, and I do not want to collide with internal plans. Two scope questions if yes:
- Full loss_type coverage in the first DPO PR, or sigmoid first with variants as follow-ups?
- Perf table in the PR description only, like the existing liger suite ops, or an in-repo benchmark file like
tests/benchmark/suites/unsloth/?
I would like to contribute cuTile ports of Liger-Kernel's chunked preference losses to
src/tilegym/suites/liger/, following thegrpo_lossfwd+bwd pattern and the chunked backward-in-forward structure offused_linear_cross_entropy. Plan: one PR per loss, starting with DPO (LigerFusedLinearDPOLosssemantics: fused linear over chosen/rejected halves, per-sequence logps, reference-model support, the upstreamloss_typevariants).Intended split, mirroring the FLCE port: torch/cuBLAS keeps the GEMMs, cuTile owns the two row-wise kernels (fused per-row logsumexp plus target log-prob, and the in-place d_logits write), and the O(n_pairs) preference formulas stay in device-side torch so every variant matches upstream exactly. Upstream implements these in chunked torch.compile rather than a handwritten kernel, so the benchmark baseline would be Liger's compiled path plus a naive full-logits torch reference, validated on Ampere or Blackwell.
Before I start: is the liger suite open to external ports? It is NVIDIA-authored so far, and I do not want to collide with internal plans. Two scope questions if yes:
tests/benchmark/suites/unsloth/?