D16Pascal/Condition.pas at master · Memnarch/D16Pascal · GitHub

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
unit Condition;

interface

uses
  Classes, Types, Generics.Collections, CodeElement, WriterIntf;

type
  TCondition = class(TCodeElement)
  private
    FElseElements: TObjectList<TCodeElement>;
    FRelation: TObjectList<TCodeElement>;
  public
    constructor Create();
    destructor Destroy(); override;
    procedure GetDCPUSource(AWriter: IWriter); override;
    property ElseElements: TObjectList<TCodeElement> read FElseElements;
    property Relation: TObjectList<TCodeElement> read FRelation;
  end;

implementation

uses
  Optimizer;

{ TCondition }

constructor TCondition.Create;
begin
  inherited Create('');
  FElseElements := TObjectList<TCodeElement>.Create();
  FRelation := TObjectList<TCodeElement>.Create();
end;

destructor TCondition.Destroy;
begin
  FElseElements.Free;
  FRelation.Free;
  inherited;
end;

procedure TCondition.GetDCPUSource;
var
  LID, LEnd, LElse: string;
  LElement: TCodeElement;
begin
  AWriter.AddMapping(Self);
  LID := GetUniqueID();
  LEnd := 'End' + LID;
  LElse := 'Else' +  LID;
  FRelation.Items[0].GetDCPUSource(Self);
  Self.Write('set x, pop');
  Self.Write('ife x, 0');
  OptimizeDCPUCode(Self.FSource, Self.FSource);
  AWriter.WriteList(Self.FSource);
  if FElseElements.Count > 0 then
  begin
    AWriter.Write('set pc, ' + LElse);
  end
  else
  begin
    AWriter.Write('set pc, ' + LEnd);
  end;
  inherited;
  if FElseElements.Count > 0 then
  begin
    AWriter.Write('set pc, ' + LEnd);
    AWriter.Write(':' + LElse);
    for LElement in FElseElements do
    begin
      LElement.GetDCPUSource(AWriter);
    end;
  end;
  AWriter.Write(':' + LEnd);
end;

end.