From 5ae1994b2d042861775712b11663868d7ab67d61 Mon Sep 17 00:00:00 2001 From: RichardTony14 Date: Tue, 29 Jul 2025 14:41:15 +0530 Subject: [PATCH 1/4] Added cc2745 build related CMakeFiles --- app/config/app_config.cmake | 6 +- app/linker_files/lpf3_freertos.cmd | 158 ++++++++++++ asdk_core/build.py | 33 ++- asdk_core/cmake/asdk_app_recipe.cmake | 23 +- .../cmake/devel_tiarmclang_toolchain.cmake | 33 +++ build.py | 32 ++- platform/CMakeLists.txt | 2 + platform/TI/cc2745/CMakeLists.txt | 194 ++++++++++++++ platform/TI/cc2745/FindFlags.cmake | 52 ++++ .../cc2745/sdk_config_files/FreeRTOSConfig.h | 236 ++++++++++++++++++ .../cc2745/sdk_config_files/syscfg_c.rov.xs | 42 ++++ .../sdk_config_files/ti_devices_config.c | 152 +++++++++++ .../sdk_config_files/ti_freertos_config.c | 195 +++++++++++++++ .../ti_freertos_portable_config.c | 15 ++ .../ti_secure_boot_properties.h | 14 ++ .../ti_secure_boot_properties.json | 10 + .../ti_utils_build_linker.cmd.genmap | 35 +++ platform/platform.cmake | 2 + 18 files changed, 1207 insertions(+), 27 deletions(-) create mode 100644 app/linker_files/lpf3_freertos.cmd create mode 100644 asdk_core/cmake/devel_tiarmclang_toolchain.cmake create mode 100644 platform/TI/cc2745/CMakeLists.txt create mode 100644 platform/TI/cc2745/FindFlags.cmake create mode 100644 platform/TI/cc2745/sdk_config_files/FreeRTOSConfig.h create mode 100644 platform/TI/cc2745/sdk_config_files/syscfg_c.rov.xs create mode 100644 platform/TI/cc2745/sdk_config_files/ti_devices_config.c create mode 100644 platform/TI/cc2745/sdk_config_files/ti_freertos_config.c create mode 100644 platform/TI/cc2745/sdk_config_files/ti_freertos_portable_config.c create mode 100644 platform/TI/cc2745/sdk_config_files/ti_secure_boot_properties.h create mode 100644 platform/TI/cc2745/sdk_config_files/ti_secure_boot_properties.json create mode 100644 platform/TI/cc2745/sdk_config_files/ti_utils_build_linker.cmd.genmap diff --git a/app/config/app_config.cmake b/app/config/app_config.cmake index 534a35d..fdefc83 100644 --- a/app/config/app_config.cmake +++ b/app/config/app_config.cmake @@ -18,10 +18,14 @@ IF(${TARGET_PLATFORM} STREQUAL "CYT2B75_M0PLUS") SET(APP_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/app/linker_files/cyt2b75_cm0plus.ld ) -ELSE() +ELSEIF(${TARGET_PLATFORM} STREQUAL "CYT2B75_M4") SET(APP_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/app/linker_files/cyt2b75_cm4.ld ) +ELSEIF(${TARGET_PLATFORM} STREQUAL "CC2745") + SET(APP_LINKER_FILE + ${CMAKE_CURRENT_SOURCE_DIR}/app/linker_files/lpf3_freertos.cmd + ) ENDIF() ### add source files and include paths diff --git a/app/linker_files/lpf3_freertos.cmd b/app/linker_files/lpf3_freertos.cmd new file mode 100644 index 0000000..e1c0095 --- /dev/null +++ b/app/linker_files/lpf3_freertos.cmd @@ -0,0 +1,158 @@ +/* + * Copyright (c) 2021-2025, Texas Instruments Incorporated + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "ti_utils_build_linker.cmd.genmap" + +--stack_size=2048 +--heap_size=0 +--entry_point resetISR + +/* Retain interrupt vector table variable */ +--retain "*(.resetVecs)" + +/* Suppress warnings and errors: */ +/* - 10063: Warning about entry point not being _c_int00 */ +/* - 16011, 16012: 8-byte alignment errors. Observed when linking in object */ +/* files compiled using Keil (ARM compiler) */ +--diag_suppress=10063,16011,16012 + +/* Set severity of diagnostics to Remark instead of Warning */ +/* - 10068: Warning about no matching log_ptr* sections */ +--diag_remark=10068 + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define FLASH_BASE ti_utils_build_GenMap_FLASH0_BASE +#if (defined(ti_utils_build_GenMap_HSM_FW_BASE) && (ti_utils_build_GenMap_HSM_FW_BASE < ti_utils_build_GenMap_FLASH0_BASE + ti_utils_build_GenMap_FLASH0_SIZE)) +/* The last part of Flash is reserved for the HSM FW, if it overlaps. + * Otherwise Flash size stays the same. + */ +#define FLASH_SIZE (ti_utils_build_GenMap_HSM_FW_BASE - ti_utils_build_GenMap_FLASH0_BASE) +#else +#define FLASH_SIZE ti_utils_build_GenMap_FLASH0_SIZE +#endif +#define RAM_BASE ti_utils_build_GenMap_RAM0_BASE +#define RAM_SIZE ti_utils_build_GenMap_RAM0_SIZE +#if defined(ti_utils_build_GenMap_S2RRAM_BASE) && \ + defined(ti_utils_build_GenMap_S2RRAM_SIZE) +#define S2RRAM_BASE ti_utils_build_GenMap_S2RRAM_BASE +#define S2RRAM_SIZE ti_utils_build_GenMap_S2RRAM_SIZE +#endif +#define CCFG_BASE ti_utils_build_GenMap_CCFG_BASE +#define CCFG_SIZE ti_utils_build_GenMap_CCFG_SIZE +#if defined(ti_utils_build_GenMap_SCFG_BASE) && \ + defined(ti_utils_build_GenMap_SCFG_SIZE) +#define SCFG_BASE ti_utils_build_GenMap_SCFG_BASE +#define SCFG_SIZE ti_utils_build_GenMap_SCFG_SIZE +#endif + +/* System memory map */ +MEMORY +{ + /* Application stored in and executes from internal flash */ +#if defined(ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE) + FLASH (RX) : origin = ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE, length = ti_utils_build_GenMap_SECURE_BOOT_FLASH_SIZE +#else + FLASH (RX) : origin = FLASH_BASE, length = FLASH_SIZE +#endif + + /* Application uses internal RAM for data */ +#if defined(ti_utils_build_GenMap_SECURE_BOOT_RAM_BASE) + SRAM (RWX) : origin = ti_utils_build_GenMap_SECURE_BOOT_RAM_BASE, length = ti_utils_build_GenMap_SECURE_BOOT_RAM_SIZE +#else + SRAM (RWX) : origin = RAM_BASE, length = RAM_SIZE +#endif + +#if defined(S2RRAM_BASE) && defined(S2RRAM_SIZE) + /* S2RRAM is intended for the S2R radio module, but it can also be used by + * the application with some limitations. Please refer to the s2rram example. + */ + S2RRAM (RW) : origin = S2RRAM_BASE, length = S2RRAM_SIZE +#endif + + /* Configuration region */ + CCFG (R) : origin = CCFG_BASE, length = CCFG_SIZE + +#if defined(SCFG_BASE) && defined(SCFG_SIZE) + /* Security configuration region */ + SCFG (R): origin = SCFG_BASE, length = SCFG_SIZE +#endif + + /* Explicitly placed off target for the storage of logging data. + * The ARM memory map allocates 1 GB of external memory from 0x60000000 - 0x9FFFFFFF. + * Unlikely that all of this will be used, so we are using the upper parts of the region. + * ARM memory map: https://developer.arm.com/documentation/ddi0337/e/memory-map/about-the-memory-map*/ + LOG_DATA (R) : origin = 0x90000000, length = 0x40000 /* 256 KB */ + LOG_PTR (R) : origin = 0x94000008, length = 0x40000 /* 256 KB */ +} + +/* Section allocation in memory */ +SECTIONS +{ +#if defined(ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE) + .resetVecs : > ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE +#else + .resetVecs : > FLASH_BASE +#endif + .text : > FLASH + .TI.ramfunc : {} load=FLASH, run=SRAM, table(BINIT) + .const : > FLASH + .constdata : > FLASH + .rodata : > FLASH + .binit : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + .emb_text : > FLASH + .ccfg : > CCFG + +#if defined(SCFG_BASE) && defined(SCFG_SIZE) + .scfg : > SCFG +#endif + + .ramVecs : > SRAM, type = NOLOAD, ALIGN(256) + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM (HIGH) + .nonretenvar : > SRAM + +#if defined(S2RRAM_BASE) && defined(S2RRAM_SIZE) + /* Placing the section .s2rram in S2RRAM region. Only uninitialized + * objects may be placed in this section. + */ + .s2rram : > S2RRAM, type = NOINIT +#endif + + .log_data : > LOG_DATA, type = COPY + .log_ptr : { *(.log_ptr*) } > LOG_PTR align 4, type = COPY +} diff --git a/asdk_core/build.py b/asdk_core/build.py index 079c71b..31895b4 100644 --- a/asdk_core/build.py +++ b/asdk_core/build.py @@ -23,6 +23,8 @@ g_current_src_path, "asdk_core", "setup", "setup.py") g_arm_toolchain_dir = os.path.join( g_current_src_path, "cmake", "devel_arm_eabi_toolchain.cmake") +g_tiarmclang_toolchain_dir = os.path.join( + g_current_src_path, "asdk_core", "cmake", "devel_tiarmclang_toolchain.cmake") g_rtos = "uCOS3" g_build_choices = ["release", "debug"] @@ -38,6 +40,7 @@ "cyt2b75_m0plus", "cyt2b75_m4", "c2000" + "cc2745" ] # build command templates @@ -158,16 +161,26 @@ def _clean(): def _generate_build_cmd(): build_cmd = " ".join(each for each in g_cmake_args) - - build_cmd = build_cmd.format( - g_cmake, - g_users_build_dir, - g_ninja, - g_arm_toolchain_dir, - g_parsed_args.platform.upper(), - g_parsed_args.type.upper(), - g_rtos.upper() - ) + if(g_parsed_args.platform == "cc2745"): + build_cmd = build_cmd.format( + g_cmake, + g_users_build_dir, + g_ninja, + g_tiarmclang_toolchain_dir, + g_parsed_args.platform.upper(), + g_parsed_args.type.upper(), + g_rtos.upper() + ) + else: + build_cmd = build_cmd.format( + g_cmake, + g_users_build_dir, + g_ninja, + g_arm_toolchain_dir, + g_parsed_args.platform.upper(), + g_parsed_args.type.upper(), + g_rtos.upper() + ) return build_cmd diff --git a/asdk_core/cmake/asdk_app_recipe.cmake b/asdk_core/cmake/asdk_app_recipe.cmake index 3c8f275..783ff0d 100644 --- a/asdk_core/cmake/asdk_app_recipe.cmake +++ b/asdk_core/cmake/asdk_app_recipe.cmake @@ -85,17 +85,26 @@ function(ASDK_COMPILE_APPLICATION) asdk ) + + ### run CRC verification tool + ADD_CUSTOM_COMMAND( + TARGET ${ARG_APP_ELF} POST_BUILD + COMMAND ${USER_ROOT_DIR}/platform/TI/cc2745/sdk/tools/common/crc_tool/crc_tool patch-image --elf $ --symbol-prefix ti_utils_build_GenMap_sym_CRC --output $ + COMMENT "Running CRC Tool" + VERBATIM + ) + ### generate srec and hex files # srec generation - add_custom_command( - TARGET ${ARG_APP_ELF} - POST_BUILD - COMMAND ${CMAKE_COMPILER_PATH}objcopy - ARGS -O srec ${CMAKE_BINARY_DIR}/${ARG_APP_ELF} ${CMAKE_BINARY_DIR}/${APP_ELF_NAME}.srec - BYPRODUCTS ${CMAKE_BINARY_DIR}/${${ARG_APP_ELF}}.srec - ) + # add_custom_command( + # TARGET ${ARG_APP_ELF} + # POST_BUILD + # COMMAND ${CMAKE_COMPILER_PATH}objcopy + # ARGS -O srec ${CMAKE_BINARY_DIR}/${ARG_APP_ELF} ${CMAKE_BINARY_DIR}/${APP_ELF_NAME}.srec + # BYPRODUCTS ${CMAKE_BINARY_DIR}/${${ARG_APP_ELF}}.srec + # ) # hex file generation diff --git a/asdk_core/cmake/devel_tiarmclang_toolchain.cmake b/asdk_core/cmake/devel_tiarmclang_toolchain.cmake new file mode 100644 index 0000000..cc7b5f3 --- /dev/null +++ b/asdk_core/cmake/devel_tiarmclang_toolchain.cmake @@ -0,0 +1,33 @@ +SET(ASDK_TIARMCLANG_TOOLCHAIN_BIN $ENV{ASDK_TIARMCLANG_TOOLCHAIN_ROOT}/$ENV{ASDK_TIARMCLANG_TOOLCHAIN_VERSION}/bin) + +IF(WIN32) + string(REPLACE "\\" "/" ASDK_TIARMCLANG_TOOLCHAIN_BIN ${ASDK_TIARMCLANG_TOOLCHAIN_BIN}) +ENDIF() + +SET(TIARMCLANG_CROSS_COMPILER tiarm) +SET(CMAKE_COMPILER_PATH ${ASDK_TIARMCLANG_TOOLCHAIN_BIN}/${TIARMCLANG_CROSS_COMPILER}) +SET(CMAKE_C_COMPILER ${ASDK_TIARMCLANG_TOOLCHAIN_BIN}/${TIARMCLANG_CROSS_COMPILER}clang) +SET(CMAKE_CXX_COMPILER ${ASDK_TIARMCLANG_TOOLCHAIN_BIN}/${TIARMCLANG_CROSS_COMPILER}clang) + +SET(CMAKE_C_COMPILER_WORKS true) +SET(CMAKE_CXX_COMPILER_WORKS true) + +IF(WIN32) + SET(CMAKE_C_COMPILER ${CMAKE_C_COMPILER}.exe) + SET(CMAKE_CXX_COMPILER ${CMAKE_CXX_COMPILER}.exe) +ENDIF() + +# where is the target environment +SET(CMAKE_FIND_ROOT_PATH ${ASDK_TIARMCLANG_TOOLCHAIN_BIN}) + +#set(CMAKE_EXE_LINKER_FLAGS "-specs=nano.specs --specs=nosys.specs --sysroot=/opt/gcc-arm-none-eabi/gcc-arm-none-eabi-7-2018-q2-update/arm-none-eabi" CACHE INTERNAL "") +set(CMAKE_EXE_LINKER_FLAGS " --specs=nosys.specs " CACHE INTERNAL "") +SET(CMAKE_VERBOSE_MAKEFILE TRUE) +set(CMAKE_VERBOSE_MAKEFILE ON) +# search for programs in the build host directories +SET(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER) +# for libraries and headers in the target directories +SET(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY) +SET(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY) +# Adding the CPU Architecture definition macro, this can be used to place platform specific actions +add_compile_definitions(MCU_ARCH_ARM) \ No newline at end of file diff --git a/build.py b/build.py index db162a7..9d912fc 100644 --- a/build.py +++ b/build.py @@ -45,6 +45,8 @@ def _split_lines(self, text, width): g_current_src_path, "asdk_core", "setup", "setup.py") g_arm_toolchain_dir = os.path.join( g_current_src_path, "asdk_core", "cmake", "devel_arm_eabi_toolchain.cmake") +g_tiarmclang_toolchain_dir = os.path.join( + g_current_src_path, "asdk_core", "cmake", "devel_tiarmclang_toolchain.cmake") g_build_choices = ["release", "debug"] g_rtos = "uCOS3" # default variables, gets overriden later @@ -58,6 +60,7 @@ def _split_lines(self, text, width): g_mcu_choices = [ "cyt2b75_m0plus", "cyt2b75_m4", + "cc2745" ] g_preset_choices = [ @@ -206,15 +209,26 @@ def _generate_build_cmd(): optional_args = [] build_cmd = " ".join(each for each in g_cmake_args) - build_cmd = build_cmd.format( - g_cmake, - g_users_build_dir, - g_ninja, - g_arm_toolchain_dir, - g_parsed_args.platform.upper(), - g_parsed_args.type.upper(), - g_rtos.upper() - ) + if(g_parsed_args.platform == "cc2745"): + build_cmd = build_cmd.format( + g_cmake, + g_users_build_dir, + g_ninja, + g_tiarmclang_toolchain_dir, + g_parsed_args.platform.upper(), + g_parsed_args.type.upper(), + g_rtos.upper() + ) + else: + build_cmd = build_cmd.format( + g_cmake, + g_users_build_dir, + g_ninja, + g_arm_toolchain_dir, + g_parsed_args.platform.upper(), + g_parsed_args.type.upper(), + g_rtos.upper() + ) if g_parsed_args.example: optional_args.append( diff --git a/platform/CMakeLists.txt b/platform/CMakeLists.txt index 951011a..d2c099b 100644 --- a/platform/CMakeLists.txt +++ b/platform/CMakeLists.txt @@ -1,3 +1,5 @@ IF( (${TARGET_PLATFORM} STREQUAL "CYT2B75_M0PLUS") OR (${TARGET_PLATFORM} STREQUAL "CYT2B75_M4") ) ADD_SUBDIRECTORY("Infineon/cyt2b75") +ELSEIF( ${TARGET_PLATFORM} STREQUAL "CC2745" ) + ADD_SUBDIRECTORY("TI/cc2745") ENDIF() diff --git a/platform/TI/cc2745/CMakeLists.txt b/platform/TI/cc2745/CMakeLists.txt new file mode 100644 index 0000000..2885b40 --- /dev/null +++ b/platform/TI/cc2745/CMakeLists.txt @@ -0,0 +1,194 @@ +MESSAGE("\nPlatform: CC2745\n") + +ENABLE_LANGUAGE(C ASM) + +##### Top level includes + +INCLUDE(${CMAKE_CURRENT_SOURCE_DIR}/FindFlags.cmake) + +##### create interface for SDK include paths compile options & definitions + +## SDK includes + +SET(SDK_INC "") + +## add necessary SDK files +LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/generated_files) +LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/freertos) +LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source) +LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/third_party/freertos/include) +LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/third_party/freertos/portable/GCC/ARM_CM33_NTZ/non_secure) +LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/posix/ticlang) +LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/devices) +LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk) + +SET(DRV_SRC "") +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/apps/Button.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/apps/LED.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/utils/List.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/utils/Math.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/utils/RingBuf.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/utils/StructRingBuf.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/ADC.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/adc/ADCLPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/ADCBuf.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/adcbuf/ADCBufLPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/apu/APULPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/batterymonitor/BatteryMonitorLPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/batterymonitor/BatMonSupportLPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/CAN.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/can/CANCC27XX.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/can/common/CANMCAN.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/third_party/mcan/MCAN.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/Comparator.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/comparator/ComparatorLPF3LP.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/dma/UDMALPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/GPIO.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/gpio/GPIOLPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/I2C.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/i2c/I2CLPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/I2CTarget.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/i2ctarget/I2CTargetLPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/I2S.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/i2s/I2SLPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/ITM.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/itm/ITMLPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/NVS.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/nvs/NVSRAM.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/nvs/NVSSPI25X.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/PWM.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/pwm/PWMTimerLPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/SD.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/sd/SDSPI.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/SDFatFS.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/SPI.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/spi/SPILPF3DMA.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/Temperature.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/temperature/TemperatureLPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/timer/LGPTimerLPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/UART2.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/uart2/UART2LPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/Watchdog.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/watchdog/WatchdogLPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/nvs/NVSLPF3.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/power/PowerCC27XX.c) +LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/power/PowerCC27XX_lfoscCompensation.c) + +FILE(GLOB_RECURSE GEN_SRC ${CMAKE_CURRENT_SOURCE_DIR}/generated_files/*.c) +FILE(GLOB_RECURSE DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/devices/cc27xx/driverlib/*.c) +MESSAGE("DEV SRC Before\n" ${DEV_SRC}) +LIST(FILTER DEV_SRC EXCLUDE REGEX ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/devices/cc27xx/driverlib/.*_veneers.c) + +MESSAGE("DEV SRC After\n" ${DEV_SRC}) + +LIST(APPEND SRC_LIST + ${GEN_SRC} + ${DEV_SRC} + ${DRV_SRC} +) + +## create interface to share include files & compiler options with DAL + +ADD_LIBRARY( + cc2745_sdk_interface + INTERFACE +) + +target_compile_definitions( + cc2745_sdk_interface + INTERFACE + ${CC2745_DEFS} +) + +target_compile_options( + cc2745_sdk_interface + INTERFACE + $<$:${CC2745_C_COMPILER_OPTIONS}> +) + +#### Compile: platform = cyt2b75_sdk.a + cyt2b75_dal.a + +### Compile SDK as static library + +### compile SDK + +ADD_LIBRARY(cc2745_sdk INTERFACE) + +TARGET_INCLUDE_DIRECTORIES( + cc2745_sdk + INTERFACE # hidden from application + ${SDK_INC} +) + +TARGET_SOURCES( + cc2745_sdk + INTERFACE + ${SRC_LIST} +) + +TARGET_LINK_LIBRARIES( + cc2745_sdk + INTERFACE # hidden from application + cc2745_sdk_interface # use platform compile options + # -lti_utils_build_linker.cmd.genlibs + -llibc.a) + +### Compile DAL + +SET( + DAL_INC + ${CMAKE_CURRENT_SOURCE_DIR}/dal/inc + ${CMAKE_CURRENT_SOURCE_DIR}/../../inc +) + +AUX_SOURCE_DIRECTORY(${CMAKE_CURRENT_SOURCE_DIR}/dal/src DAL_SRC) + +ADD_LIBRARY(cc2745_dal INTERFACE) + +ADD_DEPENDENCIES(cc2745_dal cc2745_sdk) + +TARGET_INCLUDE_DIRECTORIES( + cc2745_dal + INTERFACE # hidden from application + ${DAL_INC} + ${SDK_INC} + ${ASDK_CORE_INC} +) + +TARGET_SOURCES( + cc2745_dal + INTERFACE + ${DAL_SRC} +) + +TARGET_LINK_LIBRARIES( + cc2745_dal + INTERFACE # hidden from application + cc2745_sdk_interface # use platform compile options + cc2745_sdk +) + +### Create platform + +ADD_LIBRARY(platform INTERFACE) + +TARGET_INCLUDE_DIRECTORIES( + platform + INTERFACE # share with application + ${DAL_INC} + ${SDK_INC} +) + +TARGET_LINK_OPTIONS( + platform + INTERFACE # share with application + ${CC2745_APP_LINK_FLAGS} +) + +TARGET_LINK_LIBRARIES( + platform + INTERFACE + cc2745_dal + cc2745_sdk + cc2745_sdk_interface # use platform compile options +) diff --git a/platform/TI/cc2745/FindFlags.cmake b/platform/TI/cc2745/FindFlags.cmake new file mode 100644 index 0000000..bb340d7 --- /dev/null +++ b/platform/TI/cc2745/FindFlags.cmake @@ -0,0 +1,52 @@ +##### TARGET core + +SET(CC2745_CORE m33) + +MESSAGE("CC2745_CORE: ${CC2745_CORE}") + +##### CC2745 specific definitions + +SET(CC2745_DEFS + -DDeviceFamily_CC27XX +) + +##### define compiler flags + +set(CC2745_C_COMPILER_OPTIONS + ${ASDK_COMMON_COMPILER_FLAGS} + -Wall + -mcpu=cortex-${CC2745_CORE} + -mfloat-abi=hard + -mfpu=fpv5-sp-d16 + -mlittle-endian + -MP + -MF + -MT + -c + # -v +) + +set(CC2745_LINKER_OPTIONS + ${ASDK_COMMON_COMPILER_FLAGS} + -mcpu=cortex-m33 + -mfloat-abi=hard + -mfpu=fpv5-sp-d16 + -mlittle-endian + # -v +) + +##### define linker flags + +set(CC2745_APP_LINK_FLAGS + ${CC2745_LINKER_OPTIONS} + -Wl,-m=${APP_ELF_NAME}.map + -Wl,-I${CMAKE_CURRENT_SOURCE_DIR}/sdk/source + -Wl,-I${CMAKE_CURRENT_SOURCE_DIR}/generated_files + -Wl,-I$ENV{ASDK_TIARMCLANG_TOOLCHAIN_ROOT}/$ENV{ASDK_TIARMCLANG_TOOLCHAIN_VERSION}/lib + -Wl,--diag_wrap=off + -Wl,--display_error_number + -Wl,--warn_sections + -Wl,--xml_link_info="${ARG_APP_ELF}_linkInfo.xml" + -Wl,--rom_model + ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/boards/lpf3/lpf3_freertos.cmd +) diff --git a/platform/TI/cc2745/sdk_config_files/FreeRTOSConfig.h b/platform/TI/cc2745/sdk_config_files/FreeRTOSConfig.h new file mode 100644 index 0000000..103177c --- /dev/null +++ b/platform/TI/cc2745/sdk_config_files/FreeRTOSConfig.h @@ -0,0 +1,236 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. If you wish to use our + * Amazon FreeRTOS name, please do so in a fair use way that does not cause + * confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/****************************************************************************** + See http://www.freertos.org/a00110.html for an explanation of the + definitions contained in this file. +******************************************************************************/ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * http://www.freertos.org/a00110.html + *----------------------------------------------------------*/ + + +/* These values are generated by SysConfig */ + +/* General options */ +#define configCPU_CLOCK_HZ ((unsigned long)(96000000)) +#define configTOTAL_HEAP_SIZE ((size_t)(0x8000)) +#define configAPPLICATION_ALLOCATED_HEAP 0 +#define configCHECK_FOR_STACK_OVERFLOW 2 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +#define configEXPECTED_IDLE_TIME_BEFORE_SLEEP 2 + +/* Stack sizes, all in words */ +#define configMINIMAL_STACK_SIZE ((unsigned short)(128)) +#define configIDLE_TASK_STACK_DEPTH ((unsigned short)(128)) +#define configPOSIX_STACK_SIZE ((unsigned short)(256)) + +/* Software timer definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY (5) +#define configTIMER_QUEUE_LENGTH (20) +#define configTIMER_TASK_STACK_DEPTH ((unsigned short)(128)) + +/* TrustZone/PSA settings */ +/* We do not set ENABLE_TRUSTZONE, as this is only for Secure Side function call support */ +#define configENABLE_TRUSTZONE 0 +#define configRUN_FREERTOS_SECURE_ONLY 1 + +/* + * The ISR stack will be initialized in the startup__.c file + * to 0xa5a5a5a5. The stack peak can then be displayed in Runtime Object View. + */ +#define configENABLE_ISR_STACK_INIT 1 +/* + * Kernel Object Tracking disabled. Enable Kernel Object Tracking in SysConfig + * (FreeRTOS.rovQueueEnabled = true) to use the queue registry and/or ROV + * features. + */ +#define configQUEUE_REGISTRY_SIZE 0 + + +/* Floating point unit enabled or disabled */ +#define configENABLE_FPU 1 + +/* Idle hook function enabled or disabled */ +#define configUSE_IDLE_HOOK 0 + +/* Modifying the options below is not permitted or currently unsupported */ + +/* MPU is disabled */ +#define configENABLE_MPU 0 + +/* The CM33 port requires an additional stack size definition */ +#define configMINIMAL_SECURE_STACK_SIZE configMINIMAL_STACK_SIZE + +/* Constants related to the behaviour or the scheduler. */ +#define configTICK_RATE_HZ (1000UL) +#define configUSE_PREEMPTION 1 +#define configUSE_TIME_SLICING 0 +#define configMAX_PRIORITIES (10UL) +#define configIDLE_SHOULD_YIELD 0 +#define configUSE_16_BIT_TICKS 0 /* Only for 8 and 16-bit hardware. */ + +/* Constants that describe the hardware and memory usage. */ +#define configMAX_TASK_NAME_LEN (12) +#define configRECORD_STACK_HIGH_ADDRESS 1 + +/* Required by TI driver implementations */ +#define configSUPPORT_STATIC_ALLOCATION 1 + +/* Constants that build features in or out. */ +#define configUSE_MUTEXES 1 +#define configUSE_TICKLESS_IDLE 1 +#define configUSE_APPLICATION_TASK_TAG 1 /* Needed by POSIX/pthread */ +#define configUSE_CO_ROUTINES 0 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_QUEUE_SETS 0 +#define configUSE_TASK_NOTIFICATIONS 1 + +/* Constants that define which hook (callback) functions should be used. */ +#define configUSE_TICK_HOOK 0 +#define configUSE_MALLOC_FAILED_HOOK 0 + +/* Constants provided for debugging and optimisation assistance. */ +#define configENABLE_BACKWARD_COMPATIBILITY 0 + +#if defined(__TI_COMPILER_VERSION__) || defined(__ti_version__) +#include +#define traceTASK_DELETE(pxTCB) PTLS_taskDeleteHook(pxTCB) +#elif defined(__IAR_SYSTEMS_ICC__) +#ifndef __IAR_SYSTEMS_ASM__ +#include +#define traceTASK_DELETE(pxTCB) Mtx_taskDeleteHook(pxTCB) +#endif +#endif + +/* + * Enable thread local storage + * + * Assign TLS array index ownership here to avoid collisions. + * TLS storage is needed to implement thread-safe errno with + * TI and IAR compilers. With GNU compiler, we enable newlib. + */ +#if defined(__TI_COMPILER_VERSION__) || defined(__ti_version__) || defined(__IAR_SYSTEMS_ICC__) + +#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 1 + +#if defined(__TI_COMPILER_VERSION__) || defined(__ti_version__) +#define PTLS_TLS_INDEX 0 /* ti.posix.freertos.PTLS */ +#elif defined(__IAR_SYSTEMS_ICC__) +#define MTX_TLS_INDEX 0 /* ti.posix.freertos.Mtx */ +#endif + +#elif defined(__GNUC__) + +#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 0 + +/* note: system locks required by newlib are not implemented */ +#define configUSE_NEWLIB_REENTRANT 1 +#endif + +/* + * Set the following definitions to 1 to include the API function, or zero + * to exclude the API function. NOTE: Setting an INCLUDE_ parameter to 0 is + * only necessary if the linker does not automatically remove functions that + * are not referenced anyway. + */ +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 0 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 0 +#define INCLUDE_xTaskGetIdleTaskHandle 0 +#define INCLUDE_eTaskGetState 1 +#define INCLUDE_xTaskResumeFromISR 0 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_xTaskGetSchedulerState 1 +#define INCLUDE_xSemaphoreGetMutexHolder 0 +#define INCLUDE_xTimerPendFunctionCall 1 + +/* Cortex-M3/4 interrupt priority configuration follows...................... */ + +/* Use the system definition. + * The number of priority bits is reduced by one for TFM-enabled configurations. + */ +#define configPRIO_BITS 4 + +/* + * The lowest interrupt priority that can be used in a call to a "set priority" + * function. + */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15 + +/* + * The highest interrupt priority that can be used by any interrupt service + * routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT + * CALL INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A + * HIGHER PRIORITY THAN THIS! (higher priorities are lower numeric values. + */ +#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 1 + +/* + * Interrupt priorities used by the kernel port layer itself. These are generic + * to all Cortex-M ports, and do not rely on any particular library functions. + */ +#define configKERNEL_INTERRUPT_PRIORITY (configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) + +/* + * !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! + * See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. + * + * The priority is shifted since NVIC priority bits are placed MSB. + * Priority 0 is the highest priority. + * Priority 1 is the second highest priority, etc. + */ +#define configMAX_SYSCALL_INTERRUPT_PRIORITY (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) + +/* + * The trace facility is turned on to make some functions available for use in + * CLI commands. + */ +#define configUSE_TRACE_FACILITY 1 + +#endif /* FREERTOS_CONFIG_H */ diff --git a/platform/TI/cc2745/sdk_config_files/syscfg_c.rov.xs b/platform/TI/cc2745/sdk_config_files/syscfg_c.rov.xs new file mode 100644 index 0000000..1edda73 --- /dev/null +++ b/platform/TI/cc2745/sdk_config_files/syscfg_c.rov.xs @@ -0,0 +1,42 @@ +/* + * ======== syscfg_c.rov.xs ======== + * This file contains the information needed by the Runtime Object + * View (ROV) tool. + * + * Specifically, this file names the C-ROV implementation files declared + * by the modules that are part of the app's configuration. In the + * future this file will also contain a serialization of corresponding + * module configuration parameters which can be used by the ROV provided + * views. + * + * DO NOT EDIT - This file is generated by the SysConfig tool. + */ +var crovFiles = [ + "kernel/freertos/rov/heap.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov/helper.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov/mutex.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov/queue.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov/semaphore.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov/stack.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov/task.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov/timer.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov/clock.rov.js", /* /freertos/dpl/Settings ROV support */ + "kernel/freertos/rov/exception.rov.js", /* /freertos/dpl/Settings ROV support */ + "kernel/freertos/rov/hwi.rov.js", /* /freertos/dpl/Settings ROV support */ + "kernel/freertos/rov/nvic.rov.js", /* /freertos/dpl/Settings ROV support */ +]; + +var objectViewerFiles = [ + "kernel/freertos/rov_theia/heap.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov_theia/helper.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov_theia/mutex.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov_theia/queue.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov_theia/semaphore.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov_theia/stack.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov_theia/task.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov_theia/timer.rov.js", /* /freertos/FreeRTOS ROV support */ + "kernel/freertos/rov_theia/clock.rov.js", /* /freertos/dpl/Settings ROV support */ + "kernel/freertos/rov_theia/exception.rov.js", /* /freertos/dpl/Settings ROV support */ + "kernel/freertos/rov_theia/hwi.rov.js", /* /freertos/dpl/Settings ROV support */ + "kernel/freertos/rov_theia/nvic.rov.js", /* /freertos/dpl/Settings ROV support */ +]; diff --git a/platform/TI/cc2745/sdk_config_files/ti_devices_config.c b/platform/TI/cc2745/sdk_config_files/ti_devices_config.c new file mode 100644 index 0000000..9aac75e --- /dev/null +++ b/platform/TI/cc2745/sdk_config_files/ti_devices_config.c @@ -0,0 +1,152 @@ +/* + * ======== ti_devices_config.c ======== + * Customer Configuration for CC27XX devices. + * + * DO NOT EDIT - This file is generated by the SysConfig tool. + * + */ + + +#include +#include DeviceFamily_constructPath(inc/hw_ccfg.h) +#include DeviceFamily_constructPath(inc/hw_scfg.h) + +#define SCFG_INVALID_KEY_ENTRY \ + .type = 0, .keyHash = {0}, .crc32 = 0, .status = 0, + +extern void (*const resetVectors[])(void); + +#if defined(__IAR_SYSTEMS_ICC__) +__root const ccfg_t ccfg @ ".ccfg" = +#elif defined(__TI_COMPILER_VERSION__) +#pragma DATA_SECTION(ccfg, ".ccfg") +#pragma RETAIN(ccfg) +const ccfg_t ccfg = +#elif defined(__llvm__) +const ccfg_t ccfg __attribute__((section(".ccfg"), retain)) = +#else +const ccfg_t ccfg __attribute__((section(".ccfg"), used)) = +#endif +{ + .bootCfg.pBldrVtor = CCFG_BC_PBLDR_USE_FCFG, + + .bootCfg.bldrParam.serialRomBldrParamStruct.bldrEnabled = XCFG_BC_BLDR_DIS, + .bootCfg.bldrParam.serialRomBldrParamStruct.serialIoCfgIndex = 0, + .bootCfg.bldrParam.serialRomBldrParamStruct.pinTriggerDio = 0, + .bootCfg.bldrParam.serialRomBldrParamStruct.pinTriggerEnabled = XCFG_BC_PINTRIG_DIS, + .bootCfg.bldrParam.serialRomBldrParamStruct.pinTriggerLevel = XCFG_BC_PINTRIG_LEVEL_LO, + .bootCfg.pAppVtor = (void*)&resetVectors, + + /* Set to 0. This checksum must be calculated and updated prior to + * programming the application to the device (this is normally handled as a + * post-build step, or by the flashloader). + */ + .bootCfg.crc32 = 0x00000000, + .hwOpts = {0xFFFFFFFF, 0xFFFFFFFF}, + + .permissions.allowDebugPort = CCFG_PERMISSION_ALLOW, + .permissions.allowEnergyTrace = CCFG_PERMISSION_ALLOW, + .permissions.allowFlashVerify = CCFG_PERMISSION_ALLOW, + .permissions.allowFlashProgram = CCFG_PERMISSION_ALLOW, + .permissions.allowChipErase = CCFG_PERMISSION_ALLOW, + .permissions.allowToolsClientMode = CCFG_PERMISSION_ALLOW, + .permissions.allowFakeStby = CCFG_PERMISSION_ALLOW, + .permissions.allowReturnToFactory = CCFG_PERMISSION_ALLOW, + + .misc.saciTimeoutOverride = 0U, + + .misc.allowMainAppErase = CCFG_PERMISSION_ALLOW, + + .flashProt.writeEraseProt.mainSectors0_31 = 0xffffffff, + .flashProt.writeEraseProt.mainSectors32_255 = 0xffffffff, + .flashProt.writeEraseProt.mainSectors256_511 = 0xffffffff, + + .flashProt.writeEraseProt.ccfgSector = 0, + .flashProt.writeEraseProt.fcfgSector = 0, + .flashProt.writeEraseProt.engrSector = 0, + .flashProt.writeEraseProt.scfgSector = 0, + .flashProt.writeEraseProt.vlogSector = 0, + + .flashProt.readProt.mainSectors = 0xf, + .flashProt.readProt.ccfgSector = 0x3f, + + .flashProt.chipEraseRetain.mainSectors0_31 = 0x0, + .flashProt.chipEraseRetain.mainSectors32_255 = 0x0, + .flashProt.chipEraseRetain.mainSectors256_511 = 0xfc000000, + + /* Set to 0. This checksum (across hwOpts through hwInitCopyList) must be + * calculated and updated prior to programming the application to the device + * (this is normally handled as a post-build step, or by the flashloader). + */ + .crc32 = 0x00000000, + + /* No user record */ + + .debugCfg.authorization = CCFG_DBGAUTH_DBGOPEN, + + /* Set to 0. This checksum must be calculated and updated prior to + * programming the application to the device (this is normally handled as a + * post-build step, or by the flashloader). + */ + .debugCfg.crc32 = 0x00000000, +}; + +#if defined(__IAR_SYSTEMS_ICC__) +__root const scfg_t scfg @ ".scfg" = +#elif defined(__TI_COMPILER_VERSION__) +#pragma DATA_SECTION(scfg, ".scfg") +#pragma RETAIN(scfg) +const scfg_t scfg = +#elif defined(__llvm__) +/* Push current set of diagnostics */ +#pragma clang diagnostic push +/* Ignore warnings about overriding struct members in the initialiser below. + * This is required only for ticlang. + */ +#pragma clang diagnostic ignored "-Winitializer-overrides" +const scfg_t scfg __attribute__((section(".scfg"), retain)) = +#else +const scfg_t scfg __attribute__((section(".scfg"), used)) = +#endif +{ + SCFG_DEFAULT_VALUES, + + /* Overwrite default SCFG values */ + .hsmCfg.publicKeyHash = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, + .keyRingCfg = { + .keyEntries = { + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + { SCFG_INVALID_KEY_ENTRY }, + }, + }, + + /* Set to 0. This checksum must be calculated and updated prior to + * programming the application to the device (this is normally handled as a + * post-build step, or by the flashloader). + */ + .crc32 = 0x00000000, +}; + +#ifdef __llvm__ +/* Restore the original set of diagnostics */ +#pragma clang diagnostic pop +#endif diff --git a/platform/TI/cc2745/sdk_config_files/ti_freertos_config.c b/platform/TI/cc2745/sdk_config_files/ti_freertos_config.c new file mode 100644 index 0000000..aecc265 --- /dev/null +++ b/platform/TI/cc2745/sdk_config_files/ti_freertos_config.c @@ -0,0 +1,195 @@ +/* + * ======== ti_freertos_config.c ======== + * Configured FreeRTOS module definitions + * + * DO NOT EDIT - This file is generated + * by the SysConfig tool. + */ + +#include +#include + +#include "FreeRTOSConfig.h" + +/* C files contributed by /freertos/FreeRTOS */ +#include <../list.c> +#include <../queue.c> +#include <../tasks.c> +#include <../timers.c> +#include <../croutine.c> +#include <../event_groups.c> +#include <../stream_buffer.c> +#include <../portable/MemMang/heap_4.c> + +/* C files contributed by /freertos/dpl/Settings */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* C files contributed by /freertos/exception */ +#include + +/* C files contributed by /ti/posix/freertos/Settings */ +#define TI_POSIX_FREERTOS_MEMORY_ENABLEADV + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +/* Wrapper functions for using the queue registry regardless of whether it is enabled or disabled */ +void vQueueAddToRegistryWrapper(QueueHandle_t xQueue, const char * pcQueueName) +{ + /* This function is intentionally left empty as the Queue Registry is disabled */ +} + +void vQueueUnregisterQueueWrapper(QueueHandle_t xQueue) +{ + /* This function is intentionally left empty as the Queue Registry is disabled */ +} + + +#include + +/* FreeRTOS handlers */ +extern void SVC_Handler(void); +extern void PendSV_Handler(void); +extern void SysTick_Handler(void); + +/* Custom handler functions */ + +/* The entry point for the application startup code */ +extern void resetISR(void); + +/* Linker variables that marks the top and bottom of the stack */ +extern unsigned long __STACK_END; + +/* Initial vector table definition */ +__attribute__((section(".resetVecs"), retain)) void (*const resetVectors[])(void) = { + /* The initial stack pointer */ + (void (*)(void))((unsigned long)&__STACK_END), + /* The reset handler */ + resetISR, + /* The NMI handler */ + Exception_handlerSpin, + /* The hard fault handler */ + Exception_handlerSpin, + /* The MPU fault handler */ + Exception_handlerSpin, + /* The bus fault handler */ + Exception_handlerSpin, + /* The usage fault handler */ + Exception_handlerSpin, + /* The secure fault handler */ + Exception_handlerSpin, + /* Reserved */ + Exception_handlerSpin, + /* Reserved */ + Exception_handlerSpin, + /* Reserved */ + Exception_handlerSpin, + /* SVCall handler */ + SVC_Handler, + /* Debug monitor handler */ + Exception_handlerSpin, + /* Reserved */ + Exception_handlerSpin, + /* The PendSV handler */ + PendSV_Handler, + /* The SysTick handler */ + SysTick_Handler, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, + /* Peripheral interrupt */ + Exception_handlerSpin, +}; diff --git a/platform/TI/cc2745/sdk_config_files/ti_freertos_portable_config.c b/platform/TI/cc2745/sdk_config_files/ti_freertos_portable_config.c new file mode 100644 index 0000000..1e137b0 --- /dev/null +++ b/platform/TI/cc2745/sdk_config_files/ti_freertos_portable_config.c @@ -0,0 +1,15 @@ +/* + * ======== ti_freertos_portable_config.c ======== + * Configured FreeRTOS module definitions + * + * DO NOT EDIT - This file is generated + * by the SysConfig tool. + */ + +#include +#include + +#include "FreeRTOSConfig.h" + +#include <../portable/GCC/ARM_CM33_NTZ/non_secure/port.c> +#include <../portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c> diff --git a/platform/TI/cc2745/sdk_config_files/ti_secure_boot_properties.h b/platform/TI/cc2745/sdk_config_files/ti_secure_boot_properties.h new file mode 100644 index 0000000..f920eb9 --- /dev/null +++ b/platform/TI/cc2745/sdk_config_files/ti_secure_boot_properties.h @@ -0,0 +1,14 @@ +/* + * ======== ti_secure_boot_properties.h ======== + * Secure Boot definitions for CC27XX devices. + * + * DO NOT EDIT - This file is generated by the SysConfig tool. + * + */ + +#ifndef __SECURE_BOOT_PROPERTIES_H__ +#define __SECURE_BOOT_PROPERTIES_H__ + +/* Secure Boot is DISABLED - No definitions generated */ + +#endif diff --git a/platform/TI/cc2745/sdk_config_files/ti_secure_boot_properties.json b/platform/TI/cc2745/sdk_config_files/ti_secure_boot_properties.json new file mode 100644 index 0000000..5a7a566 --- /dev/null +++ b/platform/TI/cc2745/sdk_config_files/ti_secure_boot_properties.json @@ -0,0 +1,10 @@ + { + "sbEnabled" : "False", + "hdrSize" : "0x80", + "slotSize" : "0x0", + "version" : "1.0", + "imgType" : "0x0", + "secCnt" : 0, + "romFixed" : "0x0", + "key": "" + } diff --git a/platform/TI/cc2745/sdk_config_files/ti_utils_build_linker.cmd.genmap b/platform/TI/cc2745/sdk_config_files/ti_utils_build_linker.cmd.genmap new file mode 100644 index 0000000..1304378 --- /dev/null +++ b/platform/TI/cc2745/sdk_config_files/ti_utils_build_linker.cmd.genmap @@ -0,0 +1,35 @@ +/* + * ======== ti_utils_build_linker.cmd.genmap ======== + * SysConfig-generated linker definitions. + * + * This file provides "more portable" definitions for linker command files. + * The intent is to enable easier porting to different devices by leveraging + * these definitions. + * + * DO NOT EDIT - This file is generated by the SysConfig tool for the + * CC2745R10RHAQ1 device, ticlang C/C++ toolchain + */ +/* symbols provided by /ti/devices/CCFG */ +ti_utils_build_GenMap_sym_CRC_CCFG_BOOT_CFG_begin = 0x4e020000; +ti_utils_build_GenMap_sym_CRC_CCFG_BOOT_CFG_end = 0x4e02000b; +ti_utils_build_GenMap_sym_CRC_CCFG_begin = 0x4e020010; +ti_utils_build_GenMap_sym_CRC_CCFG_end = 0x4e02074b; +ti_utils_build_GenMap_sym_CRC_CCFG_DEBUG_begin = 0x4e0207d0; +ti_utils_build_GenMap_sym_CRC_CCFG_DEBUG_end = 0x4e0207fb; +ti_utils_build_GenMap_sym_CRC_SCFG_begin = 0x4e040000; +ti_utils_build_GenMap_sym_CRC_SCFG_end = 0x4e0400e3; +ti_utils_build_GenMap_sym_CRC_CCFG_USER_RECORD_begin = 0x4e020750; +ti_utils_build_GenMap_sym_CRC_CCFG_USER_RECORD_end = 0x4e0207cb; + +/* definitions provided by /ti/devices/DriverLib */ +#define ti_utils_build_GenMap_FLASH0_SIZE 0x100000 +#define ti_utils_build_GenMap_RAM0_SIZE 0x28800 +#define ti_utils_build_GenMap_S2RRAM_BASE 0x40098000 +#define ti_utils_build_GenMap_S2RRAM_SIZE 0x1000 +#define ti_utils_build_GenMap_CCFG_BASE 0x4e020000 +#define ti_utils_build_GenMap_CCFG_SIZE 0x800 +#define ti_utils_build_GenMap_SCFG_BASE 0x4e040000 +#define ti_utils_build_GenMap_SCFG_SIZE 0x400 +#define ti_utils_build_GenMap_HSM_FW_SIZE 0x18000 +#define ti_utils_build_GenMap_FLASH0_BASE 0x0 +#define ti_utils_build_GenMap_RAM0_BASE 0x20000000 diff --git a/platform/platform.cmake b/platform/platform.cmake index c809645..4c943d2 100644 --- a/platform/platform.cmake +++ b/platform/platform.cmake @@ -2,4 +2,6 @@ INCLUDE(${PLATFORM_DIR}/CommonFlags.cmake) IF( (${TARGET_PLATFORM} STREQUAL "CYT2B75_M0PLUS") OR (${TARGET_PLATFORM} STREQUAL "CYT2B75_M4") ) INCLUDE(${PLATFORM_DIR}/Infineon/cyt2b75/FindFlags.cmake) +ELSEIF( (${TARGET_PLATFORM} STREQUAL "CC2745") ) + INCLUDE(${PLATFORM_DIR}/TI/cc2745/FindFlags.cmake) ENDIF() From 0bc0e99422b6e8fb236526b9ef29c43fc8fb991d Mon Sep 17 00:00:00 2001 From: RichardTony14 Date: Tue, 29 Jul 2025 15:47:16 +0530 Subject: [PATCH 2/4] Updated cc2745 build related CMake files and linker scripts --- asdk_core/cmake/asdk_app_recipe.cmake | 12 +- examples/config/app_config.cmake | 6 +- examples/linker_files/lpf3_freertos.cmd | 158 ++++++++++++++++++ platform/TI/cc2745/CMakeLists.txt | 7 +- platform/TI/cc2745/FindFlags.cmake | 6 +- .../sdk_config_files/ti_devices_config.c | 9 +- .../sdk_config_files/ti_freertos_config.c | 2 +- .../ti_utils_build_linker.cmd.genmap | 4 +- 8 files changed, 179 insertions(+), 25 deletions(-) create mode 100644 examples/linker_files/lpf3_freertos.cmd diff --git a/asdk_core/cmake/asdk_app_recipe.cmake b/asdk_core/cmake/asdk_app_recipe.cmake index 783ff0d..7b83fff 100644 --- a/asdk_core/cmake/asdk_app_recipe.cmake +++ b/asdk_core/cmake/asdk_app_recipe.cmake @@ -87,12 +87,12 @@ function(ASDK_COMPILE_APPLICATION) ### run CRC verification tool - ADD_CUSTOM_COMMAND( - TARGET ${ARG_APP_ELF} POST_BUILD - COMMAND ${USER_ROOT_DIR}/platform/TI/cc2745/sdk/tools/common/crc_tool/crc_tool patch-image --elf $ --symbol-prefix ti_utils_build_GenMap_sym_CRC --output $ - COMMENT "Running CRC Tool" - VERBATIM - ) + # ADD_CUSTOM_COMMAND( + # TARGET ${ARG_APP_ELF} POST_BUILD + # COMMAND ${USER_ROOT_DIR}/platform/TI/cc2745/sdk/tools/common/crc_tool/crc_tool patch-image --elf $ --symbol-prefix ti_utils_build_GenMap_sym_CRC --output $ + # COMMENT "Running CRC Tool" + # VERBATIM + # ) ### generate srec and hex files diff --git a/examples/config/app_config.cmake b/examples/config/app_config.cmake index 675886a..81e6a2a 100644 --- a/examples/config/app_config.cmake +++ b/examples/config/app_config.cmake @@ -14,10 +14,14 @@ IF(${TARGET_PLATFORM} STREQUAL "CYT2B75_M0PLUS") SET(APP_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/examples/linker_files/cyt2b75_cm0plus.ld ) -ELSE() +ELSEIF(${TARGET_PLATFORM} STREQUAL "CYT2B75_M4") SET(APP_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/examples/linker_files/cyt2b75_cm4.ld ) +ELSEIF(${TARGET_PLATFORM} STREQUAL "CC2745") + SET(APP_LINKER_FILE + ${CMAKE_CURRENT_SOURCE_DIR}/examples/linker_files/lpf3_freertos.cmd + ) ENDIF() ### add source files and include paths diff --git a/examples/linker_files/lpf3_freertos.cmd b/examples/linker_files/lpf3_freertos.cmd new file mode 100644 index 0000000..e1c0095 --- /dev/null +++ b/examples/linker_files/lpf3_freertos.cmd @@ -0,0 +1,158 @@ +/* + * Copyright (c) 2021-2025, Texas Instruments Incorporated + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "ti_utils_build_linker.cmd.genmap" + +--stack_size=2048 +--heap_size=0 +--entry_point resetISR + +/* Retain interrupt vector table variable */ +--retain "*(.resetVecs)" + +/* Suppress warnings and errors: */ +/* - 10063: Warning about entry point not being _c_int00 */ +/* - 16011, 16012: 8-byte alignment errors. Observed when linking in object */ +/* files compiled using Keil (ARM compiler) */ +--diag_suppress=10063,16011,16012 + +/* Set severity of diagnostics to Remark instead of Warning */ +/* - 10068: Warning about no matching log_ptr* sections */ +--diag_remark=10068 + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define FLASH_BASE ti_utils_build_GenMap_FLASH0_BASE +#if (defined(ti_utils_build_GenMap_HSM_FW_BASE) && (ti_utils_build_GenMap_HSM_FW_BASE < ti_utils_build_GenMap_FLASH0_BASE + ti_utils_build_GenMap_FLASH0_SIZE)) +/* The last part of Flash is reserved for the HSM FW, if it overlaps. + * Otherwise Flash size stays the same. + */ +#define FLASH_SIZE (ti_utils_build_GenMap_HSM_FW_BASE - ti_utils_build_GenMap_FLASH0_BASE) +#else +#define FLASH_SIZE ti_utils_build_GenMap_FLASH0_SIZE +#endif +#define RAM_BASE ti_utils_build_GenMap_RAM0_BASE +#define RAM_SIZE ti_utils_build_GenMap_RAM0_SIZE +#if defined(ti_utils_build_GenMap_S2RRAM_BASE) && \ + defined(ti_utils_build_GenMap_S2RRAM_SIZE) +#define S2RRAM_BASE ti_utils_build_GenMap_S2RRAM_BASE +#define S2RRAM_SIZE ti_utils_build_GenMap_S2RRAM_SIZE +#endif +#define CCFG_BASE ti_utils_build_GenMap_CCFG_BASE +#define CCFG_SIZE ti_utils_build_GenMap_CCFG_SIZE +#if defined(ti_utils_build_GenMap_SCFG_BASE) && \ + defined(ti_utils_build_GenMap_SCFG_SIZE) +#define SCFG_BASE ti_utils_build_GenMap_SCFG_BASE +#define SCFG_SIZE ti_utils_build_GenMap_SCFG_SIZE +#endif + +/* System memory map */ +MEMORY +{ + /* Application stored in and executes from internal flash */ +#if defined(ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE) + FLASH (RX) : origin = ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE, length = ti_utils_build_GenMap_SECURE_BOOT_FLASH_SIZE +#else + FLASH (RX) : origin = FLASH_BASE, length = FLASH_SIZE +#endif + + /* Application uses internal RAM for data */ +#if defined(ti_utils_build_GenMap_SECURE_BOOT_RAM_BASE) + SRAM (RWX) : origin = ti_utils_build_GenMap_SECURE_BOOT_RAM_BASE, length = ti_utils_build_GenMap_SECURE_BOOT_RAM_SIZE +#else + SRAM (RWX) : origin = RAM_BASE, length = RAM_SIZE +#endif + +#if defined(S2RRAM_BASE) && defined(S2RRAM_SIZE) + /* S2RRAM is intended for the S2R radio module, but it can also be used by + * the application with some limitations. Please refer to the s2rram example. + */ + S2RRAM (RW) : origin = S2RRAM_BASE, length = S2RRAM_SIZE +#endif + + /* Configuration region */ + CCFG (R) : origin = CCFG_BASE, length = CCFG_SIZE + +#if defined(SCFG_BASE) && defined(SCFG_SIZE) + /* Security configuration region */ + SCFG (R): origin = SCFG_BASE, length = SCFG_SIZE +#endif + + /* Explicitly placed off target for the storage of logging data. + * The ARM memory map allocates 1 GB of external memory from 0x60000000 - 0x9FFFFFFF. + * Unlikely that all of this will be used, so we are using the upper parts of the region. + * ARM memory map: https://developer.arm.com/documentation/ddi0337/e/memory-map/about-the-memory-map*/ + LOG_DATA (R) : origin = 0x90000000, length = 0x40000 /* 256 KB */ + LOG_PTR (R) : origin = 0x94000008, length = 0x40000 /* 256 KB */ +} + +/* Section allocation in memory */ +SECTIONS +{ +#if defined(ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE) + .resetVecs : > ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE +#else + .resetVecs : > FLASH_BASE +#endif + .text : > FLASH + .TI.ramfunc : {} load=FLASH, run=SRAM, table(BINIT) + .const : > FLASH + .constdata : > FLASH + .rodata : > FLASH + .binit : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + .emb_text : > FLASH + .ccfg : > CCFG + +#if defined(SCFG_BASE) && defined(SCFG_SIZE) + .scfg : > SCFG +#endif + + .ramVecs : > SRAM, type = NOLOAD, ALIGN(256) + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM (HIGH) + .nonretenvar : > SRAM + +#if defined(S2RRAM_BASE) && defined(S2RRAM_SIZE) + /* Placing the section .s2rram in S2RRAM region. Only uninitialized + * objects may be placed in this section. + */ + .s2rram : > S2RRAM, type = NOINIT +#endif + + .log_data : > LOG_DATA, type = COPY + .log_ptr : { *(.log_ptr*) } > LOG_PTR align 4, type = COPY +} diff --git a/platform/TI/cc2745/CMakeLists.txt b/platform/TI/cc2745/CMakeLists.txt index 2885b40..983b06e 100644 --- a/platform/TI/cc2745/CMakeLists.txt +++ b/platform/TI/cc2745/CMakeLists.txt @@ -13,7 +13,7 @@ INCLUDE(${CMAKE_CURRENT_SOURCE_DIR}/FindFlags.cmake) SET(SDK_INC "") ## add necessary SDK files -LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/generated_files) +LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files) LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/freertos) LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source) LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/third_party/freertos/include) @@ -74,13 +74,10 @@ LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/nvs/NVSLPF LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/power/PowerCC27XX.c) LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/power/PowerCC27XX_lfoscCompensation.c) -FILE(GLOB_RECURSE GEN_SRC ${CMAKE_CURRENT_SOURCE_DIR}/generated_files/*.c) +FILE(GLOB_RECURSE GEN_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files/*.c) FILE(GLOB_RECURSE DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/devices/cc27xx/driverlib/*.c) -MESSAGE("DEV SRC Before\n" ${DEV_SRC}) LIST(FILTER DEV_SRC EXCLUDE REGEX ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/devices/cc27xx/driverlib/.*_veneers.c) -MESSAGE("DEV SRC After\n" ${DEV_SRC}) - LIST(APPEND SRC_LIST ${GEN_SRC} ${DEV_SRC} diff --git a/platform/TI/cc2745/FindFlags.cmake b/platform/TI/cc2745/FindFlags.cmake index bb340d7..da26b42 100644 --- a/platform/TI/cc2745/FindFlags.cmake +++ b/platform/TI/cc2745/FindFlags.cmake @@ -23,7 +23,7 @@ set(CC2745_C_COMPILER_OPTIONS -MF -MT -c - # -v + -v ) set(CC2745_LINKER_OPTIONS @@ -32,7 +32,7 @@ set(CC2745_LINKER_OPTIONS -mfloat-abi=hard -mfpu=fpv5-sp-d16 -mlittle-endian - # -v + -v ) ##### define linker flags @@ -41,7 +41,7 @@ set(CC2745_APP_LINK_FLAGS ${CC2745_LINKER_OPTIONS} -Wl,-m=${APP_ELF_NAME}.map -Wl,-I${CMAKE_CURRENT_SOURCE_DIR}/sdk/source - -Wl,-I${CMAKE_CURRENT_SOURCE_DIR}/generated_files + -Wl,-I${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files -Wl,-I$ENV{ASDK_TIARMCLANG_TOOLCHAIN_ROOT}/$ENV{ASDK_TIARMCLANG_TOOLCHAIN_VERSION}/lib -Wl,--diag_wrap=off -Wl,--display_error_number diff --git a/platform/TI/cc2745/sdk_config_files/ti_devices_config.c b/platform/TI/cc2745/sdk_config_files/ti_devices_config.c index 9aac75e..40db933 100644 --- a/platform/TI/cc2745/sdk_config_files/ti_devices_config.c +++ b/platform/TI/cc2745/sdk_config_files/ti_devices_config.c @@ -10,10 +10,6 @@ #include #include DeviceFamily_constructPath(inc/hw_ccfg.h) #include DeviceFamily_constructPath(inc/hw_scfg.h) - -#define SCFG_INVALID_KEY_ENTRY \ - .type = 0, .keyHash = {0}, .crc32 = 0, .status = 0, - extern void (*const resetVectors[])(void); #if defined(__IAR_SYSTEMS_ICC__) @@ -42,7 +38,8 @@ const ccfg_t ccfg __attribute__((section(".ccfg"), used)) = * post-build step, or by the flashloader). */ .bootCfg.crc32 = 0x00000000, - .hwOpts = {0xFFFFFFFF, 0xFFFFFFFF}, + + .res0 = {0xFFFFFFFF, 0xFFFFFFFF}, .permissions.allowDebugPort = CCFG_PERMISSION_ALLOW, .permissions.allowEnergyTrace = CCFG_PERMISSION_ALLOW, @@ -74,7 +71,7 @@ const ccfg_t ccfg __attribute__((section(".ccfg"), used)) = .flashProt.chipEraseRetain.mainSectors32_255 = 0x0, .flashProt.chipEraseRetain.mainSectors256_511 = 0xfc000000, - /* Set to 0. This checksum (across hwOpts through hwInitCopyList) must be + /* Set to 0. This checksum (after bootCfg through hwInitCopyList) must be * calculated and updated prior to programming the application to the device * (this is normally handled as a post-build step, or by the flashloader). */ diff --git a/platform/TI/cc2745/sdk_config_files/ti_freertos_config.c b/platform/TI/cc2745/sdk_config_files/ti_freertos_config.c index aecc265..1526902 100644 --- a/platform/TI/cc2745/sdk_config_files/ti_freertos_config.c +++ b/platform/TI/cc2745/sdk_config_files/ti_freertos_config.c @@ -35,8 +35,8 @@ #include #include #include -#include #include +#include #include /* C files contributed by /freertos/exception */ diff --git a/platform/TI/cc2745/sdk_config_files/ti_utils_build_linker.cmd.genmap b/platform/TI/cc2745/sdk_config_files/ti_utils_build_linker.cmd.genmap index 1304378..bb6f370 100644 --- a/platform/TI/cc2745/sdk_config_files/ti_utils_build_linker.cmd.genmap +++ b/platform/TI/cc2745/sdk_config_files/ti_utils_build_linker.cmd.genmap @@ -18,8 +18,6 @@ ti_utils_build_GenMap_sym_CRC_CCFG_DEBUG_begin = 0x4e0207d0; ti_utils_build_GenMap_sym_CRC_CCFG_DEBUG_end = 0x4e0207fb; ti_utils_build_GenMap_sym_CRC_SCFG_begin = 0x4e040000; ti_utils_build_GenMap_sym_CRC_SCFG_end = 0x4e0400e3; -ti_utils_build_GenMap_sym_CRC_CCFG_USER_RECORD_begin = 0x4e020750; -ti_utils_build_GenMap_sym_CRC_CCFG_USER_RECORD_end = 0x4e0207cb; /* definitions provided by /ti/devices/DriverLib */ #define ti_utils_build_GenMap_FLASH0_SIZE 0x100000 @@ -30,6 +28,6 @@ ti_utils_build_GenMap_sym_CRC_CCFG_USER_RECORD_end = 0x4e0207cb; #define ti_utils_build_GenMap_CCFG_SIZE 0x800 #define ti_utils_build_GenMap_SCFG_BASE 0x4e040000 #define ti_utils_build_GenMap_SCFG_SIZE 0x400 -#define ti_utils_build_GenMap_HSM_FW_SIZE 0x18000 +#define ti_utils_build_GenMap_HSM_FW_BASE 0xe8000 #define ti_utils_build_GenMap_FLASH0_BASE 0x0 #define ti_utils_build_GenMap_RAM0_BASE 0x20000000 From 38affcb023bfb778b4bb423850f103910c87a195 Mon Sep 17 00:00:00 2001 From: RichardTony14 Date: Tue, 5 Aug 2025 11:09:34 +0530 Subject: [PATCH 3/4] Updated CMake files and added linker scripts to link for freertos and nortos based application --- CMakeLists.txt | 1 + app/config/app_config.cmake | 13 +- app/linker_files/lpf3_nortos.cmd | 171 ++++++++++++++++++++++++++ asdk_core/cmake/asdk_app_recipe.cmake | 21 +++- examples/config/app_config.cmake | 16 ++- examples/linker_files/lpf3_nortos.cmd | 171 ++++++++++++++++++++++++++ platform/TI/cc2745/CMakeLists.txt | 36 +++++- platform/TI/cc2745/FindFlags.cmake | 14 ++- 8 files changed, 426 insertions(+), 17 deletions(-) create mode 100644 app/linker_files/lpf3_nortos.cmd create mode 100644 examples/linker_files/lpf3_nortos.cmd diff --git a/CMakeLists.txt b/CMakeLists.txt index 34387ff..14bcc7d 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -77,6 +77,7 @@ ASDK_COMPILE_APPLICATION( APP_USER_SRC ${APP_USER_SRC} APP_USER_INC ${APP_USER_INC} APP_LINKER_FILE ${APP_LINKER_FILE} + APP_USER_DEFINES ${APP_USER_DEFINES} USER_LINKER_OPTIONS ${USER_LINKER_OPTIONS} ) diff --git a/app/config/app_config.cmake b/app/config/app_config.cmake index fdefc83..1cca25d 100644 --- a/app/config/app_config.cmake +++ b/app/config/app_config.cmake @@ -12,6 +12,10 @@ SET(APP_ELF_NAME "asdk_app") SET(APP_VERSION_FILEPATH ${CMAKE_CURRENT_SOURCE_DIR}/version.txt) +### add user defines + +SET(APP_USER_DEFINES -Dnortos) + ### configure LD file IF(${TARGET_PLATFORM} STREQUAL "CYT2B75_M0PLUS") @@ -22,9 +26,13 @@ ELSEIF(${TARGET_PLATFORM} STREQUAL "CYT2B75_M4") SET(APP_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/app/linker_files/cyt2b75_cm4.ld ) -ELSEIF(${TARGET_PLATFORM} STREQUAL "CC2745") +ELSEIF((${TARGET_PLATFORM} STREQUAL "CC2745") AND ("${APP_USER_DEFINES}" STREQUAL "-Dfreertos")) + SET(APP_LINKER_FILE + ${CMAKE_CURRENT_SOURCE_DIR}/app/linker_files/lpf3_freertos.cmd + ) +ELSEIF((${TARGET_PLATFORM} STREQUAL "CC2745") AND ("${APP_USER_DEFINES}" STREQUAL "-Dnortos")) SET(APP_LINKER_FILE - ${CMAKE_CURRENT_SOURCE_DIR}/app/linker_files/lpf3_freertos.cmd + ${CMAKE_CURRENT_SOURCE_DIR}/app/linker_files/lpf3_nortos.cmd ) ENDIF() @@ -33,6 +41,7 @@ ENDIF() SET(APP_USER_INC ${CMAKE_CURRENT_SOURCE_DIR}/app # add other include paths from here + ${CMAKE_CURRENT_SOURCE_DIR}/app/boards ) AUX_SOURCE_DIRECTORY(${CMAKE_CURRENT_SOURCE_DIR}/app APP_USER_SRC) diff --git a/app/linker_files/lpf3_nortos.cmd b/app/linker_files/lpf3_nortos.cmd new file mode 100644 index 0000000..5d84f3e --- /dev/null +++ b/app/linker_files/lpf3_nortos.cmd @@ -0,0 +1,171 @@ +/* + * Copyright (c) 2021-2025, Texas Instruments Incorporated + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "ti_utils_build_linker.cmd.genmap" + +--stack_size=1024 /* C stack is also used for ISR stack */ + +--heap_size=8192 + +/* Retain interrupt vector table variable */ +--retain "*(.resetVecs)" +/* Override default entry point. */ +--entry_point resetISR +/* Allow main() to take args */ +--args 0x8 +/* Suppress warnings and errors: */ +/* - 10063: Warning about entry point not being _c_int00 */ +/* - 16011, 16012: 8-byte alignment errors. Observed when linking in object */ +/* files compiled using Keil (ARM compiler) */ +--diag_suppress=10063,16011,16012 + +/* Set severity of diagnostics to Remark instead of Warning */ +/* - 10068: Warning about no matching log_ptr* sections */ +--diag_remark=10068 + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=2048 */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define FLASH_BASE ti_utils_build_GenMap_FLASH0_BASE +#if (defined(ti_utils_build_GenMap_HSM_FW_BASE) && (ti_utils_build_GenMap_HSM_FW_BASE < ti_utils_build_GenMap_FLASH0_BASE + ti_utils_build_GenMap_FLASH0_SIZE)) +/* The last part of Flash is reserved for the HSM FW, if it overlaps. + * Otherwise Flash size stays the same. + */ +#define FLASH_SIZE (ti_utils_build_GenMap_HSM_FW_BASE - ti_utils_build_GenMap_FLASH0_BASE) +#else +#define FLASH_SIZE ti_utils_build_GenMap_FLASH0_SIZE +#endif +#define RAM_BASE ti_utils_build_GenMap_RAM0_BASE +#define RAM_SIZE ti_utils_build_GenMap_RAM0_SIZE +#if defined(ti_utils_build_GenMap_S2RRAM_BASE) && \ + defined(ti_utils_build_GenMap_S2RRAM_SIZE) +#define S2RRAM_BASE ti_utils_build_GenMap_S2RRAM_BASE +#define S2RRAM_SIZE ti_utils_build_GenMap_S2RRAM_SIZE +#endif +#define CCFG_BASE ti_utils_build_GenMap_CCFG_BASE +#define CCFG_SIZE ti_utils_build_GenMap_CCFG_SIZE +#if defined(ti_utils_build_GenMap_SCFG_BASE) && \ + defined(ti_utils_build_GenMap_SCFG_SIZE) +#define SCFG_BASE ti_utils_build_GenMap_SCFG_BASE +#define SCFG_SIZE ti_utils_build_GenMap_SCFG_SIZE +#endif + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ +#if defined(ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE) + FLASH (RX) : origin = ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE, length = ti_utils_build_GenMap_SECURE_BOOT_FLASH_SIZE +#else + FLASH (RX) : origin = FLASH_BASE, length = FLASH_SIZE +#endif + + /* Application uses internal RAM for data */ +#if defined(ti_utils_build_GenMap_SECURE_BOOT_RAM_BASE) + SRAM (RWX) : origin = ti_utils_build_GenMap_SECURE_BOOT_RAM_BASE, length = ti_utils_build_GenMap_SECURE_BOOT_RAM_SIZE +#else + SRAM (RWX) : origin = RAM_BASE, length = RAM_SIZE +#endif + +#if defined(S2RRAM_BASE) && defined(S2RRAM_SIZE) + /* S2RRAM is intended for the S2R radio module, but it can also be used by + * the application with some limitations. Please refer to the s2rram example. + */ + S2RRAM (RW) : origin = S2RRAM_BASE, length = S2RRAM_SIZE +#endif + /* Configuration region */ + CCFG (R) : origin = CCFG_BASE, length = CCFG_SIZE + +#if defined(SCFG_BASE) && defined(SCFG_SIZE) + /* Security configuration region */ + SCFG (R): origin = SCFG_BASE, length = SCFG_SIZE +#endif + + /* Explicitly placed off target for the storage of logging data. + * The ARM memory map allocates 1 GB of external memory from 0x60000000 - 0x9FFFFFFF. + * Unlikely that all of this will be used, so we are using the upper parts of the region. + * ARM memory map: https://developer.arm.com/documentation/ddi0337/e/memory-map/about-the-memory-map*/ + LOG_DATA (R) : origin = 0x90000000, length = 0x40000 /* 256 KB */ + LOG_PTR (R) : origin = 0x94000008, length = 0x40000 /* 256 KB */ +} + +/* Section allocation in memory */ + +SECTIONS +{ +#if defined(ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE) + .resetVecs : > ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE +#else + .resetVecs : > FLASH_BASE +#endif + .text : > FLASH + .TI.ramfunc : {} load=FLASH, run=SRAM, table(BINIT) + .const : > FLASH + .constdata : > FLASH + .rodata : > FLASH + .binit : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + .emb_text : > FLASH + .ccfg : > CCFG + +#if defined(SCFG_BASE) && defined(SCFG_SIZE) + .scfg : > SCFG +#endif + + .ramVecs : > SRAM, type = NOLOAD, ALIGN(256) + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM (HIGH) + .nonretenvar : > SRAM + +#if defined(S2RRAM_BASE) && defined(S2RRAM_SIZE) + /* Placing the section .s2rram in S2RRAM region. Only uninitialized + * objects may be placed in this section. + */ + .s2rram : > S2RRAM, type = NOINIT +#endif + + .log_data : > LOG_DATA, type = COPY + .log_ptr : { *(.log_ptr*) } > LOG_PTR align 4, type = COPY +} diff --git a/asdk_core/cmake/asdk_app_recipe.cmake b/asdk_core/cmake/asdk_app_recipe.cmake index 7b83fff..d325c94 100644 --- a/asdk_core/cmake/asdk_app_recipe.cmake +++ b/asdk_core/cmake/asdk_app_recipe.cmake @@ -12,6 +12,7 @@ function(ASDK_COMPILE_APPLICATION) APP_INC APP_USER_SRC APP_USER_INC + APP_USER_DEFINES USER_LINKER_OPTIONS ) @@ -85,14 +86,22 @@ function(ASDK_COMPILE_APPLICATION) asdk ) + # add user defines + + TARGET_COMPILE_DEFINITIONS( + ${ARG_APP_ELF} + PRIVATE + ${ARG_APP_USER_DEFINES} + ) ### run CRC verification tool - # ADD_CUSTOM_COMMAND( - # TARGET ${ARG_APP_ELF} POST_BUILD - # COMMAND ${USER_ROOT_DIR}/platform/TI/cc2745/sdk/tools/common/crc_tool/crc_tool patch-image --elf $ --symbol-prefix ti_utils_build_GenMap_sym_CRC --output $ - # COMMENT "Running CRC Tool" - # VERBATIM - # ) + + ADD_CUSTOM_COMMAND( + TARGET ${ARG_APP_ELF} POST_BUILD + COMMAND ${USER_ROOT_DIR}/platform/TI/cc2745/sdk/tools/common/crc_tool/crc_tool patch-image --elf $ --symbol-prefix ti_utils_build_GenMap_sym_CRC --output $ + COMMENT "Running CRC Tool" + VERBATIM + ) ### generate srec and hex files diff --git a/examples/config/app_config.cmake b/examples/config/app_config.cmake index 81e6a2a..13be338 100644 --- a/examples/config/app_config.cmake +++ b/examples/config/app_config.cmake @@ -8,6 +8,10 @@ SET(APP_NAME "ASDK user application") SET(APP_ELF_NAME ${APP_ELF_NAME}) +### add user defines + +SET(APP_USER_DEFINES -Dnortos) + ### configure LD file IF(${TARGET_PLATFORM} STREQUAL "CYT2B75_M0PLUS") @@ -18,9 +22,13 @@ ELSEIF(${TARGET_PLATFORM} STREQUAL "CYT2B75_M4") SET(APP_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/examples/linker_files/cyt2b75_cm4.ld ) -ELSEIF(${TARGET_PLATFORM} STREQUAL "CC2745") +ELSEIF((${TARGET_PLATFORM} STREQUAL "CC2745") AND ("${APP_USER_DEFINES}" STREQUAL "-Dfreertos")) SET(APP_LINKER_FILE - ${CMAKE_CURRENT_SOURCE_DIR}/examples/linker_files/lpf3_freertos.cmd + ${CMAKE_CURRENT_SOURCE_DIR}/examples/linker_files/lpf3_freertos.cmd + ) +ELSEIF((${TARGET_PLATFORM} STREQUAL "CC2745") AND ("${APP_USER_DEFINES}" STREQUAL "-Dnortos")) + SET(APP_LINKER_FILE + ${CMAKE_CURRENT_SOURCE_DIR}/examples/linker_files/lpf3_nortos.cmd ) ENDIF() @@ -34,6 +42,10 @@ ENDIF() # # ${CMAKE_CURRENT_SOURCE_DIR}/app/app_imu # ) +SET(APP_USER_INC + ${CMAKE_CURRENT_SOURCE_DIR}/app/boards +) + # AUX_SOURCE_DIRECTORY(${CMAKE_CURRENT_SOURCE_DIR}/app APP_USER_SRC) # add other source paths from here diff --git a/examples/linker_files/lpf3_nortos.cmd b/examples/linker_files/lpf3_nortos.cmd new file mode 100644 index 0000000..5d84f3e --- /dev/null +++ b/examples/linker_files/lpf3_nortos.cmd @@ -0,0 +1,171 @@ +/* + * Copyright (c) 2021-2025, Texas Instruments Incorporated + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "ti_utils_build_linker.cmd.genmap" + +--stack_size=1024 /* C stack is also used for ISR stack */ + +--heap_size=8192 + +/* Retain interrupt vector table variable */ +--retain "*(.resetVecs)" +/* Override default entry point. */ +--entry_point resetISR +/* Allow main() to take args */ +--args 0x8 +/* Suppress warnings and errors: */ +/* - 10063: Warning about entry point not being _c_int00 */ +/* - 16011, 16012: 8-byte alignment errors. Observed when linking in object */ +/* files compiled using Keil (ARM compiler) */ +--diag_suppress=10063,16011,16012 + +/* Set severity of diagnostics to Remark instead of Warning */ +/* - 10068: Warning about no matching log_ptr* sections */ +--diag_remark=10068 + +/* The following command line options are set as part of the CCS project. */ +/* If you are building using the command line, or for some reason want to */ +/* define them here, you can uncomment and modify these lines as needed. */ +/* If you are using CCS for building, it is probably better to make any such */ +/* modifications in your CCS project and leave this file alone. */ +/* */ +/* --heap_size=0 */ +/* --stack_size=2048 */ + +/* The starting address of the application. Normally the interrupt vectors */ +/* must be located at the beginning of the application. */ +#define FLASH_BASE ti_utils_build_GenMap_FLASH0_BASE +#if (defined(ti_utils_build_GenMap_HSM_FW_BASE) && (ti_utils_build_GenMap_HSM_FW_BASE < ti_utils_build_GenMap_FLASH0_BASE + ti_utils_build_GenMap_FLASH0_SIZE)) +/* The last part of Flash is reserved for the HSM FW, if it overlaps. + * Otherwise Flash size stays the same. + */ +#define FLASH_SIZE (ti_utils_build_GenMap_HSM_FW_BASE - ti_utils_build_GenMap_FLASH0_BASE) +#else +#define FLASH_SIZE ti_utils_build_GenMap_FLASH0_SIZE +#endif +#define RAM_BASE ti_utils_build_GenMap_RAM0_BASE +#define RAM_SIZE ti_utils_build_GenMap_RAM0_SIZE +#if defined(ti_utils_build_GenMap_S2RRAM_BASE) && \ + defined(ti_utils_build_GenMap_S2RRAM_SIZE) +#define S2RRAM_BASE ti_utils_build_GenMap_S2RRAM_BASE +#define S2RRAM_SIZE ti_utils_build_GenMap_S2RRAM_SIZE +#endif +#define CCFG_BASE ti_utils_build_GenMap_CCFG_BASE +#define CCFG_SIZE ti_utils_build_GenMap_CCFG_SIZE +#if defined(ti_utils_build_GenMap_SCFG_BASE) && \ + defined(ti_utils_build_GenMap_SCFG_SIZE) +#define SCFG_BASE ti_utils_build_GenMap_SCFG_BASE +#define SCFG_SIZE ti_utils_build_GenMap_SCFG_SIZE +#endif + +/* System memory map */ + +MEMORY +{ + /* Application stored in and executes from internal flash */ +#if defined(ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE) + FLASH (RX) : origin = ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE, length = ti_utils_build_GenMap_SECURE_BOOT_FLASH_SIZE +#else + FLASH (RX) : origin = FLASH_BASE, length = FLASH_SIZE +#endif + + /* Application uses internal RAM for data */ +#if defined(ti_utils_build_GenMap_SECURE_BOOT_RAM_BASE) + SRAM (RWX) : origin = ti_utils_build_GenMap_SECURE_BOOT_RAM_BASE, length = ti_utils_build_GenMap_SECURE_BOOT_RAM_SIZE +#else + SRAM (RWX) : origin = RAM_BASE, length = RAM_SIZE +#endif + +#if defined(S2RRAM_BASE) && defined(S2RRAM_SIZE) + /* S2RRAM is intended for the S2R radio module, but it can also be used by + * the application with some limitations. Please refer to the s2rram example. + */ + S2RRAM (RW) : origin = S2RRAM_BASE, length = S2RRAM_SIZE +#endif + /* Configuration region */ + CCFG (R) : origin = CCFG_BASE, length = CCFG_SIZE + +#if defined(SCFG_BASE) && defined(SCFG_SIZE) + /* Security configuration region */ + SCFG (R): origin = SCFG_BASE, length = SCFG_SIZE +#endif + + /* Explicitly placed off target for the storage of logging data. + * The ARM memory map allocates 1 GB of external memory from 0x60000000 - 0x9FFFFFFF. + * Unlikely that all of this will be used, so we are using the upper parts of the region. + * ARM memory map: https://developer.arm.com/documentation/ddi0337/e/memory-map/about-the-memory-map*/ + LOG_DATA (R) : origin = 0x90000000, length = 0x40000 /* 256 KB */ + LOG_PTR (R) : origin = 0x94000008, length = 0x40000 /* 256 KB */ +} + +/* Section allocation in memory */ + +SECTIONS +{ +#if defined(ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE) + .resetVecs : > ti_utils_build_GenMap_SECURE_BOOT_FLASH_BASE +#else + .resetVecs : > FLASH_BASE +#endif + .text : > FLASH + .TI.ramfunc : {} load=FLASH, run=SRAM, table(BINIT) + .const : > FLASH + .constdata : > FLASH + .rodata : > FLASH + .binit : > FLASH + .cinit : > FLASH + .pinit : > FLASH + .init_array : > FLASH + .emb_text : > FLASH + .ccfg : > CCFG + +#if defined(SCFG_BASE) && defined(SCFG_SIZE) + .scfg : > SCFG +#endif + + .ramVecs : > SRAM, type = NOLOAD, ALIGN(256) + .data : > SRAM + .bss : > SRAM + .sysmem : > SRAM + .stack : > SRAM (HIGH) + .nonretenvar : > SRAM + +#if defined(S2RRAM_BASE) && defined(S2RRAM_SIZE) + /* Placing the section .s2rram in S2RRAM region. Only uninitialized + * objects may be placed in this section. + */ + .s2rram : > S2RRAM, type = NOINIT +#endif + + .log_data : > LOG_DATA, type = COPY + .log_ptr : { *(.log_ptr*) } > LOG_PTR align 4, type = COPY +} diff --git a/platform/TI/cc2745/CMakeLists.txt b/platform/TI/cc2745/CMakeLists.txt index 983b06e..e6307d4 100644 --- a/platform/TI/cc2745/CMakeLists.txt +++ b/platform/TI/cc2745/CMakeLists.txt @@ -14,7 +14,6 @@ SET(SDK_INC "") ## add necessary SDK files LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files) -LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/freertos) LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source) LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/third_party/freertos/include) LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/third_party/freertos/portable/GCC/ARM_CM33_NTZ/non_secure) @@ -22,6 +21,14 @@ LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/posix/ticlang) LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/devices) LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk) +IF("${APP_USER_DEFINES}" STREQUAL "-Dfreertos") + LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/freertos) + LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files/FreeRTOSConfig.h) +ELSEIF("${APP_USER_DEFINES}" STREQUAL "-Dnortos") + LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos) + LIST(FILTER SDK_INC EXCLUDE REGEX ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files/FreeRTOSConfig.h) +ENDIF() + SET(DRV_SRC "") LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/apps/Button.c) LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/apps/LED.c) @@ -74,12 +81,32 @@ LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/nvs/NVSLPF LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/power/PowerCC27XX.c) LIST(APPEND DRV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/drivers/power/PowerCC27XX_lfoscCompensation.c) -FILE(GLOB_RECURSE GEN_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files/*.c) +FILE(GLOB_RECURSE SDK_CFG_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files/*.c) FILE(GLOB_RECURSE DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/devices/cc27xx/driverlib/*.c) LIST(FILTER DEV_SRC EXCLUDE REGEX ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/devices/cc27xx/driverlib/.*_veneers.c) +IF("${APP_USER_DEFINES}" STREQUAL "-Dfreertos") + LIST(APPEND SDK_CFG_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files/ti_freertos_config.c) +ELSEIF("${APP_USER_DEFINES}" STREQUAL "-Dnortos") + LIST(FILTER SDK_CFG_SRC EXCLUDE REGEX ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files/ti_freertos_config.c) + LIST(FILTER SDK_CFG_SRC EXCLUDE REGEX ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files/ti_freertos_portable_config.c) + LIST(APPEND DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos/NoRTOS.c) + LIST(APPEND DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos/dpl/posix_sleep.c) + LIST(APPEND DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos/dpl/DebugP_nortos.c) + LIST(APPEND DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos/dpl/MutexP_nortos.c) + LIST(APPEND DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos/dpl/SemaphoreP_nortos.c) + LIST(APPEND DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos/dpl/SwiP_nortos.c) + LIST(APPEND DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos/dpl/SystemP_nortos.c) + LIST(APPEND DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos/dpl/ClockPLPF3_nortos.c) + LIST(APPEND DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos/dpl/TimestampPLPF3_nortos.c) + LIST(APPEND DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos/dpl/QueueP_nortos.c) + LIST(APPEND DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos/dpl/HwiPCC27XX_nortos.c) + LIST(APPEND DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos/dpl/PowerCC27XX_nortos.c) + LIST(APPEND DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos/startup/startup_cc27xx_ticlang.c) +ENDIF() + LIST(APPEND SRC_LIST - ${GEN_SRC} + ${SDK_CFG_SRC} ${DEV_SRC} ${DRV_SRC} ) @@ -127,7 +154,6 @@ TARGET_LINK_LIBRARIES( cc2745_sdk INTERFACE # hidden from application cc2745_sdk_interface # use platform compile options - # -lti_utils_build_linker.cmd.genlibs -llibc.a) ### Compile DAL @@ -138,6 +164,8 @@ SET( ${CMAKE_CURRENT_SOURCE_DIR}/../../inc ) +MESSAGE("\n \n DAL_INC \n" ${DAL_INC}) + AUX_SOURCE_DIRECTORY(${CMAKE_CURRENT_SOURCE_DIR}/dal/src DAL_SRC) ADD_LIBRARY(cc2745_dal INTERFACE) diff --git a/platform/TI/cc2745/FindFlags.cmake b/platform/TI/cc2745/FindFlags.cmake index da26b42..ca4bb14 100644 --- a/platform/TI/cc2745/FindFlags.cmake +++ b/platform/TI/cc2745/FindFlags.cmake @@ -8,6 +8,8 @@ MESSAGE("CC2745_CORE: ${CC2745_CORE}") SET(CC2745_DEFS -DDeviceFamily_CC27XX + -DCC2745_LAUNCHPAD + -DCC2745R10 ) ##### define compiler flags @@ -23,7 +25,7 @@ set(CC2745_C_COMPILER_OPTIONS -MF -MT -c - -v + # -v ) set(CC2745_LINKER_OPTIONS @@ -32,7 +34,7 @@ set(CC2745_LINKER_OPTIONS -mfloat-abi=hard -mfpu=fpv5-sp-d16 -mlittle-endian - -v + # -v ) ##### define linker flags @@ -48,5 +50,11 @@ set(CC2745_APP_LINK_FLAGS -Wl,--warn_sections -Wl,--xml_link_info="${ARG_APP_ELF}_linkInfo.xml" -Wl,--rom_model - ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/boards/lpf3/lpf3_freertos.cmd ) + +IF((${TARGET_PLATFORM} STREQUAL "CC2745") AND ("${APP_USER_DEFINES}" STREQUAL "-Dfreertos")) + LIST(APPEND CC2745_APP_LINK_FLAGS ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/boards/lpf3/lpf3_freertos.cmd) +ELSEIF((${TARGET_PLATFORM} STREQUAL "CC2745") AND ("${APP_USER_DEFINES}" STREQUAL "-Dnortos")) + LIST(APPEND CC2745_APP_LINK_FLAGS ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/boards/lpf3/lpf3_nortos.cmd) +ENDIF() + From 8aca9312cac2a421b3f649adba25323ecc314fbb Mon Sep 17 00:00:00 2001 From: RichardTony14 Date: Tue, 5 Aug 2025 12:32:19 +0530 Subject: [PATCH 4/4] Updated Platform/TI/cc2745/CMakeLists.txt --- platform/TI/cc2745/CMakeLists.txt | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/platform/TI/cc2745/CMakeLists.txt b/platform/TI/cc2745/CMakeLists.txt index e6307d4..cb6c22b 100644 --- a/platform/TI/cc2745/CMakeLists.txt +++ b/platform/TI/cc2745/CMakeLists.txt @@ -23,7 +23,6 @@ LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk) IF("${APP_USER_DEFINES}" STREQUAL "-Dfreertos") LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/freertos) - LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files/FreeRTOSConfig.h) ELSEIF("${APP_USER_DEFINES}" STREQUAL "-Dnortos") LIST(APPEND SDK_INC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos) LIST(FILTER SDK_INC EXCLUDE REGEX ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files/FreeRTOSConfig.h) @@ -85,9 +84,7 @@ FILE(GLOB_RECURSE SDK_CFG_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files/*.c) FILE(GLOB_RECURSE DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/devices/cc27xx/driverlib/*.c) LIST(FILTER DEV_SRC EXCLUDE REGEX ${CMAKE_CURRENT_SOURCE_DIR}/sdk/source/ti/devices/cc27xx/driverlib/.*_veneers.c) -IF("${APP_USER_DEFINES}" STREQUAL "-Dfreertos") - LIST(APPEND SDK_CFG_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files/ti_freertos_config.c) -ELSEIF("${APP_USER_DEFINES}" STREQUAL "-Dnortos") +IF("${APP_USER_DEFINES}" STREQUAL "-Dnortos") LIST(FILTER SDK_CFG_SRC EXCLUDE REGEX ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files/ti_freertos_config.c) LIST(FILTER SDK_CFG_SRC EXCLUDE REGEX ${CMAKE_CURRENT_SOURCE_DIR}/sdk_config_files/ti_freertos_portable_config.c) LIST(APPEND DEV_SRC ${CMAKE_CURRENT_SOURCE_DIR}/sdk/kernel/nortos/NoRTOS.c)